Patents by Inventor Robert Clark
Robert Clark has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220285163Abstract: In one example, a method of processing a substrate includes loading the substrate in a process chamber, where the substrate includes a metal oxide containing film to be etched. The method further includes performing of an atomic layer etching including a plurality of cyclic processes, each of the plurality of cyclic processes including exposing the metal oxide containing film to a first gas stream including boron trichloride (BCl3), and exposing the metal oxide containing film to a second gas stream including borane, amine, alcohol, carboxylic acid, carboxamide, or beta-diketone reagent.Type: ApplicationFiled: March 8, 2021Publication date: September 8, 2022Inventor: Robert Clark
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Publication number: 20220268908Abstract: A method of determining the location of a physical object using a passive radar receiver includes determining if a transmitter beam sweeping period (TBSP) is known, and executing a TBSP-based receiver beam sweeping if the TBSP is known. If the TBSP is not known, determining if the TBSP can be measured, and executing the TBSP-based beam sweeping if the TBSP can be measured. The method includes executing a random receiver beam sweeping if the TBSP is not known and cannot be measured. The method includes determining a relative time of arrival of radio signals between the LoS path and the target path, and determining the propagation times on the LoS path and on the target path. The method includes determining the location of the physical object using the propagation times.Type: ApplicationFiled: February 20, 2022Publication date: August 25, 2022Inventors: Robert Clark Daniels, Alvin Warren Leung, April Camille Tucker, Mark Philip Leach
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Patent number: 11419356Abstract: A grain-popping machine and associated pod-based popping method is disclosed. The grain-popping is configured to receive a pod. Each pod includes a plurality of cells, with each cell preferably containing a single grain kernel or seed, flavoring, and a cooking medium such as oil or shortening. In a preferred embodiment, the pod is loaded into the grain-popping machine through a slot so that it is held in position adjacent to a heating element. The heating element is activated to begin a popping sequence. When each grain kernel or seed in the pod reaches popping temperature, it absorbs the flavoring in its cell and ejects through the bottom of the pod, which can be weakened to ease ejection, into a bowl positioned in a receiving area of the grain-popping machine. The pod is then removed and disposed of.Type: GrantFiled: October 29, 2018Date of Patent: August 23, 2022Assignee: Opopop, Inc.Inventors: Bradley Roulier, Jonas Tempel, Gary Ashurst, Robert Clark, Tejinder Grewal
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Patent number: 11424236Abstract: In certain embodiments, a method for designing a semiconductor device includes generating a two-dimensional design for fabricating chiplets on a semiconductor substrate. The chiplets are component levels for a multi-chip integrated circuit. The two-dimensional design includes a first layout for alignment features and semiconductor structures to be formed on a first surface of a first chiplet and a second layout for alignment features and semiconductor structures to be formed on a first surface of a second chiplet. The second chiplet is adjacent to the first chiplet on the semiconductor substrate. The second layout is a mirror image of the first layout across a reference line shared by the first chiplet and the second chiplet. The first surface of the first chiplet and the first surface of the second chiplet are both either top surfaces or bottom surfaces. The method further includes generating a photomask according to the design.Type: GrantFiled: August 31, 2020Date of Patent: August 23, 2022Assignee: Tokyo Electron LimitedInventor: Robert Clark
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Patent number: 11415682Abstract: A lidar and optical rangefinder receiver improves signal detection in the presence of varying levels of environmental light and other noise sources. The occurrence of false triggers, due to noise, during periods when no optical pulse is emitted is used to adjust the pulse detection threshold level and simultaneously calibrate the time-of-flight timer. The photodetector's response to ambient light is also used to adjust the threshold level. Example systems include signal detection electronics with dynamic thresholding and real-time calibration of timing electronics, in which the threshold level for signal detection is adjusted in response to both information acquired during calibration cycles and ambient light measured between active rangefinding cycles.Type: GrantFiled: December 26, 2018Date of Patent: August 16, 2022Assignee: Acuity Technologies, Inc.Inventor: Reece Robert Clark
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Publication number: 20220238323Abstract: A method is described for an area selective deposition (ASD) process that is a dielectric on dielectric (DoD) ASD process performed over a major surface of a semiconductor substrate. The substrate comprises a conductive material embedded in a first dielectric layer, and the major surface comprises a conductive surface and a dielectric surface of the first dielectric layer. In this method, a metal-containing capping layer is formed selectively over the dielectric surface of the first dielectric layer. In a subsequent process step, a second dielectric layer is formed from the metal-containing capping layer. Hence, the DoD ASD process forms the second dielectric layer selectively over the dielectric surface of the first dielectric layer. The dielectric material for the second dielectric layer may be deposited by performing, for example, a catalytic decomposition of a precursor gas in a surface reaction where the catalyst is obtained from the selectively formed metal-containing layer.Type: ApplicationFiled: January 28, 2021Publication date: July 28, 2022Inventor: Robert Clark
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Patent number: 11398379Abstract: A method is provided for self-aligned multi-patterning on a semiconductor workpiece using an integrated sequence of processing steps executed on a common manufacturing platform hosting one or more film-forming modules, one or more etching modules, and one or more transfer modules. A workpiece having a mandrel pattern formed thereon is received into the common manufacturing platform. A sidewall spacer pattern is formed based, at least in part, on the mandrel pattern, the sidewall spacer pattern having a plurality of second features separated by a second pitch distance with the first pitch distance being greater than the second pitch distance. The integrated sequence of processing steps is executed within the common manufacturing platform without leaving the controlled environment and the transfer modules are used to transfer the workpiece between the processing modules while maintaining the workpiece within the controlled environment. Broadly, forming a sidewall spacer pattern based on the mandrel pattern.Type: GrantFiled: March 18, 2019Date of Patent: July 26, 2022Assignee: Tokyo Electron LimitedInventors: Robert Clark, Richard Farrell, Kandabara Tapily, Angelique Raley, Sophie Thibaut
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Patent number: 11390555Abstract: A system and method for processing an optical fiber includes a treatment device disposed downstream of a furnace and including a treating zone. The treating zone includes a fiber inlet and fiber outlet and is configured to cool the optical fiber at a reduced pressure below ambient pressure and at a slow cooling rate less than an ambient cooling rate. A nozzle assembly is disposed at one or more of the fiber inlet, the fiber outlet, upstream of the treating zone, and downstream of the treating zone. The nozzle assembly includes multiple baffle plates defining a number of nozzle chambers, each nozzle chamber having a nozzle chamber pressure, wherein each baffle plate includes an orifice having a predetermined effective orifice diameter through which the optical fiber passes. Each nozzle chamber is configured to sequentially change a nozzle chamber pressure between the reduced pressure and ambient pressure.Type: GrantFiled: June 2, 2020Date of Patent: July 19, 2022Assignee: Corning IncorporatedInventors: Yacob Mesfin Argaw, Nikolaos Pantelis Kladias, Robert Clark Moore, Bruce Warren Reding, Chunfeng Zhou
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Patent number: 11393453Abstract: A method for representing an intended prosody in synthesized speech includes receiving a text utterance having at least one word, and selecting an utterance embedding for the text utterance. Each word in the text utterance has at least one syllable and each syllable has at least one phoneme. The utterance embedding represents an intended prosody. For each syllable, using the selected utterance embedding, the method also includes: predicting a duration of the syllable by encoding linguistic features of each phoneme of the syllable with a corresponding prosodic syllable embedding for the syllable; predicting a pitch contour of the syllable based on the predicted duration for the syllable; and generating a plurality of fixed-length predicted pitch frames based on the predicted duration for the syllable. Each fixed-length predicted pitch frame represents part of the predicted pitch contour of the syllable.Type: GrantFiled: January 13, 2021Date of Patent: July 19, 2022Assignee: Google LLCInventors: Robert Clark, Chun-an Chan, Vincent Wan
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Publication number: 20220223608Abstract: Bilayer stack for a ferroelectric tunnel junction and method of forming. The method includes depositing a first metal oxide film on a substrate by performing a first plurality of cycles of atomic layer deposition, where the first metal oxide film contains hafnium oxide, zirconium oxide, or both hafnium oxide and zirconium oxide, depositing a second metal oxide film on the substrate by performing a second plurality of cycles of atomic layer deposition, where the second metal oxide film contains hafnium oxide and zirconium oxide, and has a different hafnium oxide and zirconium oxide content than the first metal oxide film, and heat-treating the substrate to form a ferroelectric phase in the second metal oxide film but not in the first metal oxide film. A ferroelectric tunnel junction includes a first metal-containing electrode, the first metal oxide film, the second metal oxide film, and a second metal-containing electrode.Type: ApplicationFiled: March 29, 2022Publication date: July 14, 2022Inventors: Steven Consiglio, Kandabara Tapily, Robert Clark, Dina Triyoso
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Patent number: 11372109Abstract: A receiver module for a lidar system includes a collection lens for collecting light from a scene to form an image of the light. The receiver module also includes a mask for spatially filtering the light imaged by the collection lens to at least partly transmit a light pulse backscattered from an object in the scene. The mask is opaque apart from at least one non-circular light-transmissive region. Each non-circular light-transmissive region has orthogonal length and width. The length exceeds the width and is sufficient to transmit light incident on the collection lens at a range of incidence angles in a first angular dimension. The receiver module also includes a photodetector for detecting the light pulse collected by the lens and transmitted by the mask.Type: GrantFiled: December 21, 2018Date of Patent: June 28, 2022Assignee: Acuity Technologies, Inc.Inventor: Reece Robert Clark
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Publication number: 20220199393Abstract: An ion trap (100) includes a first electrode pair (110) and a second electrode pair (130), each including a first conductive member (112) and a second conductive member (120) and facing each other so that the first conductive member (112) of the first electrode pair (110) is on a common plane with the second conductive member (120) of the second electrode pair (130) and so that the second conductive member (120) of the first electrode pair (110) is on a common plane with the first conductive member (112) of the second electrode pair (130), a gap (132) therebetween. A signal generator (210) generates a periodic signal (212) applied to the first conductive members (112). A phase shifter (216) generates a second periodic signal (218) that is 180 out of phase therewith applied to the second conductive members (120). Ions are trapped by a resulting electric field.Type: ApplicationFiled: April 1, 2020Publication date: June 23, 2022Inventors: Wade Rellergert, Robert Clark, Harley Hayden, Brian Sawyer
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Publication number: 20220191099Abstract: Techniques are disclosed for automatically inferring software-defined network policies from the observed workload in a computing environment. The disclosed techniques include monitoring network traffic flow originating from network interfaces corresponding to containers that execute components of an application, recording details of a new network connection or a change in the existing network connection, obtaining information concerning the components of the application, identifying metadata for a component involved in the new network connection or the change in an existing network connection based on a comparison of the details of the new network connection or a change in the existing network connection and the information concerning the components of the application, generating a network policy for the component using at least the metadata for the component, and integrating the network policy for the component into a deployment package for the application.Type: ApplicationFiled: December 16, 2020Publication date: June 16, 2022Applicant: Oracle International CorporationInventors: Olgierd Stanislaw Pieczul, Robert Clark, Nitin Srinivasa Rao Jami
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Publication number: 20220181176Abstract: A substrate processing method includes (a) providing a substrate in a substrate processing tool, the substrate containing an exposed surface of a first material layer and an exposed surface of a second material layer; (b) forming a self-assembled monolayer (SAM) on the substrate in a first substrate processing chamber (SPC); (c) transferring the substrate from the first SPC through a substrate transfer chamber to a second SPC; (d) depositing a film selectively on the first material layer and film nuclei on the SAM in the second SPC; (e) transferring, after selectively depositing the film on the first material layer, the substrate from the second SPC through the substrate transfer chamber to a third SPC; (f) removing the film nuclei from the SAM by etching in the third SPC; and repeating (b), (c), (d), (e) and (f) sequentially at least once.Type: ApplicationFiled: February 28, 2022Publication date: June 9, 2022Applicant: Tokyo Electron LimitedInventors: Robert CLARK, Kandabara TAPILY
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Publication number: 20220122892Abstract: Techniques herein include methods for fabricating CFET devices. The methods enable high-temperature processes to be performed for FINFET and gate all around (GAA) technologies without degradation of temperature sensitive materials within the device and transistors. In particular, high temperature anneals and depositions can be performed prior to deposition of temperature-sensitive materials, such as work function metals and silicides. The methods enable at least two transistor devices to be fabricated in a stepwise manner while preventing thermal violations of any materials in either transistor.Type: ApplicationFiled: August 3, 2021Publication date: April 21, 2022Applicant: Tokyo Electron LimitedInventors: Jeffrey SMITH, Daniel CHANEMOUGAME, Lars LIEBMANN, Paul GUTWIN, Robert CLARK, Anton DEVILLIERS
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Patent number: 11302588Abstract: A method is provided for area-selective deposition on a semiconductor workpiece using an integrated sequence of processing steps executed on a common manufacturing platform hosting one or more film-forming modules, one or more etching modules, and one or more transfer modules. A workpiece having a target surface of a first material and a non-target surface of a second material different than the first material is received into the common manufacturing platform. An additive material is deposited on the workpiece with selectivity that results in the additive material forming on the target surface at a higher deposition rate than on the non-target surface, followed by etching to expose the non-target surface. The integrated sequence of processing steps is executed within the common manufacturing platform without leaving the controlled environment and the transfer modules are used to transfer the workpiece between the processing modules while maintaining the workpiece within the controlled environment.Type: GrantFiled: March 18, 2019Date of Patent: April 12, 2022Assignee: Tokyo Electron LimitedInventors: Robert Clark, Kandabara Tapily, Jason Mehigan
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Patent number: 11295725Abstract: A method of self-training WaveNet includes receiving a plurality of recorded speech samples and training a first autoregressive neural network using the plurality of recorded speech samples. The trained first autoregressive neural network is configured to output synthetic speech as an audible representations of a text input. The method further includes generating a plurality of synthetic speech samples using the trained first autoregressive neural network. The method additionally includes training a second autoregressive neural network using the plurality of synthetic speech samples from the trained first autoregressive neural network and distilling the trained second autoregressive neural network into a feedforward neural network.Type: GrantFiled: July 9, 2020Date of Patent: April 5, 2022Assignee: Google LLCInventors: Manish Sharma, Tom Marius Kenter, Robert Clark
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Publication number: 20220089480Abstract: An apparatus for curing a coating composition disposed on a glass optical fiber. The apparatus includes a reflector, the reflector having an interior surface delineating a boundary of a cavity, the interior surface including a plurality of portions, each of the portions extending along a different curved contour. Furthermore, each of the plurality of portions is configured to reflect curing light so that the reflected curing light is concentrated to a curing zone within the cavity such that all the reflected curing light within the curing zone has an intensity of about 60% or greater relative to a maximum intensity of the reflected curing light. A fiber location for the glass optical fiber is located within the curing zone. Additionally, the plurality of portions includes at least a first portion and a second portion, the first portion having a different degree of curvature than the second portion.Type: ApplicationFiled: August 19, 2021Publication date: March 24, 2022Inventors: Kenneth Duane Billings, Hector Michael Belleza De Pedro, Robert Clark Moore, Zachary Joseph Quist, Michael James Todt
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Publication number: 20220071501Abstract: System for monitoring intracranial compliance in a patient includes an intracranial pressure sensor, configured to obtain a measurement indicative of an intracranial pressure of a patient, a CO2 sensor, configured to obtain a measurement indicative of a CO2 level of the patient, and a processor, configured to determine an intracranial compliance from the measurements indicative of the intracranial pressure and the CO2 level. Methods for monitoring intracranial compliance in a patient are also provided.Type: ApplicationFiled: November 12, 2021Publication date: March 10, 2022Applicant: UNIVERSITY OF PITTSBURGH - OF THE COMMONWEALTH SYSTEM OF HIGHER EDUCATIONInventors: Robert Clark, Gilles Clermont, Michael Wolf
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Patent number: 11264254Abstract: A substrate processing tool configured for performing integrated substrate processing and substrate metrology, and methods of processing a substrate. The substrate processing tool includes a substrate transfer chamber, a plurality of substrate processing chambers coupled to the substrate transfer chamber, and a substrate metrology module coupled to the substrate transfer chamber. A substrate processing method includes processing a substrate in a first substrate processing chamber of a substrate processing tool, transferring the substrate from the first substrate processing chamber through a substrate transfer chamber to a substrate metrology module in the substrate processing tool, performing metrology on the substrate in the substrate metrology module, transferring the substrate from the substrate metrology module to a second substrate processing chamber through the substrate transfer chamber, and processing the substrate in the second substrate processing chamber.Type: GrantFiled: March 15, 2019Date of Patent: March 1, 2022Assignee: Tokyo Electron LimitedInventors: Kandabara Tapily, Robert Clark