Abstract: A computing cable that connects computing elements, including: a trace including a first trace segment and a second trace segment, the trace having a first impedance; and an attenuator connecting the first trace segment to the second trace segment, the attenuator including: a resistor having a resistance, and a conductor having a second impedance, wherein the combination of the resistance and the second impedance is based on the first impedance.

Abstract: A clock circuit is provided for clocking a high-speed data communication interface. The interface has (N) lanes. The clock circuit includes a triangle wave generator, N clock generators, and N lane FIFOs. The triangle wave generator provides P phase outputs, wherein P is greater than or equal to N. Each clock generator receives an associated one of the phase outputs and generates a clock signal having a frequency based upon the phase output. Each FIFO receives data and an associated one of the clock signals, and provides the data at a clock frequency associated with the associated clock signal.

Abstract: A connection assembly including a receptacle connector having a first and a second end, including: a shell, including a first outer surface and a second outer surface; a shield surrounding the shell, the shield including: a first portion including a first cam flange, the first portion rotatable about a first spring hinge; a second portion including a second cam flange, the second portion rotatable about a second spring hinge; a mating connector removable coupleable to the receptacle connector, including: an adjustment member, wherein, when a positioning of the adjustment member is adjusted to decrease a distance between the adjustment member and the second end of the receptacle connector, the adjustment member adjusts a distance between the first cam flange and the second cam flange to rotate the first portion of the shield about the first spring hinge and rotate the second portion of the shield about the second spring hinge.

Abstract: An information handling system includes a PCB, a CPU, a power distribution hat, and a heat sink. The PCB includes a first power contact on a first surface of the PCB and a first ground contact on a second surface of the PCB. The CPU includes a substrate and is affixed and electrically coupled to the first surface of the PCB by a first surface of the substrate. A second surface of the substrate includes a second power contact and a second ground contact. The power distribution hat couples the first power contact with the second power contact. The heat sink couples the first ground contact with the second ground contact.

Abstract: A printed circuit board (PCB) includes an array of signal pads on a first surface of the PCB, a power contact pad on the first surface, and a ground contact pad on a second surface of the PCB. Each signal pad of the array of signal pads is associated with a signal contact of a central processing unit (CPU). The power contact pad provides power for the CPU apart from the array of signal pads. The ground contact pad provides a ground for the CPU apart from the array of signal pads.

Abstract: A connector includes a connector core and ant outer shell. The connector core includes a plurality of contacts for coupling a device to a PCB, The connector core exhibits a first impedance for signals provided on the contacts. The outer shell is configured to be rigidly attached to the connector core. When the outer shell has a first configuration and is attached to the connector core, the connector exhibits a second impedance for signals provided on the contacts, the second impedance being different from the first impedance. When the outer shell has a second configuration and is attached to the connector core, the connector exhibits a third impedance for signals provided on the contacts, the third impedance being different from the first and second impedances.

Abstract: A CPU includes a processor die and a substrate. The processor die includes first signal contacts, power contacts, and ground contacts. The processor die is affixed and electrically coupled to the substrate on a first surface of the substrate. The substrate routes the first signal contacts to associated second signal contacts on a second surface of the substrate. The substrate further routes a subset of the power contacts to a power pad on the first surface of the substrate, and routes a subset of the ground contacts to a ground pad on the first surface of the substrate.

Abstract: A contact for a high-speed data communication interface includes a first portion configured to be coupled to a first component associated with the high-speed data communication interface, a second portion configured to be coupled to a mating contact of a second component associated with the high-speed data communication interface, and a third portion configured to provide a sliding surface when coupled to the mating contact. The sliding surface is coated with a ferromagnetic coating.

Abstract: A paddle card includes a printed circuit board and a twin-axial cable. The PCB includes a first signal pad on a top surface of the PCB and a second signal pad on a bottom surface of the PCB. The second signal pad is directly below the first signal pad. The twin-axial cable includes a first signal conductor coupled to the first signal pad and a second signal conductor coupled to the second signal pad.

Abstract: An information handling system includes a high-speed data communication link and a processor. The link includes lanes that each includes a transmitter with an equalization setting and a receiver. The processor initiates a training of the high-speed data communication interface to determine a setting value for the equalization setting for each lane, determines a lane quality value for each lane based upon the associated setting value, determines a link score based on the lane quality values, and determines that the lane quality score is outside a threshold range. In response to determining that the lane quality score is outside the threshold range, the processor selects a lane that has a lane quality value that has a greater magnitude than the lane quality values of all other lanes, increases the equalization setting of the first lane, and initiates a retraining of the other lanes.

Abstract: An information handling system includes first and second lines of a differential pair. A baseboard management controller (BMC) periodically determines a resistance of the first line and a resistance of the second line. If the first resistance is substantially equal to the second resistance, then the BMC provides a corrosion signal to a remote diagnostic system.

Abstract: A printed circuit board (PCB) is provided for transmitting a differential signal. The PCB includes first and second conductive signal layers. The first conductive signal layer includes a first positive trace of the differential signal and a first negative trace of the differential signal. The second conductive signal layer includes a second positive trace of the differential signal and a second negative trace of the differential signal. The first positive trace is adjacent to the first negative trace, and the second positive trace is adjacent to the second negative trace and directly below the first negative trace.

Abstract: A data communications cable may communicatively coupled two components associated with an information handling system. For example, the data communications cable may include: a differential pair of conductors; a first dielectric material, associated with a first relative permittivity, surrounding the differential pair of conductors; and a second dielectric material, associated with a second relative permittivity, surrounding the first dielectric material. For instance, the first relative permittivity may be greater than the second relative permittivity, and a distance between the differential pair of conductors may vary plus or minus an amount with a length of the data communications cable.

Abstract: Compensating for signal loss, including determining a first expected loss at a first frequency and a second expected loss at a second frequency at a receiver associated with a first lane of a PCB; calculating an expected rate of change of signal loss between the first and the second frequencies based on the first and the second expected losses; calculating a first measured loss of a first signal transmitted at the first frequency and a second measured loss of a second signal transmitted at the second frequency from a transmitter to the receiver along the first lane of the PCB; calculating a measured rate of change of signal loss between the first and second frequencies based on the first and the second measured losses; comparing the measured rate of change with the expected rate of change; compensating a gain of a signal transmitted from the transmitter to the receiver.

Abstract: In one embodiment, a method for decreasing a humidity level in an information handling system includes: receiving, by a sound field chamber, an incoming airflow, the incoming airflow having a humidity level corresponding to an amount of water vapor in the incoming airflow; identifying, by a humidity controller, the humidity level of the incoming airflow; determining, by the humidity controller, that the humidity level is greater than a threshold humidity level; and in response to determining that the humidity level is greater than the threshold humidity level: causing, by the humidity controller, a sound source of the information handling system to generate a sound field within the sound field chamber, the sound field comprised of sound waves, the sound waves causing an acoustic agglomeration of the water vapor, the acoustic agglomeration causing the humidity level to decrease.

Abstract: An information handing system includes a transmitter, a receiver, and a differential signal channel. The transmitter provides a differential signal on a pair of differential outputs. The receiver receives the differential signal on a pair of differential inputs. The differential signal channel carries the differential signal from the differential outputs to the differential inputs. The differential signal is provided on the differential signal channel as a voltage swing between a first positive voltage and a first negative voltage with reference to a ground plane of the information handling system.

Abstract: In one or more embodiments, a device may include a printed circuit board that includes at least two exposed conductor traces on a first side of the printed circuit board that are not in contact with each other; a material, that includes a substance that forms an electrically conductive solution when dissolved by a polar solvent, in contact with the at least two exposed conductor traces and fastened to at least one of the printed circuit board and the at least two exposed conductor traces; and a fastener on a second side of the printed circuit board, opposite the first side of the printed circuit board, among others.

Abstract: A system for providing signal temperature immunity to a printed circuit board (PCB) comprises moating a set of reference planes, forming a trench between a heat source and a stripline trace and positioning a perforated section of a plane on a reference plane opposite the heat source. Moating the reference planes increases thermal resistance, the trench removes dielectric material and replaces it with air and the perforated section causes heat to travel in a non-linear path. Vias positioned at the ends of the PCB route heat along the outer surfaces of the PCB to transfer heat to the ambient environment.

Abstract: A connection assembly, including: a first connector having a first end and a second end, and a first surface extending between the first end and the second end, the first connector including press fit pins extending away from the first surface, each of the press fit pins including: a rod portion; a connecting portion having a first shape; a second connector having a first end and a second end, including: a dielectric carrier having a first surface extending between the first end and the second end of the second connector, receptacles positioned within the first surface of the dielectric carrier, each of the receptacles including: a cylindrical region, a tapered region having a second shape that corresponds to the first shape of the connection portion, wherein, when the first connector is coupled to the second connector, the press fit pins are positioned within respective receptacles of the receptacles.

Abstract: A high performance differential cable comprises a bulk differential cable formed with a dielectric core having a central cavity and a plurality of wire guides on the outer perimeter. A pair of differential signal conductors (DSC) may be divided into two sets of wires. The smaller wires provide higher signal transmission speeds with lower losses. A paddle board at each end of the bulk differential cable comprises an interconnecting structure for combining signals from the two sets of wires into the two DSCs.