Abstract: A semiconductor device includes: a fin-type active region extending on a substrate in a first direction that is parallel to an upper surface of the substrate; and a source/drain region in a recess region extending into the fin-type active region, wherein the source/drain region includes: a first source/drain material layer; a second source/drain material layer on the first source/drain material layer; and a first dopant diffusion barrier layer on an interface between the first source/drain material layer and the second source/drain material layer.

Abstract: A semiconductor device includes a first fin type pattern on a substrate, a second fin type pattern, parallel to the first fin type pattern, on the substrate, and an epitaxial pattern on the first and second fin type patterns. The epitaxial pattern may include a shared semiconductor pattern on the first fin type pattern and the second fin type pattern. The shared semiconductor pattern may include a first sidewall adjacent to the first fin type pattern and a second sidewall adjacent to the second fin type pattern. The first sidewall may include a first lower facet, a first upper facet on the first lower facet and a first connecting curved surface connecting the first lower and upper facets. The second sidewall may include a second lower facet, a second upper facet on the second lower facet and a second connecting curved surface connecting the second lower and upper facets.

Abstract: A semiconductor device includes a lower pattern extending in a first direction and sheet patterns spaced apart therefrom in a second direction, a gate structure on the lower pattern and including a gate insulating layer, a gate spacer, and a gate electrode, a source/drain pattern on the lower pattern and in contact with the sheet patterns and the gate insulating layer, and a first etch blocking pattern between the gate spacer and the source/drain pattern. The gate spacer includes an inner sidewall extending in the third direction, and a connection sidewall extending from the inner sidewall in the first direction. The source/drain pattern includes a semiconductor filling layer on a semiconductor liner layer that is in contact with the sheet pattern and includes a facet surface extending from the connection sidewall. The first etch blocking pattern is in contact with the facet surface and the connection sidewall.

Abstract: An apparatus is provided. The apparatus includes a spinner configured to hold a wafer, a nozzle configured to supply a liquid chemical onto an upper surface of the wafer, and a laser module configured to heat the wafer by radiating a laser beam to a lower surface of the wafer while the nozzle supplies the liquid chemical onto the upper surface of the wafer.

Abstract: A wafer cleaning apparatus is provided. The wafer cleaning apparatus includes comprising a chamber configured to be loaded with a wafer, a nozzle on the wafer and configured to provide liquid chemicals on an upper surface of the wafer, a housing under the wafer, a laser module configured to irradiate laser on the wafer, a transparent window disposed between the wafer and the laser module, and a controller configured to control on/off of the laser module, wherein the controller is configured to control repetition of turning the laser module on and off, and retain temperature of the wafer within a temperature range, and a ratio of time when the laser module is on in one cycle including on/off of the laser module is 30% to 50%.

Abstract: A multi-chamber apparatus for processing a wafer, the apparatus including a high etch rate chamber to receive the wafer and to etch silicon nitride with a phosphoric acid solution; a rinse chamber to receive the wafer and to clean the wafer with an ammonia mixed solution; and a supercritical drying chamber to dry the wafer with a supercritical fluid.

Abstract: A semiconductor device includes a first active pattern having a first lower pattern and a first sheet pattern on the first lower pattern. First gate structures include a first gate electrode. A second active pattern includes a second lower pattern. A second sheet pattern is on the second lower pattern. Second gate structures include a second gate electrode that surrounds the second sheet pattern. A first source/drain recess is between adjacent first gate structures. A second source/drain recess is between adjacent second gate structures. A first source/drain pattern extends along the first source/drain recess. A first silicon germanium filling film is on the first silicon germanium liner. A second source/drain pattern includes a second silicon germanium liner extending along the second source/drain recess. A second silicon germanium filling film is on the second silicon germanium liner.

Abstract: A wafer cleaning apparatus is provided. The wafer cleaning apparatus includes comprising a chamber configured to be loaded with a wafer, a nozzle on the wafer and configured to provide liquid chemicals on an upper surface of the wafer, a housing under the wafer, a laser module configured to irradiate laser on the wafer, a transparent window disposed between the wafer and the laser module, and a controller configured to control on/off of the laser module, wherein the controller is configured to control repetition of turning the laser module on and off, and retain temperature of the wafer within a temperature range, and a ratio of time when the laser module is on in one cycle including on/off of the laser module is 30% to 50%.

Abstract: A semiconductor device including: a plurality of fin-shaped patterns spaced apart from each other in a first direction and extending in a second direction on a substrate; a field insulating layer covering sidewalls of the plurality of fin-shaped patterns and disposed between the fin-shaped patterns; a source/drain pattern connected to the plurality of fin-shaped patterns on the field insulating layer, the source/drain pattern including bottom surfaces respectively connected to the fin-shaped patterns, and at least one connection surface connecting the bottom surfaces to each other; and a sealing insulating pattern extending along the connection surface of the source/drain pattern and an upper surface of the field insulating layer, wherein the source/drain pattern includes a silicon-germanium pattern doped with a p-type impurity.

Abstract: An apparatus is provided. The apparatus includes a spinner configured to hold a wafer, a nozzle configured to supply a liquid chemical onto an upper surface of the wafer, and a laser module configured to heat the wafer by radiating a laser beam to a lower surface of the wafer while the nozzle supplies the liquid chemical onto the upper surface of the wafer.

Abstract: A wafer cleaning equipment includes a housing to be positioned adjacent to a wafer, a hollow region in the housing, a laser module that outputs a laser beam having a profile of the laser beam includes a first region having a first intensity and a second region having a second intensity greater than the first intensity, the laser beam being output into the hollow region, and a transparent window that covers an upper part of the hollow region and transmits the laser beam to be incident on an entirety of a lower surface of the wafer.

Abstract: A semiconductor device including first fin-shaped patterns in a first region of a substrate and spaced apart from each other in a first direction, second fin-shaped patterns in a second region of the substrate and spaced apart from each other in a second direction, a first field insulating film on the substrate and covering sidewalls of the first fin-shaped patterns, a second field insulating film on the substrate and covering sidewalls of the second fin-shaped patterns, a first source/drain pattern on the first field insulating film, connected to the first fin-shaped patterns, and including a first silicon-germanium pattern, and a second source/drain pattern on the second field insulating film, connected to the second fin-shaped patterns, and including a second silicon-germanium pattern, the second source/drain pattern and the second field insulating film defining one or more first air gaps therebetween may be provided.

Abstract: A semiconductor device includes a substrate including a first region and a second region, a first active pattern on the first region, a first gate structure having a first width in the first direction, on the first active pattern, a first epitaxial pattern disposed in the first active pattern on a side surface of the first gate structure, a second active pattern on the second region, a second gate structure having a second width greater than the first width in the first direction, on the second active pattern and a second epitaxial pattern disposed in the second active pattern on a side surface of the second gate structure. Each of the first epitaxial pattern and the second epitaxial pattern includes silicon germanium (SiGe), and a first Ge concentration of the first epitaxial pattern is lower than a second Ge concentration of the second epitaxial pattern.

Abstract: An integrated circuit device includes a fin-type active region extending on a substrate in a first direction parallel to a top surface of the substrate; a gate structure extending on the fin-type active region and extending in a second direction parallel to the top surface of the substrate and different from the first direction; and source/drain regions in a recess region extending from one side of the gate structure into the fin-type active region, the source/drain regions including an upper semiconductor layer on an inner wall of the recess region, having a first impurity concentration, and including a gap; and a gap-fill semiconductor layer, which fills the gap and has a second impurity concentration that is greater than the first impurity concentration.

Abstract: A semiconductor device includes an active fin on a substrate, a gate electrode and intersecting the active fin, gate spacer layers on both side walls of the gate electrode, and a source/drain region in a recess region of the active fin at at least one side of the gate electrode. The source/drain region may include a base layer in contact with the active fin, and having an inner end and an outer end opposing each other in the first direction on an inner sidewall of the recess region. The source/drain region may include a first layer on the base layer. The first layer may include germanium (Ge) having a concentration higher than a concentration of germanium (Ge) included in the base layer. The outer end of the base layer may contact the first layer, and may have a shape convex toward outside of the gate electrode on a plane.

Abstract: A wet etching apparatus includes a process bath having an internal space configured to receive an etchant and having a support unit, on which a wafer is disposed to be in contact with the etchant. A laser unit is disposed above the process bath and is configured to direct a laser beam to the wafer and to heat the wafer thereby. An etchant supply unit is configured to supply the etchant to the internal space of the process bath.

Abstract: A semiconductor device includes an active pattern including a lower pattern and a plurality of sheet patterns; a gate structure disposed on the lower pattern and surrounding the plurality of sheet patterns; and a source/drain pattern filling a source/drain recess formed on one side of the gate structure. The source/drain pattern includes a first semiconductor pattern extending along the source/drain recess and contacting the lower pattern, a second and third semiconductor patterns sequentially disposed on the first semiconductor pattern, a lower surface of the third semiconductor pattern is disposed below a lower surface of a lowermost sheet pattern, a side surface of the third semiconductor pattern includes a planar portion, and a thickness of the second semiconductor pattern on the lower surface of the third semiconductor pattern is different from a thickness of the second semiconductor pattern on the planar portion of the side surface of the third semiconductor pattern.

Abstract: A semiconductor device includes a multi-channel active pattern, a plurality of gate structures on the multi-channel active pattern and spaced apart from each other in a first direction, the plurality of gate structures including a gate electrode that extends in a second direction different from the first direction, a source/drain recess between the adjacent gate structures, and a source/drain pattern on the multi-channel active pattern in the source/drain recess, wherein the source/drain pattern includes: a semiconductor liner layer including silicon-germanium and extending along the source/drain recess, a semiconductor filling layer including silicon-germanium on the semiconductor liner layer, and at least one or more semiconductor insertion layers between the semiconductor liner layer and the semiconductor filling layer, and wherein the at least one or more semiconductor insertion layers have a saddle structure.

Abstract: There is provided a semiconductor device comprising an active pattern, including a lower pattern extending in a first direction, and a plurality of sheet patterns spaced apart from the lower pattern in a second direction perpendicular to the first direction, a plurality of gate structures on the lower pattern to be spaced apart from each other in the first direction and including a gate electrode and a gate insulating film wrapping the plurality of sheet patterns, a source/drain recess defined between the gate structures adjacent to each other, and a source/drain pattern inside the source/drain recess and including a semiconductor blocking film formed continuously along the source/drain recess, wherein the source/drain recesses include a plurality of width extension regions, and a width of each of the width extension regions in the first direction increases and then decreases, as it goes away from an upper surface of the lower pattern.

Abstract: A semiconductor device includes an active pattern which includes a lower pattern, and a sheet pattern that is spaced apart from the lower pattern in a first direction, a gate structure on the lower pattern that includes a gate electrode that surrounds the sheet pattern, the gate electrode extending in a second direction that is perpendicular to the first direction, and a source/drain pattern on the lower pattern and in contact with the sheet pattern. A contact surface between the sheet pattern and the source/drain pattern has a first width in the second direction, and the sheet pattern has a second width in the second direction that is greater than the first width.