Patents by Inventor Shih-Chung Chen
Shih-Chung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11967596Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.Type: GrantFiled: August 5, 2021Date of Patent: April 23, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Guo-Huei Wu, Shih-Wei Peng, Wei-Cheng Lin, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien, Lee-Chung Lu
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Patent number: 11966077Abstract: A light emission apparatus includes a laser diode configured to emit a light; a laser driver electrically coupled to the laser diode, the laser driver being configured to drive the laser diode to generate the light; and an optical module arranged to receive the light emitted by the laser diode, the optical module comprising at least one optical element and being configured to adjust the light and emits a transmitting light; wherein the transmitting light emits from the optical module with an illumination angle and the optical module adjusts the light to vary the illumination angle.Type: GrantFiled: July 8, 2019Date of Patent: April 23, 2024Assignee: Artilux, Inc.Inventors: Yun-Chung Na, Chien-Lung Chen, Chieh-Ting Lin, Yu-Yi Hsu, Hui-Wen Chen, Bo-Jiun Chen, Shih-Tai Chuang
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Publication number: 20240128151Abstract: A package structure includes a bonding substrate, an integrated circuit, and a heat sink metal. The integrated circuit includes an active region facing the bonding substrate. The heat sink metal is located between the bonding substrate and the active region of the integrated circuit. The heat sink metal is electrically insulated with the integrated circuit.Type: ApplicationFiled: October 16, 2023Publication date: April 18, 2024Inventors: Chun-Yen PENG, Kuo-Bin HONG, Shih-Chen CHEN, Hao-Chung KUO
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Publication number: 20240105444Abstract: Methods for reducing contact resistance include performing a selective titanium silicide (TiSi) deposition process on a middle of the line (MOL) contact structure that includes a cavity in a substrate of dielectric material. The contact structure also includes a silicon-based connection portion at a bottom of the cavity. The selective TiSi deposition process is selective to silicon-based material over dielectric material. The methods also include performing a selective deposition process of a metal material on the MOL contact structure. The selective deposition process is selective to TiSi material over dielectric material and forms a silicide capping layer on the silicon-based connection portion. The methods further include performing a seed layer deposition process of the metal material on the contact structure.Type: ApplicationFiled: April 26, 2023Publication date: March 28, 2024Inventors: Jiang LU, Liqi WU, Wei DOU, Weifeng YE, Shih Chung CHEN, Rongjun WANG, Xianmin TANG, Yiyang WAN, Shumao ZHANG, Jianqiu GUO
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Publication number: 20240088154Abstract: The present disclosure relates to an integrated circuit (IC) that includes a boundary region defined between a low voltage region and a high voltage region, and a method of formation. In some embodiments, the integrated circuit comprises an isolation structure disposed in the boundary region of the substrate. A first polysilicon component is disposed directly on an upper surface of the substrate alongside the isolation structure. A boundary dielectric layer is disposed on the isolation structure. A second polysilicon component is disposed on the sacrifice dielectric layer.Type: ApplicationFiled: November 21, 2023Publication date: March 14, 2024Inventors: Yi-Huan Chen, Chien-Chih Chou, Alexander Kalnitsky, Kong-Beng Thei, Ming Chyi Liu, Shih-Chung Hsiao, Jhih-Bin Chen
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Publication number: 20240079536Abstract: A display device includes a first substrate, a plurality of light-emitting diodes, a first wavelength conversion layer and a metasurface. The light-emitting diodes are arranged on the first substrate, in which the light-emitting diodes emit a first color light, and the light-emitting diodes includes a first light-emitting diode, a second light-emitting diode and a third light-emitting diode. The first wavelength conversion layer is on the first light-emitting diode, and configured to convert the first color light emitted from the first light-emitting diode into a second color light, in which the second color light is different from the first color light. The metasurface is above the first wavelength conversion layer, and configured to reflect the first color light and pass the second color light.Type: ApplicationFiled: August 14, 2023Publication date: March 7, 2024Inventors: Yu-Heng HONG, Shih-Chen CHEN, Hao-Chung KUO
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Patent number: 11919126Abstract: In an embodiment, a chemical mechanical planarization (CMP) system includes: a monolithic platen within a platen housing, wherein the monolithic platen is formed of a single piece of material, wherein the monolithic platen includes: a first portion within a first opening, and a second portion within a second opening, wherein the first portion has a different diameter than the second portion; and a polishing fluid delivery module above the monolithic platen, wherein the polishing fluid delivery module is configured to deliver slurry to the monolithic platen during performance of CMP.Type: GrantFiled: May 12, 2021Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tsung-Lung Lai, Cheng-Ping Chen, Shih-Chung Chen, Sheng-Tai Peng
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Publication number: 20240038833Abstract: Memory devices and methods of forming memory devices are described. Methods of forming electronic devices are described where carbon is used as the removable mold material for the formation of a DRAM capacitor. A dense, high-temperature (500° C. or greater) PECVD carbon material is used as the removable mold material, e.g., the core material, instead of oxide. The carbon material can be removed by isotropic etching with exposure to radicals of oxygen (O2), nitrogen (N2), hydrogen (H2), ammonia (NH3), and combinations thereof.Type: ApplicationFiled: July 14, 2023Publication date: February 1, 2024Applicant: Applied Materials, Inc.Inventors: Fredrick Fishburn, Tomohiko Kitajima, Qian Fu, Srinivas Guggilla, Hang Yu, Jun Feng, Shih Chung Chen, Lakmal C. Kalutarage, Jayden Potter, Karthik Janakiraman, Deenesh Padhi, Yifeng Zhou, Yufeng Jiang, Sung-Kwan Kang
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Patent number: 11888045Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-? dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium lanthanum nitride (TiLaN), titanium yttrium nitride (TiYN), titanium strontium nitride (TiSrN), titanium magnesium nitriride (TiMgN, titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), hafnium carbide (HfC), hafnium nitride (HfN), hafnium oxynitride (HfON), hafnium oxycarbide (HfOC), hafnium carbide aluminum (HfCAl), hafnium aluminum nitride (HfAlN), or hafnium carbonitride (HfCN).Type: GrantFiled: December 21, 2021Date of Patent: January 30, 2024Assignee: Applied Materials, Inc.Inventors: Yongjing Lin, Karla M Bernal Ramos, Luping Li, Shih Chung Chen, Jacqueline S. Wrench, Yixiong Yang, Steven C. H. Hung, Srinivas Gandikota, Naomi Yoshida, Lin Dong
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Publication number: 20230313378Abstract: Substrate support, substrate support assemblies and process chambers comprising same are described. The substrate support has a thermally conductive body with a top surface, a bottom surface and an outer edge, and a plurality of long edge purge channel outlet opening at the outer edge of the thermally conductive body. The substrate support is configured to support a substrate to be processed on a top surface of the substrate support. The top surface of the thermally conductive body may have a ceramic coating. Each of the plurality of purge channel outlet is in fluid communication with a long edge purge channel. The long edge purge channel is coated with a long edge purge channel coating. A substrate support assembly includes the substrate support and the support post coupled to the substrate support. The processing chamber include a chamber body and the substrate support within the chamber body.Type: ApplicationFiled: March 31, 2022Publication date: October 5, 2023Applicant: Applied Materials, Inc.Inventors: Yongjing Lin, Lei Zhou, Muhannad Mustafa, Shih Chung Chen, Zhihui Liu, Chi-Chou Lin, Bin Cao, Janardhan Devrajan, Mario D. Silvetti, Mandyam Sriram
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Patent number: 11776980Abstract: Methods and apparatus for forming reflector films are described A liner is formed on a substrate surface followed by formation of the reflector layer so that there is no oxygen exposure between liner and reflector layer formation. In some embodiments, a high aspect ratio structure is filled with a reflector material by partially filling the structure with the reflector material while growth is inhibited at a top portion of the structure, reactivating the top portion of the substrate and then filling the structure with the reflector material.Type: GrantFiled: March 13, 2020Date of Patent: October 3, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Luping Li, Jacqueline S. Wrench, Wen Ting Chen, Yixiong Yang, In Seok Hwang, Shih Chung Chen, Srinivas Gandikota
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Publication number: 20230295803Abstract: Methods of forming metal-containing films for electronic devices (e.g., logic devices and/or memory devices) and methods for reducing equivalent oxide thickness (EOT) penalty in electronic devices are disclosed. The methods comprise exposing a substrate surface to a metal precursor, such as titanium chloride (TiCl4), a reducing agent, such as a cyclic 1,4-diene, and a reactant, ammonia (NH3), either simultaneously, partially simultaneously or separately and sequentially to form the metal-containing film.Type: ApplicationFiled: April 14, 2023Publication date: September 21, 2023Applicant: Applied Materials, Inc.Inventors: Haoming Yan, Shih Chung Chen, Mandyam Sriram, EunKee Hong, Janardhan Devrajan, Lakmal C. Kalutarage, Yongjing Lin, Lisa Michelle Mandrell, Arkaprava Dan
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Publication number: 20230253466Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-? dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAIN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAIC).Type: ApplicationFiled: April 3, 2023Publication date: August 10, 2023Applicant: Applied Materials, Inc.Inventors: Yongjing Lin, Karla M Bernal Ramos, Shih Chung Chen, Yixiong Yang, Lin Dong, Steven C.H. Hung, Srinivas Gandikota
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Publication number: 20230234184Abstract: A polishing pad conditioning apparatus includes a base, a fiber, and a polymer protruding from a surface of the base and encompassing the fiber.Type: ApplicationFiled: April 3, 2023Publication date: July 27, 2023Inventors: Cheng-Ping CHEN, Shih-Chung CHEN, Sheng-Tai PENG, Hung-Lin CHEN
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Publication number: 20230193463Abstract: Gas distribution apparatuses, e.g., showerheads, comprise passages having a first conical bore section, a small bore section, and a second conical bore section. The first conical bore sections comprise a first non-perpendicular wall angle relative to a back surface of a faceplate. The second conical bore sections comprise a second non-perpendicular angle to a front surface of the faceplate. The conical sections including non-perpendicular angles are effective to mitigate and/or eliminate changes in flow parameters through the passages after bead blast processes.Type: ApplicationFiled: December 14, 2022Publication date: June 22, 2023Applicant: Applied Materials, Inc.Inventors: Shashidhara Patel H B, Madhuri Kalva, Sreenivasa Rao Nunna, Shih Chung Chen, Yongjing Lin, Bin Cao
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Patent number: 11658218Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-? dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAlC).Type: GrantFiled: February 10, 2022Date of Patent: May 23, 2023Assignee: Applied Materials, Inc.Inventors: Yongjing Lin, Karla M Bernal Ramos, Shih Chung Chen, Yixiong Yang, Lin Dong, Steven C. H. Hung, Srinivas Gandikota
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Publication number: 20230133331Abstract: The present disclosure provides a chemical mechanical polishing system having a unitary platen. The platen includes one or more recesses within the platen to house various components for the polishing/planarization process. In one embodiment, the platen includes a first recess and a second recess. The first recess is located under the second recess. An end point detector is placed in the first recess and a detector cover may be placed in the second recess. A sealing mean is provided in a space between the end point detector and the detector cover to prevent any external or foreign materials from coming in contact with the end point detector. A fastener used for fastening the detector cover to the platen also provides addition protection to prevent foreign materials from coming in contact with components received in the recesses.Type: ApplicationFiled: January 3, 2023Publication date: May 4, 2023Inventors: Tsung-Lung Lai, Cheng-Ping Chen, Shih-Chung Chen, Sheng-Tai Peng, Rong-Long Hung
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Publication number: 20230113514Abstract: Processing methods described herein comprise forming a metal gate film on a narrow feature and a wide feature and depositing a hard mask on the metal gate film. The hard mask forms on the metal gate film at a top, bottom and sidewalls of the wide feature and on a top of the narrow feature to cover the metal gate film. Some processing methods comprise oxidizing the metal gate film on the narrow feature to convert a portion of the metal gate film to a metal oxide film. Some processing methods comprise etching the metal oxide film from the narrow feature to leave a gradient etch profile. Some processing methods comprise filling the narrow feature and the wide feature with a gap fill material comprising one or more of a metal nitride, titanium nitride (TiN) or titanium oxynitride (TiON), the gap fill material substantially free of seams and voids.Type: ApplicationFiled: December 3, 2021Publication date: April 13, 2023Applicant: Applied Materials, Inc.Inventors: Shih Chung Chen, Yongjing Lin, Chi-Chou Lin, Zhiyong Wang, Chih-Hsun Hsu, Mandyam Sriram, Tza-Jing Gung
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Patent number: 11618126Abstract: A polishing pad conditioning apparatus includes a base, a fiber, and a polymer protruding from a surface of the base and encompassing the fiber.Type: GrantFiled: July 6, 2020Date of Patent: April 4, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITEDInventors: Cheng-Ping Chen, Shih-Chung Chen, Sheng-Tai Peng, Hung-Lin Chen
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Patent number: 11571782Abstract: The present disclosure provides a chemical mechanical polishing system having a unitary platen. The platen includes one or more recesses within the platen to house various components for the polishing/planarization process. In one embodiment, the platen includes a first recess and a second recess. The first recess is located under the second recess. An end point detector is placed in the first recess and a detector cover may be placed in the second recess. A sealing mean is provided in a space between the end point detector and the detector cover to prevent any external or foreign materials from coming in contact with the end point detector. A fastener used for fastening the detector cover to the platen also provides addition protection to prevent foreign materials from coming in contact with components received in the recesses.Type: GrantFiled: November 1, 2019Date of Patent: February 7, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Tsung-Lung Lai, Cheng-Ping Chen, Shih-Chung Chen, Sheng-Tai Peng, Rong-Long Hung