Abstract: A pattern of features of an integrated circuit is provided. A configuration of a pupil of an extreme ultraviolet wavelength radiation beam (also referred to as an illumination mode), is selected. The selected configuration is an asymmetric, single pole configuration. At least one disparity is determined between a simulated imaging using the selected configuration and a designed imaging for the pattern of features. A parameter (also referred to as a compensation parameter) is then modified to address the at least one disparity, wherein the parameter at least one a design feature, a mask feature, and a lithography process parameter. A substrate is then exposed to the pattern of features using the selected configuration and the modified parameter.

Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A dielectric layer is formed over a substrate. An interlayer is formed over the dielectric layer. A first photoresist layer with a first opening is formed over the interlayer and a second photoresist layer having a second opening is formed over the first photoresist layer. Spacers are formed along sidewalls of the first opening and the second opening. A first trench is formed in the interlayer by using the spacer along the first opening as an etch mask. A second trench is formed in the interlayer by using the spacer along the second opening as an etch mask. The first trench and the second trench are extended down into the dielectric layer as a lower portion and an upper portion, respectively, of a dielectric trench.

Abstract: The present disclosure provides a method that includes forming a first patternable material layer on a substrate; forming a second patternable material layer over the first patternable material layer; and performing a charged particle beam lithography exposure process to the first patternable material layer and the second patternable material layer, thereby forming a first latent feature in the first patternable material layer.

Abstract: The present disclosure provides a photolithography mask. The photolithography mask includes a substrate that contains a low thermal expansion material (LTEM). A reflective structure is disposed over the substrate. A capping layer is disposed over the reflective structure. An absorber layer is disposed over the capping layer. The absorber layer contains a material that has a refractive index in a range from about 0.95 to about 1.01 and an extinction coefficient greater than about 0.03.

Abstract: An extreme ultraviolet lithography (EUVL) process is disclosed. The process comprises receiving a mask. The mask includes a low thermal expansion material (LTEM) substrate, a reflective multilayer (ML) over one surface of the LTEM substrate, a first region having a phase-shifting layer over the reflective ML, and a second region having no phase-shifting layer over the reflective ML. The EUVL process also comprises exposing the mask by a nearly on-axis illumination with partial coherence less than 0.3 to produce diffracted light and non-diffracted light, removing at least a portion of the non-diffracted light, and collecting and directing the diffracted light and the not removed non-diffracted light by a projection optics box (POB) to expose a target.

Abstract: The present disclosure provides one embodiment of a mask for a lithography exposure process. The mask includes a mask substrate; a first mask material layer patterned to have a first plurality of openings that define a first layer pattern; and a second mask material layer patterned to have a second plurality of openings that define a second layer pattern.

Abstract: The present disclosure relates to an extreme ultraviolet (EUV) pellicle having a pellicle film connected to a pellicle frame. In some embodiments, the EUV pellicle has a substrate, and an adhesive material disposed onto the substrate. A pellicle frame is connected to the substrate by way of the adhesive material. The pellicle frame is configured to mount the substrate to an extreme ultraviolet (EUV) reticle.

Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A first layer is deposited over a substrate. A plurality of mandrels is formed over the first layer. Guiding-spacers are formed along sidewalls of the mandrels. Then the mandrels are removed. A neutral layer (NL) and a block copolymer (BCP) layer are deposited over the first layer and the guiding-spacers. A anneal is applied to the BCP layer to form a first polymer nanostructure between the guiding-spacers and being surrounded by a second polymer nanostructure. The first polymer nanostructures locate at a same distance from the first layer. Polymer nano-blocks are formed by selectively etching the second polymer nanostructure and the NL. By using the polymer nano-blocks and the guiding spacer as etch masks, the first layer is etched to form openings. The substrate is etched through the openings to form substrate trench and substrate fin.

Abstract: The present disclosure provides one embodiment of a mask for a lithography exposure process. The mask includes a mask substrate; a first mask material layer patterned to have a first plurality of openings that define a first layer pattern; and a second mask material layer patterned to have a second plurality of openings that define a second layer pattern.

Abstract: An extreme ultraviolet (EUV) mask comprises a substrate, a first reflective layer above a surface of the substrate, and a second reflective layer over the first reflective layer. The second reflective layer has various openings that define a first state and a second state. The first state includes the first reflective layer and is free of the second reflective layer. The second state includes both the first and second reflective layers. The first state has a first reflection coefficient and a first reflectivity. The second state has a second reflection coefficient and a second reflectivity. A phase difference between the first and second reflection coefficients is about 180 degrees.

Abstract: A reflective mask includes a substrate; a reflective multilayer formed on the substrate; an absorber layer formed on the reflective multilayer, wherein the absorber layer is patterned to have openings according to an integrated circuit layout; and a protection layer formed over the reflective multilayer within the openings.

Abstract: The present disclosure provides one embodiment of a method for extreme ultraviolet lithography (EUVL) process. The method includes loading a mask to a lithography system. The mask includes defect-repaired regions and defines an integrated circuit (IC) pattern thereon. The method also includes setting an illuminator of the lithography system in an illumination mode according to the IC pattern, configuring a pupil filter in the lithography system according to the illumination mode and performing a lithography exposure process to a target with the mask and the pupil filter by the lithography system in the illumination mode.

Abstract: Embodiments of EUV photomasks and methods for forming a EUV photomask are provided. The method comprises providing a substrate, a reflective layer, a capping layer, a hard mask layer, and forming an opening therein. An absorber layer is then filled in the opening and over the top surface of the hard mask layer. A removing process is provided to form an absorber with a top surface lower than a top surface of the capping layer.

Abstract: An extreme ultraviolet (EUV) mask comprises a substrate, a first reflective layer above a surface of the substrate, and a second reflective layer over the first reflective layer. The second reflective layer has various openings that define a first state and a second state. The first state includes the first reflective layer and is free of the second reflective layer. The second state includes both the first and second reflective layers. The first state has a first reflection coefficient and a first reflectivity. The second state has a second reflection coefficient and a second reflectivity. A phase difference between the first and second reflection coefficients is about 180 degrees.

Abstract: A method and system for adjusting exposure intensity to reduce unwanted lithographic effects is disclosed. In some exemplary embodiments, the method of photolithography includes receiving a mask and a workpiece. An orientation of an illumination pattern relative to the mask is determined, and an intensity profile of the illumination pattern is adjusted according to the orientation. The mask is exposed to radiation according to the illumination pattern and the intensity profile. Radiation resulting from the exposing of the mask is utilized to expose the workpiece. In some such embodiments, the intensity profile includes an intensity that varies across an illuminated region of the illumination pattern.

Abstract: The present disclosure provides a method that includes forming a first patternable material layer on a substrate; forming a second patternable material layer over the first patternable material layer; and performing a charged particle beam lithography exposure process to the first patternable material layer and the second patternable material layer, thereby forming a first latent feature in the first patternable material layer.

Abstract: A mask, method of fabricating same, and method of using same are disclosed. In an example, a mask includes a substrate and a reflective multilayer coating deposited over the substrate. The reflective multilayer coating is formed by positioning the substrate such that an angle ? is formed between a normal line of the substrate and particles landing on the substrate and rotating the substrate about an axis that is parallel with a landing direction of the particles. In an example, reflective multilayer coating includes a first layer and a second layer deposited over the first layer. A phase defect region of the reflective multilayer coating includes a first deformation in the first layer at a first location, and a second deformation in the second layer at a second location, the second location laterally displaced from the first location.

Abstract: A photolithographic technique includes receiving a mask having a printing feature region, a sub-resolution assist feature (SRAF) region, and a third region. Each region has a different thickness of an absorptive layer disposed therein. The technique also includes exposing the mask to radiation, such that an intensity of radiation reflected by the SRAF region is substantially between an intensity of radiation reflected by the printing feature region and an intensity of radiation reflected by the third region. Using the radiation reflected by the printing feature region, the radiation reflected by the SRAF region, and the radiation reflected by the third region a workpiece is exposed.

Abstract: The present disclosure provides a photolithography mask. The photolithography mask includes a substrate that contains a low thermal expansion material (LTEM). A multilayer (ML) structure is disposed over the substrate. The ML structure is configured to reflect radiation. The ML structure contains a plurality of interleaving film pairs. Each film pair includes a first film and a second film. The first film and the second film have different material compositions. Each film pair has a respective thickness. For at least a subset of the plurality of the film pairs, the respective thicknesses of the film pairs change randomly along a predefined direction.

Abstract: The present disclosure provides a method for extreme ultraviolet lithography (EUVL) process. The method includes loading a binary phase mask (BPM) to a lithography system, wherein the BPM includes two phase states and defines an integrated circuit (IC) pattern thereon; setting an illuminator of the lithography system in an illumination mode according to the IC pattern; configuring a pupil filter in the lithography system according to the illumination mode; and performing a lithography exposure process to a target with the BPM and the pupil filter by the lithography system in the illumination mode.