Patents by Inventor Shinn-Sheng Yu

Shinn-Sheng Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160223899
    Abstract: A mask for extreme ultraviolet lithography (EUVL) is disclosed. The mask includes a low thermal expansion material (LTEM) layer; and a reflective multilayer (ML) above one surface of the LTEM layer, wherein the reflective ML has a first thickness in a first reflective region and a second thickness in a second reflective region, wherein the second thickness is different from the first thickness.
    Type: Application
    Filed: April 7, 2016
    Publication date: August 4, 2016
    Inventors: CHIH-TSUNG SHIH, SHINN-SHENG YU, JENG-HORNG CHEN, ANTHONY YEN
  • Patent number: 9405195
    Abstract: The present disclosure provides a method that includes forming a first patternable material layer on a substrate; forming a second patternable material layer over the first patternable material layer; and performing a charged particle beam lithography exposure process to the first patternable material layer and the second patternable material layer, thereby forming a first latent feature in the first patternable material layer and a second latent feature in the second patternable material layer.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: August 2, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Chih-Tsung Shih, Jeng-Horng Chen, Shinn-Sheng Yu, Anthony Yen
  • Publication number: 20160209757
    Abstract: A lithography process in a lithography system includes loading a mask that includes two mask states defining an integrated circuit (IC) pattern. The IC pattern includes a plurality of main polygons, wherein adjacent main polygons are assigned to different mask states; and a background includes a field in one of the mask states and a plurality of sub-resolution polygons in another of the two mask states. The lithography process further includes configuring an illuminator to generate an illuminating pattern on an illumination pupil plane of the lithography system; configuring a pupil filter on a projection pupil plane of the lithography system with a filtering pattern determined according to the illumination pattern; and performing an exposure process to a target with the illuminator, the mask, and the pupil filter. The exposure process produces diffracted light and non-diffracted light behind the mask and the pupil filter removes most of the non-diffracted light.
    Type: Application
    Filed: June 6, 2014
    Publication date: July 21, 2016
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Anthony Yen
  • Publication number: 20160195812
    Abstract: A photolithographic technique includes receiving a mask having a printing feature region, a sub-resolution assist feature (SRAF) region, and a third region. Each region has a different thickness of an absorptive layer disposed therein. The technique also includes exposing the mask to radiation, such that an intensity of radiation reflected by the SRAF region is substantially between an intensity of radiation reflected by the printing feature region and an intensity of radiation reflected by the third region. Using the radiation reflected by the printing feature region, the radiation reflected by the SRAF region, and the radiation reflected by the third region a workpiece is exposed.
    Type: Application
    Filed: March 14, 2016
    Publication date: July 7, 2016
    Inventors: TAO-MIN HUANG, CHIA-JEN CHEN, HSIN-CHANG LEE, CHIH-TSUNG SHIH, SHINN-SHENG YU, JENG-HORNG CHEN, ANTHONY YEN
  • Patent number: 9377696
    Abstract: A system of an extreme ultraviolet lithography (EUVL) is disclosed. The system includes an extreme ultraviolet (EUV) mask with three states. A reflection coefficient is r1, r2 and r3, respectively, wherein r3 is close to (r1+r2)/2. The system also includes a nearly on-axis illumination (ONI) with partial coherence ? less than 0.3 to expose the EUV mask to produce diffracted light and non-diffracted light, removing most of the non-diffracted light, and collecting and directing the diffracted light and the not removed non-diffracted light by a projection optics box (POB) to expose a target.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: June 28, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9377693
    Abstract: The present disclosure provides an extreme ultraviolet (EUV) radiation source module. The EUV radiation source module includes a collector designed to collect and reflect EUV light; a solid cover integrated with the collector and configured to have a supply gap between the collector and the solid cover; and a gas pipeline integrated with the collector. The supply gap provides a path for gas flow to the radiation source at edge of the collector. The gas pipeline includes an inward entrance and an outward entrance.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: June 28, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Ching Huang, Tsung-Yu Chen, Chia-Hao Hsu, Shinn-Sheng Yu, Chia-Chen Chen
  • Publication number: 20160172196
    Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A a dielectric layer is formed over a substrate. An interlayer is formed over the dielectric layer. A first photoresist layer with a first opening is formed over the interlayer and a second photoresist layer having a second opening is formed over the first photoresist layer. Spacers are formed along sidewalls of the first opening and the second opening. A first trench is formed in the interlayer by using the spacer along the first opening as an etch mask. A second trench is formed in the interlayer by using the spacer along the second opening as an etch mask. The first trench and the second trench are extended down into the dielectric layer as a lower portion and an upper portion, respectively, of a dielectric trench.
    Type: Application
    Filed: February 8, 2016
    Publication date: June 16, 2016
    Inventors: Chung-Ju LEE, Chih-Tsung SHIH, Jeng-Horng CHEN, Shinn-Sheng YU, Tsung-Min HUANG, Anthony YEN
  • Publication number: 20160161839
    Abstract: A method of forming a mask for semiconductor fabrication is disclosed. The method includes providing a substrate and forming a first reflective layer over the substrate, wherein the first reflective layer comprises pairs of alternating materials. The method further includes forming a buffer layer over the first reflective layer and forming a second reflective layer over the buffer layer. The second reflective layer has a total thickness less than 90 nanometer (nm). The method further includes patterning the second reflective layer to form a first state and a second state of the mask. A first reflection coefficient of the first state and a second reflection coefficient of the second state have a phase difference of about 180 degrees.
    Type: Application
    Filed: February 15, 2016
    Publication date: June 9, 2016
    Inventors: YEN-CHENG LU, SHINN-SHENG YU, JENG-HORNG CHEN, ANTHONY YEN
  • Patent number: 9354507
    Abstract: The present disclosure is directed towards an extreme ultraviolet (EUV) mask. The EUV mask includes a low thermal expansion material (LTEM) substrate. The EUV mask has a first region and a second region. The EUV mask also includes a structure disposed in the first region. The structure has a multiple facets with an angle to each other. The EUV mask also includes a conformal reflective multilayer (ML) disposed over the structure in the first region and over the LTEM substrate in the second region. The conformal reflective ML has a similar surface profile as the structure in the first region and a flat surface profile in the second region.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: May 31, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Tsung Shih, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Publication number: 20160147137
    Abstract: The present disclosure provides a method in accordance with some embodiments. A wafer is grinded from a back side. The wafer is inserted into an opening defined by a frame holder. The frame holder is attached to a carrier through a temporary layer. A front side of the wafer is attached to the temporary layer. Thereafter, the wafer is etched from the back side until the wafer reaches a predetermined thickness. Thereafter, the frame holder and the wafer therein are separated from the temporary layer and the carrier.
    Type: Application
    Filed: July 15, 2015
    Publication date: May 26, 2016
    Inventors: Chih-Tsung Shih, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Publication number: 20160147138
    Abstract: The present disclosure provides a photolithography mask. The photolithography mask includes a substrate that contains a low thermal expansion material (LTEM). A reflective structure is disposed over the substrate. A capping layer is disposed over the reflective structure. An absorber layer is disposed over the capping layer. The absorber layer contains a material that has a refractive index in a range from about 0.95 to about 1.01 and an extinction coefficient greater than about 0.03.
    Type: Application
    Filed: June 11, 2015
    Publication date: May 26, 2016
    Inventors: Chih-Tsung Shih, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Publication number: 20160124297
    Abstract: The present disclosure also provides a photolithography mask. The photolithography mask includes a substrate that contains a low thermal expansion material (LTEM). A reflective structure is disposed over the substrate. A capping layer is disposed over the reflective structure. An absorber layer is disposed over the capping layer. The absorber layer contains an indium tin oxide (ITO) material. In some embodiments, the ITO material has a SnO6 crystalline structure.
    Type: Application
    Filed: October 31, 2014
    Publication date: May 5, 2016
    Inventors: Yi-Ling Hsieh, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Publication number: 20160109798
    Abstract: The present disclosure relates to a method of forming an extreme ultraviolet (EUV) pellicle having an pellicle film connected to a pellicle frame without a supportive mesh, and an associated apparatus. In some embodiments, the method is performed by forming a cleaving plane within a substrate. A pellicle frame is attached to an upper surface of the substrate, and the substrate is cleaved along the cleaving plane to form a pellicle film attached to the pellicle frame. The method forms the pellicle without using a support structure, which may block EUV radiation and cause substantial non-uniformities in the intensity of EUV radiation incident on an EUV reticle.
    Type: Application
    Filed: December 28, 2015
    Publication date: April 21, 2016
    Inventors: Chih-Tsung Shih, Tien-Hsi Lee, Chia-Jen Chen, Shang-Chieh Chien, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9316900
    Abstract: A system of an extreme ultraviolet lithography (EUVL) is disclosed. The system includes a mask having first and second reflective regions. The system also includes an illumination to expose the mask to produce a resultant reflected light form the mask. The resultant reflected light is constructed by a first reflected light reflected from the first reflective region and a second reflected light reflected from the second reflective region. The resultant reflected light contains mainly diffracted light. The system also includes a projection optics box (POB) to collect and direct resultant reflected light to expose a target.
    Type: Grant
    Filed: October 11, 2013
    Date of Patent: April 19, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Tsung Shih, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9304390
    Abstract: A system and process of an extreme ultraviolet lithography (EUVL) is disclosed. The system and process includes receiving a mask with two states, which have 180 degree phase difference to each other. These different states are assigned to adjacent main polygons and adjacent assist polygons of the mask. A nearly on-axis illumination (ONI) with partial coherence ? less than 0.3 is utilized to expose the mask to produce diffracted lights and non-diffracted lights. A majority portion of the non-diffracted lights and diffracted light with diffraction order higher than 1 are removed. Diffracted light having +1-st and ?1-st diffracted order are collected and directed by a projection optics box (POB) to expose a target.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: April 5, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9285673
    Abstract: A photomask having a partial-thickness assist feature and a technique for manufacturing the photomask are disclosed. In an exemplary embodiment, the photomask includes a mask substrate, a reflective structure disposed on the mask substrate, and an absorptive layer formed on the reflective structure. A printing feature region and an assist feature region are defined on the mask. The absorptive layer has a first thickness in the printing feature region and a second thickness in the assist feature region that is different from the first thickness. In some such embodiments, the second thickness is configured such that radiation reflected by the assist feature region does not exceed an exposure threshold of a photoresist of a target.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: March 15, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tao-Min Huang, Chia-Jen Chen, Hsin-Chang Lee, Chih-Tsung Shih, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9285671
    Abstract: A mask, or photomask, is used in lithography systems and processes. The mask includes a first polygon of a first state and a second polygon of a second state. The mask also includes a field of the first state and a third polygon of the second state, and in the field. The first and second states are different, and the first and second polygons are located outside of the field.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: March 15, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Anthony Yen
  • Patent number: 9280046
    Abstract: A method for fabricating an extreme ultraviolet (EUV) mask includes providing a low thermal expansion material (LTEM) layer. A reflective multiple-layer (ML) is deposited over the LTEM layer. A flowable-photosensitive-absorption-layer (FPhAL) is spin coated over the reflective ML. The FPhAL is patterned by a lithography process to form a patterned absorption layer.
    Type: Grant
    Filed: October 11, 2013
    Date of Patent: March 8, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Anthony Yen, Chih-Tsung Shih, Ming-Jiun Yao, Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Hsin-Chang Lee
  • Publication number: 20160064240
    Abstract: A method includes forming a resist over a substrate, resulting in a layer of resist scum between the resist and the substrate. The method further includes forming trenches in the resist, wherein at least a portion of the layer of resist scum remains between the trenches and the substrate. The method further includes forming a first material layer in the trenches, wherein the first material layer has a higher etch resistance than the resist in an etching process. The method further includes performing the etching process to the first material layer, the resist, and the layer of resist scum, thereby forming a patterned first material layer over a patterned layer of resist scum over the substrate.
    Type: Application
    Filed: November 6, 2015
    Publication date: March 3, 2016
    Inventors: Tsung-Min Huang, Chien-Han Wu, Chung-Ju Lee, Chih-Tsung Shih, Jeng-Horng Chen, Shinn-Sheng Yu
  • Publication number: 20160064239
    Abstract: Provided is a method of patterning a substrate. The method includes patterning a resist layer formed over the substrate to result in a resist pattern and treating the resist pattern with an ion beam. The ion beam is generated with a gas, such as CH4, SiH4, Ar, or He; and is directed towards the resist pattern at a tilt angle at least 10 degrees. In embodiments, the ion beam is directed towards the resist pattern at a uniform twist angle, or at a twist angle having a unimodal or bimodal distribution. The ion beam reduces line edge roughness (LER), line width roughness (LWR), and/or critical dimension of the resist pattern. The method further includes etching the substrate with the treated resist pattern as an etch mask.
    Type: Application
    Filed: March 11, 2015
    Publication date: March 3, 2016
    Inventors: Chih-Tsung Shih, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen