Abstract: A low EUV reflectivity mask includes a low thermal expansion material (LTEM) layer, a low EUV reflectivity (LEUVR) multilayer over the LTEM layer in a first region, a high EUV reflectivity (HEUVR) multilayer over the LTEM layer in a second region and a patterned absorption layer over the LEUVR multilayer and the HEUVR multilayer.

Abstract: A system of an extreme ultraviolet lithography (EUVL) is disclosed. The system includes a mask having reflective phase-shift-grating-blocks (PhSGBs). The system also includes an illumination to expose the mask to produce a resultant reflected light from the mask. The resultant reflected light contains mainly diffracted lights. The system also has projection optics to collect and direct resultant reflected light to expose a target.

Abstract: An extreme ultraviolet lithography (EUVL) process is performed on a target, such as a semiconductor wafer, having a photosensitive layer. The method includes providing a one-dimensional patterned mask along a first direction. The patterned mask includes a substrate including a first region and a second region, a multilayer mirror above the first and second regions, an absorption layer above the multilayer mirror in the second region, and a defect in the first region. The method further includes exposing the patterned mask by an illuminator and setting the patterned mask and the target in relative motion along the first direction while exposing the patterned mask. As a result, an accumulated exposure dose received by the target is an optimized exposure dose.

Abstract: The present disclosure provides a method for extreme ultraviolet lithography (EUVL) process. The method includes loading a binary phase mask (BPM) to a lithography system, wherein the BPM includes two phase states and defines an integrated circuit (IC) pattern thereon; setting an illuminator of the lithography system in an illumination mode according to the IC pattern; configuring a pupil filter in the lithography system according to the illumination mode; and performing a lithography exposure process to a target with the BPM and the pupil filter by the lithography system in the illumination mode.

Abstract: A system of an extreme ultraviolet lithography (EUVL) is disclosed. The system includes a mask having first and second reflective regions. The system also includes an illumination to expose the mask to produce a resultant reflected light form the mask. The resultant reflected light is constructed by a first reflected light reflected from the first reflective region and a second reflected light reflected from the second reflective region. The resultant reflected light contains mainly diffracted light. The system also a projection optics box (POB) to collect and direct resultant reflected light to expose a target.

Abstract: A reflective mask is described. The mask includes a low thermal expansion material (LTEM) substrate, a conductive layer deposited on a first surface of the LTEM substrate, a stack of reflective multilayers (ML) deposited on a second surface of the LTEM substrate, a capping layer deposited on the stack of reflective ML, a first absorption layer deposited on the first capping layer, a main pattern, and a border ditch. The border ditch reaches to the capping layer, a second absorption layer deposited inside the border ditch, and where the second absorption layer contacts the capping layer. In some instances, the border ditch crosses the capping layer and partially enters the reflective multilayer.

Abstract: A system of an extreme ultraviolet lithography (EUVL) is disclosed. The system includes an extreme ultraviolet (EUV) mask with three states. A reflection coefficient is r1, r2 and r3, respectively, wherein r3 is close to (r1+r2)/2. The system also includes a nearly on-axis illumination (ONI) with partial coherence a less than 0.3 to expose the EUV mask to produce diffracted light and non-diffracted light, removing most of the non-diffracted light, and collecting and directing the diffracted light and the not removed non-diffracted light by a projection optics box (POB) to expose a target.

Abstract: A system of an extreme ultraviolet lithography (EUVL) is disclosed. an extreme ultraviolet lithography (EUVL) system includes an extreme ultraviolet (EUV) reflection-type mask having a patterned flare-suppressing-by-phase-shifting (FSbPhS) layer disposed over a patterned absorption layer. The system also includes a radiation to expose the EUV mask and a projection optics box (POB) to collect and direct the radiation that reflects from the EUV mask to expose a target.

Abstract: A system and process of an extreme ultraviolet lithography (EUVL) is disclosed. An EUVL process includes receiving a mask pair having a same pattern. The mask pair includes an extreme ultraviolet (EUV) mask and a low EUV reflectivity mask. A first exposure process is performed by using the EUV mask to expose a substrate. A second exposure process is performed by using the low EUV reflectivity mask to expose the same substrate. The first exposure process is conducted according to a first exposure dose matrix and the second exposure process is conducted according to a second exposure dose matrix.

Abstract: A method includes defining a photoresist layer over a first dielectric layer. The first dielectric layer is disposed over an etch stop layer and the etch stop layer is disposed over a second dielectric layer. A spacer layer is formed over the photoresist and the first dielectric layer. The spacer layer has an opening that has a via width. The opening is disposed directly above a via location. A metal trench with a metal width is formed in the first dielectric layer. The metal width at the via location is greater than the via width. A via hole with the via width is formed at the via location in the second dielectric layer.

Abstract: A method includes defining a metal pattern layer over a first dielectric layer. The first dielectric layer is disposed over an etch stop layer and the etch stop layer is disposed over a second dielectric layer. A spacer layer is grown over the metal pattern layer and the first dielectric layer. A metal trench is formed with a metal width in the first dielectric layer. A via hole is formed with a via width in the second dielectric layer.

Abstract: A Cu-containing material is provided as an absorber layer of an EUV mask. With the absorber layer of the Cu-containing material, the same lithography performance of a conventional absorber in 70 nm thickness of TaBN can be achieved by only a 30-nm thickness of the absorber layer according to the various embodiments of the present disclosure. Furthermore, the out-off-band (OOB) flare of the radiation light in 193-257 nm can be reduced so as to achieve the better lithography performance.

Abstract: An out-of-band (OoB) suppression layer is applied on a reflective multiplayer (ML) coating, so as to avoid the OoB reflection and to enhance the optical contrast at 13.5 nm A material having a low reflectivity at wavelength of 193-257 nm, for example, silicon carbide (SiC), is used as the OoB suppression layer. A method of fabricating an EUV mask having the OoB suppression layer and a method of inspecting an EUV mask having the OoB suppression are also provided.

Abstract: Embodiments of EUV photomasks and methods for forming a EUV photomask are provided. The method comprises providing a substrate, a reflective layer, a capping layer, a hard mask layer, and forming an opening therein. An absorber layer is then filled in the opening and over the top surface of the hard mask layer. A removing process is provided to form an absorber with a top surface lower than a top surface of the capping layer.

Abstract: An EUV mask includes a low thermal expansion material (LTEM) substrate, a reflective multilayer (ML) above one surface of the LTEM substrate, and a conductive layer above an opposite surface of the LTEM substrate. A capping layer is provided above the reflective ML, a buffer layer is provided above the capping layer, and an absorption stack is provided above the buffer layer. The absorption stack comprises multiple layers. A multiple patterning process is performed on the absorption stack to form multiple reflective states.

Abstract: A mask, method of fabricating same, and method of using same are disclosed. In an example, a mask includes a substrate and a reflective multilayer coating deposited over the substrate. The reflective multilayer coating is formed by positioning the substrate such that an angle ? is formed between a normal line of the substrate and particles landing on the substrate and rotating the substrate about an axis that is parallel with a landing direction of the particles. In an example, reflective multilayer coating includes a first layer and a second layer deposited over the first layer. A phase defect region of the reflective multilayer coating includes a first deformation in the first layer at a first location, and a second deformation in the second layer at a second location, the second location laterally displaced from the first location.

Abstract: The present disclosure provides one embodiment of a mask for a lithography exposure process. The mask includes a mask substrate; a first mask material layer patterned to have a first plurality of openings that define a first layer pattern; and a second mask material layer patterned to have a second plurality of openings that define a second layer pattern.

Abstract: The present disclosure provides a method that includes forming a first resist layer on a substrate; forming a second resist layer over the first resist layer; and performing an electron-beam (e-beam) lithography exposure process to the first resist layer and the second resist layer, thereby forming a first latent feature in the first resist layer and a second latent feature in the second resist layer.

Abstract: A reflective mask is described. The mask includes a low thermal expansion material (LTEM) substrate, a conductive layer deposited on a first surface of the LTEM substrate, a stack of reflective multilayers (ML) deposited on a second surface of the LTEM substrate, a capping layer deposited on the stack of reflective ML, a first absorption layer deposited on the first capping layer, a main pattern, and a border ditch. The border ditch reaches to the capping layer, a second absorption layer deposited inside the border ditch, and the second absorption layer contacts the capping layer. In some instances, the border ditch crosses the capping layer and partially enters the reflective multilayer.

Abstract: A lithography process in a lithography system includes loading a mask that includes two mask states defining an integrated circuit (IC) pattern. The IC pattern includes a plurality of main polygons, wherein adjacent main polygons are assigned to different mask states; and a background includes a field in one of the mask states and a plurality of sub-resolution polygons in another of the two mask states. The lithography process further includes configuring an illuminator to generate an illuminating pattern on an illumination pupil plane of the lithography system; configuring a pupil filter on a projection pupil plane of the lithography system with a filtering pattern determined according to the illumination pattern; and performing an exposure process to a target with the illuminator, the mask, and the pupil filter. The exposure process produces diffracted light and non-diffracted light behind the mask and the pupil filter removes most of the non-diffracted light.