Abstract: An authentication system according to one aspect of the present disclosure includes: at least one memory storing a set of instructions; and at least one processor configured to execute the set of instructions to: track an object included in a video captured by a first capture device; detect a candidate for biometric authentication in the object being tracked; determine whether biometric authentication has been performed for the candidate based on a record of biometric authentication performed for the object being tracked; and perform the biometric authentication for the candidate based on a video of an authentication part of the candidate when the biometric authentication has not been performed for the candidate, the video of the authentication part being captured by a second capture device having a capture range including a part of a capture range of the first capture device.

Abstract: The disclosure is inputting a first image obtained by capturing an object of authentication moving in a specific direction; inputting a second image at least for one eye obtained by capturing a right eye or a left eye of the object; determining whether the second image is of the left eye or the right eye of the object, based on information including the first image, and outputting a determination result associated with the second image as left/right information; comparing characteristic information relevant to the left/right information, the characteristic information being acquired from a memory that stores the characteristic information of a right eye and a left eye pertaining to object to be authenticated, with characteristic information associated with the left/right information, and calculating a verification score; and authenticating the object captured in the first image and the second image, based on the verification score, and outputting an authentication result.

Abstract: A first-aid information provision system of the example embodiments includes: an information display device that includes first capture means for capturing an iris image, code acquisition means for acquiring a code associated with the captured iris image, and code display means for displaying the acquired code; and an information output device that includes second capture means for imaging the code displayed by the information display device, first-aid information acquisition means for acquiring first-aid information about an individual associated with the iris image by using the imaged code, and first-aid information output means for outputting the first-aid information.

Abstract: An image processing apparatus (10) according to the present disclosure includes: a skeleton detection unit (11) configured to detect a two-dimensional skeleton structure of a person based on an acquired two-dimensional image; an estimation unit (12) configured to estimate the height of the person when the person stands upright in a two-dimensional image space based on the two-dimensional skeleton structure detected by the skeleton detection unit (11); and a normalizing unit (13) configured to normalize the two-dimensional skeleton structure detected based on the height of the person when the person stands upright estimated by the estimation unit (12).

Abstract: A partial discharge detection apparatus for detecting partial discharge in a power cable and recognizing an insulation deterioration state of the power cable. A low-speed AD converter converts an analog signal of an AC waveform flowing through a power cable into a digital signal. A high-speed AD converter converts an analog signal of a partial discharge current into a digital signal. The partial discharge is detected based on the maximum value or the sum of a current value obtained from the digital signal of the partial discharge current obtained by the conversion of the high-speed AD converter, for each phase of the AC waveform, which is obtained from the digital signal of the AC waveform flowing in the power cable. The digital signal is obtained by the conversion of the low-speed AD converter.

Abstract: A pressure sensor includes a pressure detecting element; a base material on which the pressure detecting element is mounted; a pad electrode provided on the base material and electrically connected to the pressure detecting element; a ground electrode provided on the base material and spaced from the pad electrode; and a cap having a tubular shape, the cap surrounding a periphery of the pressure detecting element on the base material and being attached to the ground electrode with a conductive adhesive. An inner receiving section is provided between an inner peripheral surface of the cap and a ground-electrode-side end surface of the cap, the inner receiving section thereby preventing excessive spreading of the conductive adhesive. The cap can be attached to the base material with the conductive adhesive without causing excessive spreading of the conductive adhesive.

Abstract: In the related art, since there is a difference in communication delay time in a round-trip communication path due to packet clogging in a network configuration using a network relay device, there is a problem that time cannot be synchronized. In order to solve the above problem, in the present invention, a time synchronization unit 131 is controlled by the time synchronization control unit 130 to perform time synchronization once, delays of an egress path and an ingress path of the time packet on the basis of the synchronization time are calculated, and time synchronization processing is executed using a time of the time packet in a case where the calculated values are equal to each other.

Abstract: A partial discharge detection apparatus includes low-speed and high-speed AD converters. The low-speed AD converter converts an analog signal of an AC waveform flowing through a power cable into a digital signal. The high-speed AD converter converts an analog signal of a partial discharge current into a digital signal. The analog signal is in a plurality of Nyquist frequency domains defined for each of two different types of sampling frequencies. The partial discharge is detected by a partial-discharge-detection digital signal processing unit based on the maximum value or the sum of a current value obtained from the digital signal of the partial discharge current obtained by the conversion of the high-speed AD converter, for each phase of the AC waveform, which is obtained from the digital signal of the AC waveform flowing in the power cable. The digital signal is obtained by the conversion of the low-speed AD converter.

Abstract: In a semiconductor memory device, voltage application from a memory gate electrode of the memory capacitor to a word line can be blocked by a rectifier element depending on values of voltages applied to the memory gate electrode and the word line without using a conventional control circuit. The configuration eliminates the need to provide a switch transistor and a switch control circuit for turning on and off the switch transistor as in conventional cases, and accordingly achieves downsizing. In the semiconductor memory device, for example, each bit line contact is shared by four anti-fuse memories adjacent to each other and each word line contact is shared by four anti-fuse memories adjacent to each other, thereby achieving downsizing of the entire device as compared to a case in which the bit line contact and the word line contact are individually provided to each anti-fuse memory.

Abstract: When a memory cell (MC) is downsized by reducing the distance between a drain region (12a) and a source region (12b) on the surface of a fin (S2) with a high impurity concentration inside the fin (S2), the shape of the fin (S2) can be set such that a potential difference between a memory gate electrode (MG) and the fin (S2) is reduced to suppress the occurrence of disturbance. Accordingly, the memory cell (MC) achieves downsizing and suppression of the occurrence of disturbance.

Abstract: A pressure sensor includes a pressure detecting element; a base material on which the pressure detecting element is mounted; a pad electrode provided on the base material and electrically connected to the pressure detecting element; a ground electrode provided on the base material and spaced from the pad electrode; and a cap having a tubular shape, the cap surrounding a periphery of the pressure detecting element on the base material and being attached to the ground electrode with a conductive adhesive. An inner receiving section is provided between an inner peripheral surface of the cap and a ground-electrode-side end surface of the cap, the inner receiving section thereby preventing excessive spreading of the conductive adhesive. The cap can be attached to the base material with the conductive adhesive without causing excessive spreading of the conductive adhesive.

Abstract: A memory cell includes a memory gate structure, a first select gate structure, and a second select gate structure. In the memory gate structure, a lower memory gate insulating film, a charge storage layer, an upper memory gate insulating film, and a metal memory gate electrode are stacked in this order. The first select gate structure includes a metal first select gate electrode along a first sidewall spacer provided on a sidewall of the memory gate structure. The second select gate structure includes a metal second select gate electrode along a second sidewall spacer provided on another sidewall of the memory gate structure. Thus, the metal memory gate electrode, the metal first select gate electrode, and the metal second select gate electrode can be formed of a same metallic material as a metal logic gate electrode, permitting the memory cell to be formed together with the metal logic gate electrode.

Abstract: A memory cell includes a memory gate structure, a first select gate structure, and a second select gate structure. In the memory gate structure, a lower memory gate insulating film, a charge storage layer, an upper memory gate insulating film, and a metal memory gate electrode are stacked in this order. The first select gate structure includes a metal first select gate electrode along a first sidewall spacer provided on a sidewall of the memory gate structure. The second select gate structure includes a metal second select gate electrode along a second sidewall spacer provided on another sidewall of the memory gate structure. Thus, the metal memory gate electrode, the metal first select gate electrode, and the metal second select gate electrode can be formed of a same metallic material as a metal logic gate electrode, permitting the memory cell to be formed together with the metal logic gate electrode.

Abstract: A memory cell includes a memory gate structure, a first select gate structure, and a second select gate structure. In the memory gate structure, a lower memory gate insulating film, a charge storage layer, an upper memory gate insulating film, and a metal memory gate electrode are stacked in this order. The first select gate structure includes a metal first select gate electrode along a first sidewall spacer provided on a sidewall of the memory gate structure. The second select gate structure includes a metal second select gate electrode along a second sidewall spacer provided on another sidewall of the memory gate structure. Thus, the metal memory gate electrode, the metal first select gate electrode, and the metal second select gate electrode can be formed of a same metallic material as a metal logic gate electrode, permitting the memory cell to be formed together with the metal logic gate electrode.

Abstract: When a memory cell (MC) is downsized by reducing the distance between a drain region (12a) and a source region (12b) on the surface of a fin (S2) with a high impurity concentration inside the fin (S2), the shape of the fin (S2) can be set such that a potential difference between a memory gate electrode (MG) and the fin (S2) is reduced to suppress the occurrence of disturbance. Accordingly, the memory cell (MC) achieves downsizing and suppression of the occurrence of disturbance.

Abstract: When a memory cell (MC) is downsized by reducing the distance between a drain region (12a) and a source region (12b) on the surface of a fin (S2) with a high impurity concentration inside the fin (S2), the shape of the fin (S2) can be set such that a potential difference between a memory gate electrode (MG) and the fin (S2) is reduced to suppress the occurrence of disturbance. Accordingly, the memory cell (MC) achieves downsizing and suppression of the occurrence of disturbance.

Abstract: When a memory cell (MC) is downsized by reducing the distance between a drain region (12a) and a source region (12b) on the surface of a fin (S2) with a high impurity concentration inside the fin (S2), the shape of the fin (S2) can be set such that a potential difference between a memory gate electrode (MG) and the fin (S2) is reduced to suppress the occurrence of disturbance. Accordingly, the memory cell (MC) achieves downsizing and suppression of the occurrence of disturbance.

Abstract: A memory cell includes a memory gate structure, a first select gate structure, and a second select gate structure. In the memory gate structure, a lower memory gate insulating film, a charge storage layer, an upper memory gate insulating film, and a metal memory gate electrode are stacked in this order. The first select gate structure includes a metal first select gate electrode along a first sidewall spacer provided on a sidewall of the memory gate structure. The second select gate structure includes a metal second select gate electrode along a second sidewall spacer provided on another sidewall of the memory gate structure. Thus, the metal memory gate electrode, the metal first select gate electrode, and the metal second select gate electrode can be formed of a same metallic material as a metal logic gate electrode, permitting the memory cell to be formed together with the metal logic gate electrode.

Abstract: A semiconductor device including a nonvolatile memory cell and a field effect transistor together is improved in performance. In a method of manufacturing a semiconductor device, a hydrogen-containing insulating film is formed before heat treatment of a semiconductor wafer, the hydrogen-containing insulating film covering a gate electrode and agate insulating film in a region that will have a memory cell therein, and exposing a region that will have therein a MISFET configuring a peripheral circuit. Consequently, hydrogen in the hydrogen-containing insulating film is diffused into an interface between the gate insulating film and the semiconductor substrate, and thereby a defect at the interface is selectively repaired.

Abstract: To provide a semiconductor device having improved performance while improving the throughput in the manufacturing steps of the semiconductor device. An insulating film portion comprised of first, second, third, fourth, and fifth insulating films is formed on a semiconductor substrate. The second insulating film is a first charge storage film and the fourth insulating film is a second charge storage film. The first charge storage film contains silicon and nitrogen; the third insulating film contains silicon and oxygen; and the second charge storage film contains silicon and nitrogen. The thickness of the third insulating film is smaller than that of the first charge storage film and the thickness of the second charge storage film is greater than that of the first charge storage film. The third insulating film is formed by treating the upper surface of the first charge storage film with a water-containing treatment liquid.