Abstract: In the present invention, an inspection contact structure is attached to the lower surface side of a circuit board in a probe card. In the inspection contact structure, elastic sheets with protruding conductive portions are respectively attached to both surfaces of a silicone substrate. The silicone substrate is formed with current-carrying paths passing therethrough in the vertical direction, and the sheet conductive portions are in contact with the current-carrying paths from above and below. The conductive portions on the upper side are in contact with connecting terminals of the circuit board. At the time of inspection of electric properties of a wafer, electrode pads on the wafer are pressed against the conductive portions on the lower side and thereby brought into contact with them.

Abstract: A system in which an overdrive period in a DRAM may be provided without providing for accurate delay time. There are provided MOS transistor TP1, capacitor C1, MOS transistor TP2, and control circuit. MOS transistor TP1 is turned on when overdriving begins, and is designed to supply voltage of power supply VDD1 to parallel-connected sense amplifiers. Capacitor C1 accumulates electrical charges referenced to in association with electrical charges supplied to sense the amplifiers via MOS transistor TP1. MOS transistor TP2 is turned on when overdriving begins, to supply voltage of power supply VDD1 to capacitor C1. The control circuit controls so that MOS transistors TP1, TP2 are turned off when the capacitor potential has reached voltage VREF1. There is also provided a MOS transistor turned on after the MOS transistors TP1, TP2 are turned off to supply a power supply voltage equal to the voltage VREF1 to the plural sense amplifiers.

Abstract: A semiconductor memory device comprising: a sense amplifier which includes a pair of first NMOS transistors and a pair of PMOS transistors connected to a bit line pair as a complementary pair; a back bias generating circuit which generates a back bias voltage to be applied to the first NMOS transistors in a state in which a predetermined current is flowing through a second NMOS transistor having approximately the same operating characteristic as that of the first NMOS transistors, and performs a feedback control in response to a threshold voltage of the second NMOS transistor; and control means which performs control in a sensing operation of the sense amplifier such that the pair of first NMOS transistors operates previously and after a lapse of a predetermined time the pair of first PMOS transistors operates.

Abstract: A system in which an overdrive period in a DRAM may be provided without providing for accurate delay time. There are provided MOS transistor TP1, capacitor C1, MOS transistor TP2, and control circuit. MOS transistor TP1 is turned on when overdriving begins, and is designed to supply voltage of power supply VDD1 to parallel-connected sense amplifiers. Capacitor C1 accumulates electrical charges referenced to in association with electrical charges supplied to sense the amplifiers via MOS transistor TP1. MOS transistor TP2 is turned on when overdriving begins, to supply voltage of power supply VDD1 to capacitor C1. The control circuit controls so that MOS transistors TP1, TP2 are turned off when the capacitor potential has reached voltage VREF1. There is also provided a MOS transistor turned on after the MOS transistors TP1, TP2 are turned off to supply a power supply voltage equal to the voltage VREF1 to the plural sense amplifiers.

Abstract: In the present invention, an inspection contact structure is attached to the lower surface side of a circuit board in a probe card. In the inspection contact structure, elastic sheets with protruding conductive portions are respectively attached to both surfaces of a silicone substrate. The silicone substrate is formed with current-carrying paths passing therethrough in the vertical direction, and the sheet conductive portions are in contact with the current-carrying paths from above and below. The conductive portions on the upper side are in contact with connecting terminals of the circuit board. At the time of inspection of electric properties of a wafer, electrode pads on the wafer are pressed against the conductive portions on the lower side and thereby brought into contact with them.

Abstract: The present invention relates to a semiconductor circuit device including a logic circuit and a signal line driving circuit. The logic circuit is operated at high supply voltage and outputs a signal with a high voltage amplitude. The signal line driving circuit receives a lower supply voltage and has a low-threshold transistor. With the above configuration, a signal can be transmitted at a high speed with a low voltage amplitude and low power consumption. Thus, the semiconductor circuit device including the signal line driving circuit can reduce operating current and can be operated with a low amplitude and low standby current at a high speed.

Abstract: A system in which an overdrive period in a DRAM may be provided without providing for accurate delay time. There are provided MOS transistor TP1, capacitor C1, MOS transistor TP2, and control circuit. MOS transistor TP1 is turned on when overdriving begins, and is designed to supply voltage of power supply VDD1 to parallel-connected sense amplifiers. Capacitor C1 accumulates electrical charges referenced to in association with electrical charges supplied to sense the amplifiers via MOS transistor TP1. MOS transistor TP2 is turned on when overdriving begins, to supply voltage of power supply VDD1 to capacitor C1. The control circuit controls so that MOS transistors TP1, TP2 are turned off when the capacitor potential has reached voltage VREF1. There is also provided a MOS transistor turned on after the MOS transistors TP1, TP2 are turned off to supply a power supply voltage equal to the voltage VREF1 to the plural sense amplifiers.

Abstract: A semiconductor memory device comprising: a sense amplifier which includes a pair of first NMOS transistors and a pair of PMOS transistors connected to a bit line pair as a complementary pair; a back bias generating circuit which generates a back bias voltage to be applied to the first NMOS transistors in a state in which a predetermined current is flowing through a second NMOS transistor having approximately the same operating characteristic as that of the first NMOS transistors, and performs a feedback control in response to a threshold voltage of the second NMOS transistor; and control means which performs control in a sensing operation of the sense amplifier such that the pair of first NMOS transistors operates previously and after a lapse of a predetermined time the pair of first PMOS transistors operates.

Abstract: A current limit circuit comprising: a current limit element for limiting an output current level to within a predetermined range of a limiting current and including a first PMOS transistor having a source to which a predetermined voltage is applied and a drain through which the output current is supplied; and a gate voltage generating circuit for generating a gate voltage by a feedback control such that a difference between the predetermined voltage and a gate voltage of the first PMOS transistor coincides with a threshold voltage of a second PMOS transistor having approximately the same characteristic as that of the first PMOS transistor in a state in which a predetermined current is flowing through the second PMOS transistor.

Abstract: The present invention enables screening of the so-called variable retention time (VRT) failure, namely a retention failure occurring in a DRAM due to fluctuation of a data retention time like a random telegraph noise. A pause/refresh test for checking a data retention function is repeated at all memory cells of a chip so that memory cells at which the retention failure due to random fluctuation of the data retention capability over time may occur is subjected to screening.

Abstract: To provide a dynamic semiconductor memory device wherein it is possible to perform a reliable redundancy relief with a small layout area and high redundancy relieving rate while properly dealing with the standby current fault caused by a short-circuit defect between a bit line and word line. A common current-limiting element is provided for an equalizer circuit for a bit line pair on one side and another equalizer circuit for another bit line pair on the other side in a shared sense amplifier, and a bit line precharge potential is supplied to the equalizer circuits on the both sides through the current-limiting element.

Abstract: In the present invention, an inspection contact structure is attached to the lower surface side of a circuit board in a probe card. In the inspection contact structure, elastic sheets with protruding conductive portions are respectively attached to both surfaces of a silicon substrate. The silicon substrate is formed with current-carrying paths passing therethrough in the vertical direction, and the sheet conductive portions are in contact with the current-carrying paths from above and below. The conductive portions on the upper side are in contact with connecting terminals of the circuit board. At the time of inspection of electric properties of a wafer, electrode pads on the wafer are pressed against the conductive portions on the lower side and thereby brought into contact with them.

Abstract: A signal line drive circuit is capable of reducing the charge consumption in a circuit device, and further, transferring data at high speed. A determination circuit determines whether the present signals of a first signal line and a second signal line are the same or not. A control circuit selects a drive procedure that results in less charge and discharge current of the coupling capacitance between the first signal line and the second signal line depending on whether the present signals of the first signal line and the second signal line are the same or not. A signal line drive circuit drives the first signal line and the second signal line in accordance with the drive procedure that has been selected at the control circuit and supplies signals as output.

Abstract: To provide a dynamic semiconductor memory device wherein it is possible to perform a reliable redundancy relief with a small layout area and high redundancy relieving rate while properly dealing with the standby current fault caused by a short-circuit defect between a bit line and word line. A common current-limiting element is provided for an equalizer circuit for a bit line pair on one side and another equalizer circuit for another bit line pair on the other side in a shared sense amplifier, and a bit line precharge potential is supplied to the equalizer circuits on the both sides through the current-limiting element.

Abstract: The present invention relates to a semiconductor circuit device including a logic circuit and a signal line driving circuit. The logic circuit is operated at high supply voltage and outputs a signal with a high voltage amplitude. The signal line driving circuit receives a lower supply voltage and has a low-threshold transistor. With the above configuration, a signal can be transmitted at a high speed with a low voltage amplitude and low power consumption. Thus, the semiconductor circuit device including the signal line driving circuit can reduce operating current and can be operated with a low amplitude and low standby current at a high speed.

Abstract: A signal line drive circuit is capable of reducing the charge consumption in a circuit device, and further, transferring data at high speed. A determination circuit determines whether the present signals of a first signal line and a second signal line are the same or not. A control circuit selects a drive procedure that results in less charge and discharge current of the coupling capacitance between the first signal line and the second signal line depending on whether the present signals of the first signal line and the second signal line are the same or not. A signal line drive circuit drives the first signal line and the second signal line in accordance with the drive procedure that has been selected at the control circuit and supplies signals as output. Here, the signal line drive circuit supplies the next signals as output to the first signal line and the second signal line at the same timing if the present signals of the first signal line and the second signal line are the same.

Abstract: Disclosed are a pneumatic tire which enables improvement of durability when air column resonance sound is reduced by adding a member to a bead portion to change a sectional shape of a closed space in a tire circumferential direction, and a pneumatic tire manufacturing method which enables improvement of productivity. In the pneumatic tire in which a carcass layer is arranged between a pair of left and right bead portions and an inner liner layer is provided on an inner side of the carcass layer, volume adjusting members are intermittently arranged between the carcass layer and the inner layer in the bead portions in a tire circumferential direction so as to change a sectional shape of a closed space formed between the tire and a wheel in the tire circumferential direction.

Abstract: The present invention aims at proposing a method of slicing a semiconductor wafer and an apparatus therefor which can manufacture a bowl-shaped wafer. When the blade displacement is detected with the sensor 32, the displacement value of the blade 14 to the outer peripheral edge of the ingot 18 is obtained by the control unit 26. The air pad 30 is moved under controlling the air pressure control device 36 by the control unit 26 to make the blade displacement at the outer peripheral edge zero. As a result of this, the displacement of the wafer at the outer peripheral edge becomes zero, so that a bowl-shaped wafer can be manufactured.

Abstract: A pneumatic tire having a tread comprising a plurality of straight-linear main grooves extending in the circumferential direction of the tire and a plurality of subgrooves extending to shoulder ends of the tire, crossing the main grooves at an inclination, wherein the subgrooves include in a central region of the width of a ground-contact area of the tread a curved portion which is convex in the direction of rotation of the tire and which is, in the condition of the tire of being mounted on a vehicle, located off the center of the width of the ground-contact area toward an outer side of the vehicle by a distance within a range of 5 to 15% of the width of the ground-contact area, and wherein subgrooves extending between the curved portion and the shoulder end on an outerside of the vehicle have an angle of inclination .theta.

Abstract: Method and apparatus for cutting a cylindrical material formed of silicone or the like which is an original material to produce semiconductor devices, using a rotary blade. In the cutting method, the base end side of the cylindrical material is fixed and at the same time, before the cutting of the cylindrical material is started, the cutting side of the cylindrical material is also fixed according to the shape thereof. The cutting is performed while maintaining such fixed conditions until the cutting is completed.