Abstract: A microelectronic device comprises a stack structure comprising a stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers, the stack structure divided into block structures separated from one another by slot structures, strings of memory cells vertically extending through the block structures of the stack structure, the strings of memory cells individually comprising a channel material vertically extending through the stack structure, an additional stack structure vertically overlying the stack structure and comprising a vertical sequence of additional conductive structures and additional insulative structures arranged in additional tiers, first pillars extending through the additional stack structure and vertically overlying the strings of memory cells, each of the first pillars horizontally offset from a center of a corresponding string of memory cells, second pillars extending through the additional stack structure and vertically ove

Abstract: Surface acoustic wave devices and related methods. In some embodiments, a surface acoustic wave device for providing resonance of a surface acoustic wave having a wavelength ? can include a quartz substrate and a piezoelectric plate formed from LiTaO3 or LiNbO3 disposed over the quartz substrate. The piezoelectric plate can have a thickness greater than 2?. The surface acoustic wave device can further include an interdigital transducer electrode formed over the piezoelectric plate. The interdigital transducer electrode can have a mass density ? in a range 1.50 g/cm3<??6.00 g/cm3, 6.00 g/cm3<??12.0 g/cm3, or 12.0 g/cm3<??23.0 g/cm3, and a thickness greater than 0.148?, greater than 0.079?, or greater than 0.036?, respectively.

Abstract: A microelectronic device comprises a stack structure comprising a stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers, the stack structure divided into block structures separated from one another by slot structures, strings of memory cells vertically extending through the block structures of the stack structure, the strings of memory cells individually comprising a channel material vertically extending through the stack structure, an additional stack structure vertically overlying the stack structure and comprising a vertical sequence of additional conductive structures and additional insulative structures arranged in additional tiers, first pillars extending through the additional stack structure and vertically overlying the strings of memory cells, each of the first pillars horizontally offset from a center of a corresponding string of memory cells, second pillars extending through the additional stack structure and vertically ove

Abstract: A memory device can include a memory array coupled with a control logic. The control logic initiates a program operation on the memory array, the program operation including a program phase and a program recovery phase. The control logic causes a program voltage to be applied to a selected word line during the program phase. The control logic causes a select gate drain coupled with a string of memory cells to deactivate during the program recovery phase after applying the program voltage, where the string of memory cells include a plurality of memory cells each coupled to a corresponding word line of a plurality of wordlines. The control logic causes a voltage to be applied to a select gate source coupled with the string of memory cells to activate the select gate source during the program recovery phase concurrent to causing the select gate drain to deactivate.

Abstract: A microelectronic device comprises a stack structure, pillar structures, a conductive plug structure, a sense transistor, and selector transistors. The stack structure comprises a vertically alternating sequence of conductive material and insulative material, and is divided into blocks separated by dielectric slot structures. The blocks individually include sub-blocks horizontally extending in parallel with one another. The pillar structures vertically extend through one of the blocks of the stack structure. Each pillar structure of a group of the pillar structures is positioned within a different one of the sub-blocks of the one of the blocks than each other pillar structure of the group. The conductive plug structure is coupled to multiple of the pillar structures of the group of the pillar structures. The sense transistor is gated by the conductive plug structure. The selector transistors couple the sense transistor to a read source line structure and a digit line structure.

Abstract: An electrostatic transducer including a displacement plate having a fixed portion fixed to a support and a fluctuating portion provided so as to freely fluctuate with respect to the fixed portion. At least a portion of a detection means is attached to the fluctuating portion so as to freely fluctuate together with the fluctuating portion, and is provided so as to be able to detect the fluctuation of the fluctuating portion as a change in electrostatic capacitance. The detection means is arranged in a vacuum or low-pressure space.

Abstract: In some embodiments, a surface acoustic wave device can include a piezoelectric substrate and an interdigital transducer electrode implemented on a surface of the piezoelectric substrate, such that the surface acoustic device supports a surface acoustic wave having a wavelength ? and a phase velocity less than 3,000 m/s with an electromechanical coupling coefficient of at least 9.0. In some embodiments, the phase velocity less than 2,000 m/s, and the surface acoustic wave can include a lowest asymmetry (A0) mode. In some embodiments, such a surface acoustic wave device can be implemented in products such as a radio-frequency filter, a radio-frequency module and a wireless device.

Abstract: In some embodiments, a surface acoustic wave device can include a piezoelectric substrate and an interdigital transducer electrode embedded in a surface of the piezoelectric substrate to support a high-order mode of a surface acoustic wave having a wavelength ? and a phase velocity greater than 8,000 m/s. Such a high-order mode can include a third-order mode, and the phase velocity can be at least 9,000 m/s. In some embodiments, such a surface acoustic wave device can be implemented in products such as a radio-frequency filter, a radio-frequency module and a wireless device.

Abstract: An acoustic wave device that can achieve a good characteristic in a superhigh frequency band of 6 GHz or higher by using an overtone. The device includes: a piezoelectric substrate; an electrode provided in such a way as to be in contact with the piezoelectric substrate; and an acoustic multilayer film provided in such a way as to be in contact with the piezoelectric substrate and/or the electrode and is configured to use an overtone of resonance characteristics of a surface acoustic wave. The electrode includes an interdigital transducer provided on one of surfaces of the piezoelectric substrate. The surface acoustic wave that is the overtone preferably has a velocity of 9000 m/s or higher. The acoustic multilayer film is preferably composed of an acoustic low impedance film and an acoustic high impedance film which are alternately stacked.

Abstract: An electrostatic acoustic wave generating device and an electrostatic speaker making entries of dust, water, moisture, etc. into the device and the speaker, allowing reduction in power. A plate-like fixed electrode has a through hole penetrating the thickness of the fixed electrode. A vibrating body and a vibrating electrode each having a plate-like shape are arranged closer to one surface and closer to the other surface of the fixed electrode respectively, and are movable in the respective thickness directions thereof. A connection member connects the vibrating body and the vibrating electrode to each other through the through hole of the fixed electrode to cause the vibrating body and the vibrating electrode to move toward the same direction. Voice signal input is capable of applying a voltage to the fixed electrode, the vibrating body, and the vibrating electrode to move the vibrating body between the fixed electrode and the vibrating body.

Abstract: Arrays of memory cells might include a first upper data line, a second upper data line, a lower data line, a first pass gate selectively connected to the lower data line, a second pass gate connected to the first pass gate and selectively connected to the lower data line, a third pass gate selectively connected to the lower data line, a fourth pass gate connected to the third pass gate and selectively connected to the lower data line, unit column structures selectively connected to a respective one of the upper data lines and capacitively coupled to a first channel of a respective one of the pass gates, and control lines capacitively coupled to a second channel of a respective one of the pass gates.

Abstract: Arrays of memory cells might include a data line, a source, a plurality of pass gates connected in series between the data line and the source, a plurality of unit column structures each having a respective plurality of series-connected non-volatile memory cells connected in series with a respective plurality of series-connected field-effect transistors, wherein a channel of each non-volatile memory cell of its respective plurality of series-connected non-volatile memory cells and a channel of each field-effect transistor of its respective plurality of series-connected field-effect transistors are selectively connected to one another, and a plurality of backside gate lines each connected to the second control gate of a respective pass gate of the plurality of pass gates, wherein, for each unit column structure of the plurality of unit column structures, the channel of a particular field-effect transistor of its respective plurality of field-effect transistors is capacitively coupled to the first channel of a

Abstract: Memory might include a plurality of series-connected non-volatile memory cells, a plurality of series-connected first field-effect transistors connected in series with the plurality of series-connected non-volatile memory cells, and a second field-effect transistor, wherein the channel of the second field-effect transistor is capacitively coupled to channels of the plurality of series-connected first field-effect transistors.

Abstract: A driving system (7) includes an actuator (71A) that performs at least one among translations in three directions orthogonal to one another and rotations about axes in the three directions, and a flexible wiring body (73A) that connects a semiconductor element (6) moving along with the actuator (71A) and a frame (72) positioned outer than the semiconductor element (6). The flexible wiring body (73A) is provided with a main part (731A) mounted with the semiconductor element (6) and electrically connected to the semiconductor element (6), and a plurality of arm parts (732A) extending from the main part (731A) toward the frame (72) and bent three-dimensionally.

Abstract: Apparatus might include an array of memory cells comprising a plurality of strings of series-connected memory cells, a data line, a first field-effect transistor between the data line and a first string of series-connected memory cells, and a second field-effect transistor between the data line and a second string of series-connected memory cells, wherein a control gate of the first field-effect transistor is connected to a control gate of the second field-effect transistor, and wherein a channel of the first field-effect transistor was fabricated to have a first threshold voltage and a channel of the second field-effect transistor was fabricated to have a second threshold voltage, different than the first threshold voltage.

Abstract: Methods of forming integrated circuit structures for a capacitive sense NAND memory include forming a first semiconductor overlying a dielectric, forming a second semiconductor to be in contact with a first end of the first semiconductor, forming a third semiconductor to be in contact with a second end of the first semiconductor opposite the first end of the first semiconductor, forming a vertical channel material structure overlying the first semiconductor and having a channel material capacitively coupled to the first semiconductor, and forming a plurality of series-connected field-effect transistors adjacent the vertical channel material structure.

Abstract: Surface acoustic wave devices and related methods. In some embodiments, a surface acoustic wave device for providing resonance of a surface acoustic wave having a wavelength ? can include a quartz substrate and a piezoelectric plate formed from LiTaO3 or LiNbO3 disposed over the quartz substrate. The piezoelectric plate can have a thickness greater than 2?. The surface acoustic wave device can further include an interdigital transducer electrode formed over the piezoelectric plate. The interdigital transducer electrode can have a mass density ? in a range 1.50 g/cm3<??6.00 g/cm3, 6.00 g/cm3<??12.0 g/cm3, or 12.0 g/cm3<??23.0 g/cm3, and a thickness greater than 0.148?, greater than 0.079?, or greater than 0.036?, respectively.

Abstract: Memory might include a plurality of series-connected non-volatile memory cells, a plurality of series-connected first field-effect transistors connected in series with the plurality of series-connected non-volatile memory cells, and a second field-effect transistor, wherein the channel of the second field-effect transistor is capacitively coupled to channels of the plurality of series-connected first field-effect transistors.

Abstract: An elastic wave device capable of obtaining good characteristics while maintaining sufficient mechanical strength in an ultra-high frequency band of 6 GHz or higher includes: a piezoelectric substrate; an electrode in contact with the piezoelectric substrate; and an acoustic multilayer film in contact with the piezoelectric substrate and/or the electrode. The elastic wave device is configured to utilize higher-order modes of resonance characteristics of bulk waves. The acoustic multilayer film has a low acoustic impedance film and a high acoustic impedance film which are alternately stacked.

Abstract: An array of memory cells might include a first data line, a second data line, a source, a capacitance selectively connected to the first data line, a string of series-connected non-volatile memory cells between the first data line and the capacitance, and a pass gate selectively connected between the second data line and the source, wherein an electrode of the capacitance is capacitively coupled to a channel of the pass gate.