Patents by Inventor Shuji Tanaka

Shuji Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11437106
    Abstract: An array of memory cells might include a first data line, a second data line, a source, a capacitance selectively connected to the first data line, a string of series-connected non-volatile memory cells between the first data line and the capacitance, and a pass gate selectively connected between the second data line and the source, wherein an electrode of the capacitance is capacitively coupled to a channel of the pass gate.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: September 6, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Yoshiaki Fukuzumi, Jun Fujiki, Shuji Tanaka, Masashi Yoshida, Masanobu Saito, Yoshihiko Kamata
  • Publication number: 20220231212
    Abstract: In a light emitting device, in a bottom surface of a cavity of a Si substrate, slit-shaped through holes and through electrodes that fill the through holes are provided at a position facing a first element electrode of a light emitting element. A length of an upper surface of the through electrode in a long axis direction is larger than a height of the through electrode in a thickness direction of the Si substrate. A joining layer having a shape corresponding to a shape of the upper surface of the through electrode is disposed between the first element electrode of the light emitting element and the upper surface of the through electrode facing the first element electrode. The entire upper surface of the through electrode is joined to the first element electrode via the joining layer.
    Type: Application
    Filed: May 13, 2020
    Publication date: July 21, 2022
    Applicant: STANLEY ELECTRIC CO., LTD.
    Inventors: Yoshiaki YASUDA, Hirofumi CHIBA, Mitsuyasu KUMAGAI, Yukio SUZUKI, Shuji TANAKA
  • Patent number: 11386966
    Abstract: Memory might include a non-volatile memory cell, a capacitance selectively connected to the non-volatile memory cell, a field-effect transistor having a channel capacitively coupled to an electrode of the capacitance, and a controller for access of the non-volatile memory cell configured to cause the memory to increase a voltage level of the electrode of the capacitance, selectively discharge the voltage level of the electrode of the capacitance through the non-volatile memory cell responsive to a data state stored in the non-volatile memory cell, and determine whether the field-effect transistor is activated in response to a remaining voltage level of the electrode of the capacitance.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: July 12, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Yoshiaki Fukuzumi, Jun Fujiki, Shuji Tanaka, Masashi Yoshida, Masanobu Saito, Yoshihiko Kamata
  • Publication number: 20220200566
    Abstract: A high-order mode surface acoustic wave device includes a piezoelectric substrate (11) formed from a LiTaO3 or LiNbO3 crystal and an interdigital transducer electrode (12) embedded in a surface of the piezoelectric substrate (11) to use a surface acoustic wave in a high-order mode. Further, the high-order mode surface acoustic wave device may include a film (13) or substrate stacked on the piezoelectric substrate (11), and may include a support substrate (11) and/or a multi-layer film (15) provided in contact with a surface opposite to the surface of the piezoelectric substrate (11) on which the interdigital transducer electrode (12) is provided. The high-order mode surface acoustic wave device may achieve good characteristics and maintain a sufficient mechanical strength even in a high frequency band of 3.8 GHz or greater.
    Type: Application
    Filed: March 31, 2020
    Publication date: June 23, 2022
    Inventors: Michio KADOTA, Shuji TANAKA
  • Publication number: 20220199641
    Abstract: A microelectronic device comprises a stack structure comprising a stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers, the stack structure divided into block structures separated from one another by slot structures, strings of memory cells vertically extending through the block structures of the stack structure, the strings of memory cells individually comprising a channel material vertically extending through the stack structure, an additional stack structure vertically overlying the stack structure and comprising a vertical sequence of additional conductive structures and additional insulative structures arranged in additional tiers, first pillars extending through the additional stack structure and vertically overlying the strings of memory cells, each of the first pillars horizontally offset from a center of a corresponding string of memory cells, second pillars extending through the additional stack structure and vertically ove
    Type: Application
    Filed: December 18, 2020
    Publication date: June 23, 2022
    Inventors: Yoshiaki Fukuzumi, Jun Fujiki, Matthew J. King, Sidhartha Gupta, Paolo Tessariol, Kunal Shrotri, Kye Hyun Baek, Kyle A. Ritter, Shuji Tanaka, Umberto Maria Meotto, Richard J. Hill, Matthew Holland
  • Publication number: 20220180938
    Abstract: Arrays of memory cells might include a data line, a source, a plurality of pass gates connected in series between the data line and the source, a plurality of unit column structures each having a respective plurality of series-connected non-volatile memory cells connected in series with a respective plurality of series-connected field-effect transistors, wherein a channel of each non-volatile memory cell of its respective plurality of series-connected non-volatile memory cells and a channel of each field-effect transistor of its respective plurality of series-connected field-effect transistors are selectively connected to one another, and a plurality of backside gate lines each connected to the second control gate of a respective pass gate of the plurality of pass gates, wherein, for each unit column structure of the plurality of unit column structures, the channel of a particular field-effect transistor of its respective plurality of field-effect transistors is capacitively coupled to the first channel of a
    Type: Application
    Filed: December 4, 2020
    Publication date: June 9, 2022
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Yoshiaki Fukuzumi, Jun Fujiki, Shuji Tanaka, Masashi Yoshida, Masanobu Saito, Yoshihiko Kamata
  • Publication number: 20220180937
    Abstract: An array of memory cells might include a first data line, a second data line, a source, a capacitance selectively connected to the first data line, a string of series-connected non-volatile memory cells between the first data line and the capacitance, and a pass gate selectively connected between the second data line and the source, wherein an electrode of the capacitance is capacitively coupled to a channel of the pass gate.
    Type: Application
    Filed: December 4, 2020
    Publication date: June 9, 2022
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Yoshiaki Fukuzumi, Jun Fujiki, Shuji Tanaka, Masashi Yoshida, Masanobu Saito, Yoshihiko Kamata
  • Publication number: 20220181346
    Abstract: Arrays of memory cells might include a first upper data line, a second upper data line, a lower data line, a first pass gate selectively connected to the lower data line, a second pass gate connected to the first pass gate and selectively connected to the lower data line, a third pass gate selectively connected to the lower data line, a fourth pass gate connected to the third pass gate and selectively connected to the lower data line, unit column structures selectively connected to a respective one of the upper data lines and capacitively coupled to a first channel of a respective one of the pass gates, and control lines capacitively coupled to a second channel of a respective one of the pass gates.
    Type: Application
    Filed: December 21, 2021
    Publication date: June 9, 2022
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Yoshiaki Fukuzumi, Jun Fujiki, Shuji Tanaka, Masashi Yoshida, Masanobu Saito, Yoshihiko Kamata
  • Publication number: 20220180939
    Abstract: Memory might include a non-volatile memory cell, a capacitance selectively connected to the non-volatile memory cell, a field-effect transistor having a channel capacitively coupled to an electrode of the capacitance, and a controller for access of the non-volatile memory cell configured to cause the memory to increase a voltage level of the electrode of the capacitance, selectively discharge the voltage level of the electrode of the capacitance through the non-volatile memory cell responsive to a data state stored in the non-volatile memory cell, and determine whether the field-effect transistor is activated in response to a remaining voltage level of the electrode of the capacitance.
    Type: Application
    Filed: December 4, 2020
    Publication date: June 9, 2022
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Yoshiaki Fukuzumi, Jun Fujiki, Shuji Tanaka, Masashi Yoshida, Masanobu Saito, Yoshihiko Kamata
  • Patent number: 11356075
    Abstract: Surface acoustic wave device having mass-loaded electrode. In some embodiments, a surface acoustic wave device for providing resonance of a surface acoustic wave having a wavelength ? can include a quartz substrate and a piezoelectric plate formed from LiTaO3 or LiNbO3 disposed over the quartz substrate. The piezoelectric plate can have a thickness greater than 2?. The surface acoustic wave device can further include an interdigital transducer electrode formed over the piezoelectric plate. The interdigital transducer electrode can have a mass density ? in a range 1.50 g/cm3<??6.00 g/cm3, 6.00 g/cm3<??12.0 g/cm3, or 12.0 g/cm3<??23.0 g/cm3, and a thickness greater than 0.148?, greater than 0.079?, or greater than 0.036?, respectively.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: June 7, 2022
    Inventors: Michio Kadota, Shuji Tanaka, Hiroyuki Nakamura
  • Publication number: 20220173720
    Abstract: An acoustic wave device that has a better TCF and can improve a resonator Q or impedance ratio is provided. The acoustic wave device includes a substrate 11 containing 70 mass % or greater of silicon dioxide (SiO2), a piezoelectric thin film 12 including LiTaO3 crystal or LiNbO3 crystal and disposed on the substrate 11, and an interdigital transducer electrode 13 disposed in contact with the piezoelectric thin film 12.
    Type: Application
    Filed: February 18, 2022
    Publication date: June 2, 2022
    Inventors: Michio KADOTA, Shuji TANAKA
  • Patent number: 11258427
    Abstract: An acoustic wave device that has a better TCF and can improve a resonator Q or impedance ratio is provided. The acoustic wave device includes a substrate 11 containing 70 mass % or greater of silicon dioxide (SiO2), a piezoelectric thin film 12 including LiTaO3 crystal or LiNbO3 crystal and disposed on the substrate 11, and an interdigital transducer electrode 13 disposed in contact with the piezoelectric thin film 12.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: February 22, 2022
    Assignee: TOHOKU UNIVERSITY
    Inventors: Michio Kadota, Shuji Tanaka
  • Patent number: 11227869
    Abstract: Arrays of memory cells a plurality of sense lines each having a respective plurality of pass gates connected in series between a second data line and a source, and having a respective subset of unit column structures capacitively coupled to first channels of its respective plurality of pass gates, wherein, for each sense line of the plurality of sense lines, each unit column structure of its respective subset of unit column structures is connected to a respective first data line of a respective subset of first data lines.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: January 18, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Yoshiaki Fukuzumi, Jun Fujiki, Shuji Tanaka, Masashi Yoshida, Masanobu Saito, Yoshihiko Kamata
  • Publication number: 20220014167
    Abstract: An acoustic wave device includes a support substrate, a piezoelectric body including LiTaO3, a first electrode on a first main surface of the piezoelectric body, a second electrode on a second main surface, an acoustic-layer laminated body between a support substrate and the piezoelectric body. The azimuth angle of the piezoelectric body is (about 85° to 95°, about 85° to 95°, about 5° to 65°) represented in Euler angles.
    Type: Application
    Filed: September 28, 2021
    Publication date: January 13, 2022
    Inventors: Michio KADOTA, Shuji TANAKA
  • Publication number: 20220014174
    Abstract: An acoustic wave device includes a support substrate, a piezoelectric body, an acoustic layer laminate, first and second electrodes, and a lead-out electrode. The first electrode is on a first main surface of the piezoelectric body, the second electrode is on a second main surface of the piezoelectric body, the lead-out electrode is on the first main surface or the second main surface of the piezoelectric body, the lead-out electrode is electrically connected to the first electrode or the second electrode, side surface grooves extend from the first main surface side of the piezoelectric body, and the side surface grooves are provided in at least a portion of a remaining portion excluding a portion provided with the lead-out electrode from a region in an outer side portion of at least one of the first electrode and the second electrode.
    Type: Application
    Filed: September 28, 2021
    Publication date: January 13, 2022
    Inventors: Michio KADOTA, Shuji TANAKA
  • Publication number: 20210385585
    Abstract: An electrostatic acoustic wave generating device and an electrostatic speaker making entries of dust, water, moisture, etc. into the device and the speaker, allowing reduction in power. A plate-like fixed electrode has a through hole penetrating the thickness of the fixed electrode. A vibrating body and a vibrating electrode each having a plate-like shape are arranged closer to one surface and closer to the other surface of the fixed electrode respectively, and are movable in the respective thickness directions thereof. A connection member connects the vibrating body and the vibrating electrode to each other through the through hole of the fixed electrode to cause the vibrating body and the vibrating electrode to move toward the same direction. Voice signal input is capable of applying a voltage to the fixed electrode, the vibrating body, and the vibrating electrode to move the vibrating body between the fixed electrode and the vibrating body.
    Type: Application
    Filed: August 24, 2021
    Publication date: December 9, 2021
    Applicant: TOHOKU UNIVERSITY
    Inventors: Joerg FROEMEL, Shuji TANAKA, Koichi OHTAKA
  • Publication number: 20210229985
    Abstract: A MEMS device manufacturing method and a MEMS device are provided which can enhance a degree of vacuum inside an operation space and reduce the installation cost and maintenance cost of a manufacturing apparatus as well as manufacturing cost. A MEMS device includes a MEMS device wafer having an operation element formed on a Si substrate, and a CAP wafer provided to cover the MEMS device wafer to form an operation space for operably accommodating the operation element. The CAP wafer is made of silicon and includes vent holes formed to communicate with the operation space. The operation space is sealed by performing a heat treatment in a hydrogen gas atmosphere to close the vent holes by silicon surface migration of the CAP wafer with the CAP wafer and the MEMS device wafer bonded.
    Type: Application
    Filed: May 22, 2019
    Publication date: July 29, 2021
    Applicant: TOHOKU UNIVERSITY
    Inventors: Yukio SUZUKI, Shuji TANAKA, Takashiro TSUKAMOTO
  • Publication number: 20210159883
    Abstract: Energy confinement in acoustic wave devices. In some embodiments, a surface acoustic wave device can include a quartz substrate, a piezoelectric film formed from LiTaO3 or LiNbO3 and disposed over the quartz substrate, and an interdigital transducer electrode formed over the piezoelectric film. The surface acoustic wave device can further include a bonding layer implemented over the piezoelectric film, and a cap layer formed over the bonding layer to thereby substantially confine energy of a propagating wave below the cap layer.
    Type: Application
    Filed: November 22, 2020
    Publication date: May 27, 2021
    Inventors: Michio KADOTA, Shuji TANAKA, Yoshimi ISHII, Hiroyuki NAKAMURA, Keiichi MAKI, Rei GOTO
  • Publication number: 20210083645
    Abstract: Surface acoustic wave device having mass-loaded electrode. In some embodiments, a surface acoustic wave device for providing resonance of a surface acoustic wave having a wavelength ? can include a quartz substrate and a piezoelectric plate formed from LiTaO3 or LiNbO3 disposed over the quartz substrate. The piezoelectric plate can have a thickness greater than 2?. The surface acoustic wave device can further include an interdigital transducer electrode formed over the piezoelectric plate. The interdigital transducer electrode can have a mass density p in a range 1.50 g/cm3<??6.00 g/cm3, 6.00 g/cm3<??12.0 g/cm3, or 12.0 g/cm3<??23.0 g/cm3, and a thickness greater than 0.148?, greater than 0.079?, or greater than 0.036?, respectively.
    Type: Application
    Filed: September 15, 2020
    Publication date: March 18, 2021
    Inventors: Michio KADOTA, Shuji TANAKA, Hiroyuki NAKAMURA
  • Patent number: 10900854
    Abstract: Provided are a pressure sensor which exhibits exceptional performance and a method of producing the same. The pressure sensor includes: a silicon substrate having a cavity; a diaphragm which is formed of a metallic glass and has a tensile stress in a range in which a resonant frequency is higher than an audible range; and a counter electrode which is insulated from the diaphragm and has a plurality of holes. The diaphragm and the counter electrode are disposed on the silicon substrate to face each other with a gap therebetween, the diaphragm and the counter electrode being released from the silicon substrate by the cavity.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: January 26, 2021
    Assignee: Tohoku University
    Inventors: Shuji Tanaka, Joerg Froemel