Patents by Inventor Susumu Maeda
Susumu Maeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9598760Abstract: The present invention provides a nitrided steel member and manufacturing method thereof. the nitrided steel member including: an iron nitride compound layer formed on a surface of a steel member made of carbon steel for machine structural use or alloy steel for machine structural use, in which with regard to X-ray diffraction peak intensity IFe4N (111) of the (111) crystal plane of Fe4N and X-ray diffraction peak intensity IFe3N (111) of the (111) crystal plane of Fe3N obtained by measuring a surface of the nitrided steel member by X-ray diffraction, an intensity ratio represented by IFe4N(111)/{IFe4N (111)+IFe3N (111)} is 0.5 or more, and a thickness of the iron nitride compound layer is 2 to 17 ?m.Type: GrantFiled: February 22, 2012Date of Patent: March 21, 2017Assignees: DOWA THERMOTECH CO., LTD., HONDA MOTOR CO., LTD.Inventors: Yuichiro Shimizu, Atsushi Kobayashi, Susumu Maeda, Masao Kanayama, Kiyotaka Akimoto
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Publication number: 20160293446Abstract: Provided is a method for manufacturing a silicon wafer including a first step of heat-treating a raw silicon wafer sliced from a silicon single crystal ingot grown by the Czochralski method in an oxidizing gas atmosphere at a maximum target temperature of 1300 to 1380° C., a second step of removing an oxide film on a surface of the heated-treated silicon wafer obtained in the first step, and a third step of heat-treating the stripped silicon wafer obtained in the second step in a non-oxidizing gas atmosphere at a maximum target temperature of 1200 to 1380° C. and at a heating rate of 1° C./sec to 150° C./sec in order that the silicon wafer may have a maximum oxygen concentration of 1.3×1018 atoms/cm3 or below in a region from the surface up to 7 ?m in depth.Type: ApplicationFiled: March 28, 2016Publication date: October 6, 2016Applicant: GlobalWafers Japan Co., Ltd.Inventors: Haruo SUDO, Koji ARAKI, Tatsuhiko AOKI, Susumu MAEDA
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Patent number: 9444296Abstract: In a three-phase, four-pole, four-parallel-circuit stator winding of an electrical rotating machine, each of two sets of U-phase output terminals U1, U2 is formed of two sets of parallel circuits each formed of windings having a same pitch (one is formed of first and second winding circuits 1, 2 and the other is formed of third and fourth winding circuits 3, 4). The winding of each winding circuit is formed of two serially-connected coil phase bands (coil phase bands a and b form the first winding circuit 1 and coil phase bands c and d, coil phase bands e and f, and coil phase bands g and h form the second, third, and fourth winding circuits 2, 3, 4, respectively). A voltage vector phase difference and a voltage difference between the winding circuits can be eliminated without providing a jumper wire to winding end portions.Type: GrantFiled: April 19, 2012Date of Patent: September 13, 2016Assignee: Mitsubishi Electric CorporationInventors: Yoichi Funasaki, Kiyonori Koga, Susumu Maeda
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Publication number: 20160244869Abstract: A first nitriding process step is performed in which a steel member is subjected to a nitriding process in a nitriding gas atmosphere having a nitriding potential with which a nitride compound layer having a ?? phase or an e phase is generated, and thereafter a second nitriding process step is performed in which the steel member is subjected to a nitriding process in a nitriding gas atmosphere having a nitriding potential lower than the nitriding potential in the first nitriding process step, to thereby precipitate the ?? phase in the nitride compound layer. It is possible to generate the nitride compound layer having a desired phase mode uniformly all over a component to be treated and to manufacture a nitrided steel member high in pitting resistance and bending fatigue strength.Type: ApplicationFiled: September 30, 2014Publication date: August 25, 2016Inventors: Yuichiro Shimizu, Susumu Maeda, Atsushi Kobayashi
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Patent number: 8999864Abstract: A silicon wafer for preventing a void defect in a bulk region from becoming source of contamination and slip generation in a device process is provided. And a heat-treating method thereof for reducing crystal defects such as COP in a region near the wafer surface to be a device active region is provided. The silicon wafer has a surface region 1 which is a defect-free region and a bulk region 2 including void defect of a polyhedron whose basic shape is an octahedron in which a corner portion of the polyhedron is in the curved shape and an inner-wall oxide film the void defect is removed. The silicon wafer is provided by performing a heat-treating method in which gas to be supplied, inner pressure of spaces and a maximum achievable temperature are set to a predetermined value when subjecting the silicon wafer produced by a CZ method to RTP.Type: GrantFiled: May 28, 2010Date of Patent: April 7, 2015Assignee: Global Wafers Japan Co., Ltd.Inventors: Takeshi Senda, Hiromichi Isogai, Eiji Toyoda, Koji Araki, Tatsuhiko Aoki, Haruo Sudo, Koji Izunome, Susumu Maeda, Kazuhiko Kashima, Hiroyuki Saito
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Publication number: 20150053311Abstract: A nitrided steel member including an iron nitride compound layer formed on a surface of a steel member having predetermined components, wherein: in X-ray diffraction peak intensity IFe4N (111) of a (111) crystal plane of Fe4N and X-ray diffraction peak intensity IFe3N (111) of a (111) crystal plane of Fe3N, which are measured on a surface of the nitrided steel member by X-ray diffraction, an intensity ratio expressed by IFe4N (111)/{IFe4N (111)+IFe3N (111)} is 0.5 or more; Vickers hardness of the iron nitride compound layer is 900 or less, Vickers hardness of a base metal immediately under the iron nitride compound layer is 700 or more, and a difference between the Vickers hardness of the iron nitride compound layer and the Vickers hardness of the base metal is 150 or less; and a thickness of the iron nitride compound layer is 2 to 17 ?m.Type: ApplicationFiled: April 17, 2013Publication date: February 26, 2015Inventors: Yuichiro Shimizu, Atsushi Kobayashi, Susumu Maeda, Masao Kanayama, Hideki Imataka, Masato Yuya, Yuya Gyotoku, Kiyotaka Akimoto
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Publication number: 20140346914Abstract: In a three-phase, four-pole, four-parallel-circuit stator winding of an electrical rotating machine, each of two sets of U-phase output terminals U1, U2 is formed of two sets of parallel circuits each formed of windings having a same pitch (one is formed of first and second winding circuits 1, 2 and the other is formed of third and fourth winding circuits 3, 4). The winding of each winding circuit is formed of two serially-connected coil phase bands (coil phase bands a and b form the first winding circuit 1 and coil phase bands c and d, coil phase bands e and f, and coil phase bands g and h form the second, third, and fourth winding circuits 2, 3, 4, respectively). A voltage vector phase difference and a voltage difference between the winding circuits can be eliminated without providing a jumper wire to winding end portions.Type: ApplicationFiled: April 19, 2012Publication date: November 27, 2014Applicant: Mitsubishi Electrict CorporationInventors: Yoichi Funasaki, Kiyonori Koga, Susumu Maeda
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Publication number: 20140034194Abstract: A steel for nitriding having a chemical composition consisting of, by mass percent, C: 0.07-0.14%, Si: 0.10-0.30%, Mn: 0.4-1.0%, S: 0.005-0.030%, Cr: 1.0-1.5%, Mo: ?0.05% (including 0%), Al: 0.010% or more to less than 0.10%, V: 0.10-0.25%, optionally at least one element selected from Cu: ?0.30% and Ni: ?0.25% [0.61Mn+1.11Cr+0.35Mo+0.47?2.30], and the balance of Fe and impurities. P, N, Ti and O among the impurities are P: ?0.030%, N: ?0.008%, Ti: ?0.005%, and O: ?0.0030%. The steel is easily subjected to cutting before nitriding and suitable for use as an automobile ring gear. The nitrided component having a surface hardness of 650-900 HV, core hardness being ?150 HV, and effective case depth of ?0.15 mm has excellent bending fatigue strength and surface fatigue strength although the content of Mo is as low as ?0.05% and has a small amount of expansion caused by nitriding.Type: ApplicationFiled: January 26, 2012Publication date: February 6, 2014Applicants: HONDA MOTOR CO., LTD., NIPPON STEEL & SUMITOMO METAL CORPORATIONInventors: Hideki Imataka, Masato Yuya, Yuya Gyotoku, Atsushi Kobayashi, Susumu Maeda
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Publication number: 20130333808Abstract: The present invention provides a nitrided steel member and manufacturing method thereof. the nitrided steel member including: an iron nitride compound layer formed on a surface of a steel member made of carbon steel for machine structural use or alloy steel for machine structural use, in which with regard to X-ray diffraction peak intensity IFe4N (111) of the (111) crystal plane of Fe4N and X-ray diffraction peak intensity IFe3N (111) of the (111) crystal plane of Fe3N obtained by measuring a surface of the nitrided steel member by X-ray diffraction, an intensity ratio represented by IFe4N(111)/{IFe4N (111)+IFe3N (111)} is 0.5 or more, and a thickness of the iron nitride compound layer is 2 to 17 ?m.Type: ApplicationFiled: February 22, 2012Publication date: December 19, 2013Applicants: HONDA MOTOR CO., LTD., DOWA THERMOTECH CO., LTD.Inventors: Yuichiro Shimizu, Atsushi Kobayashi, Susumu Maeda, Masao Kanayama, Kiyotaka Akimoto
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Patent number: 8476149Abstract: A silicon wafer produced from a silicon single crystal ingot grown by Czochralski process is subjected to rapid heating/cooling thermal process at a maximum temperature (T1) of 1300° C. or more, but less than 1380° C. in an oxidizing gas atmosphere having an oxygen partial pressure of 20% or more, but less than 100%. The silicon wafer according to the invention has, in a defect-free region (DZ layer) including at least a device active region of the silicon wafer, a high oxygen concentration region having a concentration of oxygen solid solution of 0.7×1018 atoms/cm3 or more and at the same time, the defect-free region contains interstitial silicon in supersaturated state.Type: GrantFiled: July 30, 2009Date of Patent: July 2, 2013Assignee: Global Wafers Japan Co., Ltd.Inventors: Hiromichi Isogai, Takeshi Senda, Eiji Toyoda, Kumiko Murayama, Koji Izunome, Susumu Maeda, Kazuhiko Kashima, Koji Araki, Tatsuhiko Aoki, Haruo Sudo, Yoichiro Mochizuki, Akihiko Kobayashi, Senlin Fu
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Publication number: 20130078588Abstract: A method for heat-treating a silicon wafer is provided in which in-plane uniformity in BMD density along a diameter of a bulk of the wafer grown by the CZ process can be improved. Further, a method for heat-treating a silicon wafer is provided in which in-plane uniformity in BMD size can also be improved and COP of a surface layer of the wafer can be reduced. The method includes a step of a first heat treatment in which the CZ silicon wafer is heated to a temperature from 1325 to 1400° C. in an oxidizing gas atmosphere, held at the temperature, and then cooled at a cooling rate of from 50 to 250° C./second, and a step of a second heat treatment in which the wafer is heated to a temperature from 900 to 1200° C. in a non-oxidizing gas atmosphere, held at the temperature, and then cooled.Type: ApplicationFiled: September 25, 2012Publication date: March 28, 2013Applicant: Covalent Silicon CorporationInventors: Takeshi Senda, Koji Araki, Tatsuhiko Aoki, Haruo Sudo, Susumu Maeda
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Patent number: 8399341Abstract: The invention is to provide a method for heat treating a silicon wafer reducing grown-in defects while suppressing generation of slip during RTP and improving surface roughness of the wafer. The method performing a first heat treatment while introducing a rare gas, the first heat treatment comprising the steps of rapidly heating the wafer to T1 of 1300° C. or higher and the melting point of silicon or lower, keeping the wafer at T1, rapidly cooling the wafer to T2 of 400-800° C. and keeping the wafer at T2; and performing a second heat treatment while introducing an oxygen gas in an amount of 20-100 vol. %, the second heat treatment comprising the steps of keeping the wafer at T2, rapidly heating the wafer from T2 to T3 of 1250° C. or higher and the melting point of silicon or lower, keeping the wafer at T3 and rapidly cooling the wafer.Type: GrantFiled: May 17, 2010Date of Patent: March 19, 2013Assignee: Covalent Materials CorporationInventors: Takeshi Senda, Hiromichi Isogai, Eiji Toyoda, Kumiko Murayama, Koji Araki, Tatsuhiko Aoki, Haruo Sudo, Koji Izunome, Susumu Maeda, Kazuhiko Kashima
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Patent number: 8252700Abstract: In a method of heat treating a wafer obtained by slicing a silicon single crystal ingot manufactured by the Czochralski method, a rapid heating/cooling heat treatment is carried out by setting a holding time at an ultimate temperature of 1200° C. or more and a melting point of silicon or less to be equal to or longer than one second and to be equal to or shorter than 60 seconds in a mixed gas atmosphere containing oxygen having an oxygen partial pressure of 1.0% or more and 20% or less and argon, and an oxide film having a thickness of 9.1 nm or less or 24.3 nm or more is thus formed on a surface of the silicon wafer.Type: GrantFiled: January 21, 2010Date of Patent: August 28, 2012Assignee: Covalent Materials CorporationInventors: Takeshi Senda, Hiromichi Isogai, Eiji Toyoda, Kumiko Murayama, Koji Araki, Tatsuhiko Aoki, Haruo Sudo, Koji Izunome, Susumu Maeda, Kazuhiko Kashima
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Publication number: 20120184091Abstract: The invention is to provide a method for heat treating a silicon wafer reducing grown-in defects while suppressing generation of slip during RTP and improving surface roughness of the wafer. The method performing a first heat treatment while introducing a rare gas, the first heat treatment comprising the steps of rapidly heating the wafer to T1 of 1300° C. or higher and the melting point of silicon or lower, keeping the wafer at T1, rapidly cooling the wafer to T2 of 400-800° C. and keeping the wafer at T2; and performing a second heat treatment while introducing an oxygen gas in an amount of 20-100 vol. %, the second heat treatment comprising the steps of keeping the wafer at T2, rapidly heating the wafer from T2 to T3 of 1250° C. or higher and the melting point of silicon or lower, keeping the wafer at T3 and rapidly cooling the wafer.Type: ApplicationFiled: May 17, 2010Publication date: July 19, 2012Applicant: Covalent Materials CorporationInventors: Takeshi Senda, Hiromichi Isogai, Eiji Toyoda, Kumiko Murayama, Koji Araki, Tatsuhiko Aoki, Haruo Sudo, Koji Izunome, Susumu Maeda, Kazuhiko Kashima
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Publication number: 20120139088Abstract: A silicon wafer for preventing a void defect in a bulk region from becoming source of contamination and slip generation in a device process is provided. And a heat-treating method thereof for reducing crystal defects such as COP in a region near the wafer surface to be a device active region is provided. The silicon wafer has a surface region 1 which is a defect-free region and a bulk region 2 including void defect of a polyhedron whose basic shape is an octahedron in which a corner portion of the polyhedron is in the curved shape and an inner-wall oxide film the void defect is removed. The silicon wafer is provided by performing a heat-treating method in which gas to be supplied, inner pressure of spaces and a maximum achievable temperature are set to a predetermined value when subjecting the silicon wafer produced by a CZ method to RTP.Type: ApplicationFiled: May 28, 2010Publication date: June 7, 2012Applicant: Covalent Materials CorporationInventors: Takeshi Senda, Hiromichi Isogai, Eiji Toyoda, Koji Araki, Tatsuhiko Aoki, Haruo Sudo, Koji Izunome, Susumu Maeda, Kazuhiko Kashima, Hiroyuki Saito
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Patent number: 8119404Abstract: The invention provides polypeptides comprising inhibitor of apoptosis protein (IAP) family members, such as BmIAP initially derived from Bombyx mori BmN cells, and nucleic acids encoding them, and methods for making and using these compositions, including their use for inhibiting apoptosis.Type: GrantFiled: July 8, 2010Date of Patent: February 21, 2012Assignee: Sanford-Burnham Medical Research InstituteInventors: Qihong Huang, John C. Reed, Bruce D. Hammock, Quinn L. Deveraux, Susumu Maeda, Hiroko Maeda, legal representative
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Patent number: 7977219Abstract: In a manufacturing method for a silicon wafer, a first heat treatment process is performed on the silicon wafer while introducing a first gas having an oxygen gas in an amount of 0.01 vol. % or more and 1.00 vol. % or less and a rare gas, and a second heat treatment process is performed while stopping introducing the first gas and introducing a second gas having an oxygen gas in an amount of 20 vol. % or more and 100 vol. % or less and a rare gas. In the first heat treatment process, the silicon wafer is rapidly heated to first temperature of 1300° C. or higher and a melting point of silicon or lower at a first heating rate, and kept at the first temperature. In the second heat treatment process, the silicon wafer is kept at the first temperature, and rapidly cooled from the first temperature at a first cooling rate.Type: GrantFiled: July 30, 2009Date of Patent: July 12, 2011Assignee: Covalent Materials CorporationInventors: Hiromichi Isogai, Takeshi Senda, Eiji Toyoda, Kumiko Murayama, Koji Izunome, Susumu Maeda, Kazuhiko Kashima
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Patent number: 7898127Abstract: A stator of a rotating electric machine is obtained, in which material usage in a conductor connection section of a stator coil end and weight of the conductor connection section are reduced, so that vibration suppression is improved, in addition, thermal resistance between a loss occurrence portion and a cooled portion becomes smaller so that temperature rise is suppressed.Type: GrantFiled: December 23, 2008Date of Patent: March 1, 2011Assignee: Mitsubishi Electric CorporationInventors: Susumu Maeda, Kazuki Nakanishi
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Patent number: 7875117Abstract: An epitaxial wafer and a high-temperature heat treatment wafer having an excellent gettering capability are obtained by performing epitaxial growth or a high-temperature heat treatment. A relational equation relating the density to the radius of an oxygen precipitate introduced in a silicon crystal doped with nitrogen at the time of crystal growth can be derived from the nitrogen concentration and the cooling rate around 1100° C. during crystal growth, and the oxygen precipitate density to be obtained after a heat treatment can be predicted from the derived relational equation relating the oxygen precipitate density to the radius, the oxygen concentration, and the wafer heat treatment process. Also, an epitaxially grown wafer and a high-temperature annealed wafer whose oxygen precipitate density has been controlled to an appropriate density are obtained, using conditions predicted by the method.Type: GrantFiled: August 11, 2005Date of Patent: January 25, 2011Assignee: Sumco Techxiv CorporationInventors: Kouzo Nakamura, Susumu Maeda, Kouichirou Hayashida, Takahisa Sugiman, Katsuhiko Sugisawa
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Publication number: 20100275284Abstract: The invention provides polypeptides comprising inhibitor of apoptosis protein (IAP) family members, such as BmIAP initially derived from Bombyx mori BmN cells, and nucleic acids encoding them, and methods for making and using these compositions, including their use for inhibiting apoptosis.Type: ApplicationFiled: July 8, 2010Publication date: October 28, 2010Applicants: Burnham Institute for Medical Research, The Regents of the University of CaliforniaInventors: Qihong Huang, John C. Reed, Bruce D. Hammock, Quinn L. Deveraux, Susumu Maeda, Hiroko Maeda