Patents by Inventor Takashi Yokoyama

Takashi Yokoyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180277594
    Abstract: The present technology relates to a semiconductor device which enables yield to be enhanced. A volatile logic circuit has a storage node, and stores inputted information. A plurality of non-volatile elements are connected to the storage node of the volatile logic circuit through the same connection gate, and control lines for control for these non-volatile elements are connected to the respective non-volatile elements, every non-volatile element. A plurality of non-volatile elements are connected to the volatile logic circuit through the same connection gate in such a way, thereby enabling the yield to be enhanced. The present technology can be applied to a semiconductor device.
    Type: Application
    Filed: September 16, 2016
    Publication date: September 27, 2018
    Inventors: Yasuo KANDA, Takashi YOKOYAMA
  • Publication number: 20180240797
    Abstract: A stacked body according to an embodiment of the present technology includes: a plurality of transistors; a first substrate; and a second substrate that is stacked with the first substrate and is electrically coupled to the first substrate, in which a first transistor to be driven at a first driving voltage being a lowest voltage of the plurality of transistors is provided only in the first substrate of the first substrate and the second substrate to form a first circuit.
    Type: Application
    Filed: August 9, 2016
    Publication date: August 23, 2018
    Inventors: Takashi YOKOYAMA, Taku UMEBAYASHI
  • Publication number: 20180233539
    Abstract: A semiconductor device including a transistor on a main surface side of a semiconductor substrate; and a resistance change element on a back-surface side of the semiconductor substrate, wherein the transistor includes a low-resistance section in the semiconductor substrate, the low-resistance section extending to the back surface of the semiconductor substrate, an insulating film is provided in contact with a back surface of the low-resistance section, the insulating film has an opening facing the low-resistance section, and the resistance change element is connected to the low-resistance section through the opening.
    Type: Application
    Filed: April 13, 2018
    Publication date: August 16, 2018
    Applicant: Sony Corporation
    Inventor: Takashi Yokoyama
  • Patent number: 10049712
    Abstract: A semiconductor device includes a flip-flop circuit, a control line, a first P-type transistor and a first non-volatile storage element, and a second P-type transistor and a second non-volatile storage element. The flip-flop circuit has a circular structure in which a first inverter circuit, a first connection line including a first node, a second inverter circuit, and a second connection line including a second node are coupled in order. The first P-type transistor and the first non-volatile storage element are coupled together in series between the first node and the control line. The second P-type transistor and the second non-volatile storage element are coupled together in series between the second node and the control line. The non-volatile storage element is a magnetic tunnel junction element including a pinned layer, a tunnel barrier layer, and a free layer arranged in order from a position close to the control line.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: August 14, 2018
    Assignee: Sony Corporation
    Inventors: Takashi Yokoyama, Shunsaku Tokito, Hiroshi Hasegawa, Hajime Yamagishi
  • Publication number: 20180226571
    Abstract: The present disclosure relates to a memory cell structure, a method of manufacturing a memory, and a memory apparatus that are capable of providing a memory cell structure of an MRAM, which reduces resistance of drawn wiring to be connected to an MTJ, reduces an area of a memory cell, and avoids performance degradation of the MTJ due to heat. A memory cell includes: a transistor that uses a first diffusion layer formed in a bottom portion of a concave portion formed by processing a silicon substrate into a groove shape, and a second diffusion layer formed in upper end portions of two opposing sidewall portions of the concave portion, to form channels at portions between the first diffusion layer and the second diffusion layer in the two sidewall portions; and a memory element that is disposed below the first diffusion layer. The first diffusion layer is electrically connected to the memory element via a contact formed after the silicon substrate is thinned.
    Type: Application
    Filed: April 6, 2018
    Publication date: August 9, 2018
    Inventors: Taku UMEBAYASHI, Shunichi SUKEGAWA, Takashi YOKOYAMA, Masanori HOSOMI, Yutaka HIGO
  • Publication number: 20180207730
    Abstract: A method for cutting an inner circumferential surface of a rotating hollow cylindrical workpiece includes: holding the workpiece with a chucking device such that a side surface of the workpiece on a first side in an axial direction of the workpiece is in contact with a contact surface of the chucking device; setting an intersection angle between a rotational center line of the workpiece and an imaginary straight line to an angle smaller than 45 degrees, the straight line being parallel to an axis line of a button tip and intersecting with the rotational center line; and setting a feed direction of the button tip to the inner circumferential surface to a direction from a second side in the axial direction of the workpiece toward the first side in the axial direction thereof, and cutting the inner circumferential surface by use of the button tip rotating about the axis line.
    Type: Application
    Filed: January 11, 2018
    Publication date: July 26, 2018
    Applicant: JTEKT CORPORATION
    Inventors: Takashi YOKOYAMA, Masami NARISAWA, Shogo KUROYANAGI, Yoshinobu SHICHIRI
  • Publication number: 20180204871
    Abstract: A semiconductor device including a semiconductor layer that includes an active region, semiconductor elements that are formed using the active region, connection regions that are obtained by metalizing parts of the semiconductor layer in an island shape isolated from the active region, an insulation film that is formed to cover one main surface side of the semiconductor layer, electrodes that are disposed to face the semiconductor elements and the connection regions via the insulation film, and contacts that penetrate through the insulation film to be selectively formed in portions according to necessity among portions that connect the semiconductor elements or the connection regions to the electrodes.
    Type: Application
    Filed: March 12, 2018
    Publication date: July 19, 2018
    Applicant: Sony Corporation
    Inventor: Takashi Yokoyama
  • Publication number: 20180197916
    Abstract: A semiconductor device including a semiconductor substrate with a first surface and a second surface facing each other, the semiconductor substrate having an element region in which a transistor is provided on the first surface, and a separation region in which an element separating layer surrounding the element region is provided; a contact plug extending from the first surface to the second surface, in the element region of the semiconductor substrate; and an insulating film covering a periphery of the contact plug.
    Type: Application
    Filed: March 6, 2018
    Publication date: July 12, 2018
    Applicant: Sony Corporation
    Inventors: Takashi Yokoyama, Taku Umebayashi
  • Patent number: 10002907
    Abstract: A semiconductor device including a transistor on a main surface side of a semiconductor substrate; and a resistance change element on a back-surface side of the semiconductor substrate, wherein the transistor includes a low-resistance section in the semiconductor substrate, the low-resistance section extending to the back surface of the semiconductor substrate, an insulating film is provided in contact with a back surface of the low-resistance section, the insulating film has an opening facing the low-resistance section, and the resistance change element is connected to the low-resistance section through the opening.
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: June 19, 2018
    Assignee: SONY CORPORATION
    Inventor: Takashi Yokoyama
  • Publication number: 20180158862
    Abstract: A semiconductor device including a semiconductor substrate having a first surface and a second surface that face each other, and having an element region and an isolation region, the element region including a transistor in the first surface, and the isolation region including an element isolation layer surrounding the element region; and a contact plug extending from the first surface to the second surface in the isolation region of the semiconductor substrate.
    Type: Application
    Filed: January 30, 2018
    Publication date: June 7, 2018
    Inventors: Takashi Yokoyama, Taku Umebayashi
  • Patent number: 9972772
    Abstract: The present disclosure relates to a memory cell structure, a method of manufacturing a memory, and a memory apparatus that are capable of providing a memory cell structure of an MRAM, which reduces resistance of drawn wiring to be connected to an MTJ, reduces an area of a memory cell, and avoids performance degradation of the MTJ due to heat. A memory cell includes: a transistor that uses a first diffusion layer formed in a bottom portion of a concave portion formed by processing a silicon substrate into a groove shape, and a second diffusion layer formed in upper end portions of two opposing sidewall portions of the concave portion, to form channels at portions between the first diffusion layer and the second diffusion layer in the two sidewall portions; and a memory element that is disposed below the first diffusion layer. The first diffusion layer is electrically connected to the memory element via a contact formed after the silicon substrate is thinned.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: May 15, 2018
    Assignee: Sony Corporation
    Inventors: Taku Umebayashi, Shunichi Sukegawa, Takashi Yokoyama, Masanori Hosomi, Yutaka Higo
  • Patent number: 9954031
    Abstract: A semiconductor device including a semiconductor substrate with a first surface and a second surface facing each other, the semiconductor substrate having an element region in which a transistor is provided on the first surface, and a separation region in which an element separating layer surrounding the element region is provided; a contact plug extending from the first surface to the second surface, in the element region of the semiconductor substrate; and an insulating film covering a periphery of the contact plug.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: April 24, 2018
    Assignee: SONY CORPORATION
    Inventors: Takashi Yokoyama, Taku Umebayashi
  • Publication number: 20180105088
    Abstract: A vehicular article-accommodating structure, comprising a lid front part provided with an opening of such size as to be larger than the cross-sectional diameter of a cup but also capable of preventing tipping and falling of the cup, a link mechanism for causing the lid front part to perform a translational movement between a first position and a second position, and a lower part of a bottom part and an upper part of a bottom part for receiving the bottom surface of the cup at the first position and the second position. The second position is a high position having a height greater than that of the first position, and is a position rearward from the first position. The height of the lid front part can be changed by a prescribed distance, and furthermore the distance from the lid front part to a passenger can be reduced by a prescribed distance. It is possible for the structure to be suitably easy to use by individual passengers having different physical builds.
    Type: Application
    Filed: October 11, 2017
    Publication date: April 19, 2018
    Inventor: Takashi YOKOYAMA
  • Patent number: 9947710
    Abstract: A semiconductor device including a semiconductor layer that includes an active region, semiconductor elements that are formed using the active region, connection regions that are obtained by metalizing parts of the semiconductor layer in an island shape isolated from the active region, an insulation film that is formed to cover one main surface side of the semiconductor layer, electrodes that are disposed to face the semiconductor elements and the connection regions via the insulation film, and contacts that penetrate through the insulation film to be selectively formed in portions according to necessity among portions that connect the semiconductor elements or the connection regions to the electrodes.
    Type: Grant
    Filed: January 11, 2017
    Date of Patent: April 17, 2018
    Assignee: SONY CORPORATION
    Inventor: Takashi Yokoyama
  • Publication number: 20180079047
    Abstract: A cutting tool includes: a cutting part including a cutting edge having a linear shape; and a fitted part including a fixed section to which the cutting part is fixed, and a fitted part body to be fitted to a cutting device. The cutting edge is located perpendicularly to a virtual line passing through a central axis of the fitted part body, on a plane that is perpendicular to the central axis of the fitted part body. A center of the cutting edge in its longitudinal direction is located on the virtual line.
    Type: Application
    Filed: September 6, 2017
    Publication date: March 22, 2018
    Applicant: JTEKT CORPORATION
    Inventor: Takashi YOKOYAMA
  • Patent number: 9917129
    Abstract: A semiconductor device includes: a semiconductor substrate having a first surface and a second surface that face each other, and having an element region and an isolation region, the element region including a transistor in the first surface, and the isolation region including an element isolation layer surrounding the element region; and a contact plug extending from the first surface to the second surface in the isolation region of the semiconductor substrate.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: March 13, 2018
    Assignee: SONY CORPORATION
    Inventors: Takashi Yokoyama, Taku Umebayashi
  • Patent number: 9903044
    Abstract: There is provided a silicon single crystal producing method in producing a silicon single crystal by the Czochralski method using a pulling apparatus including a heat shield, wherein an oxygen concentration in the crystal is controlled through the adjustment of a flow velocity of inert gas introduced into the apparatus at the gap portion between an exterior surface of the single crystal and a lower-end opening edge of the heat shield, in accordance with a gap-to-crystal-diameter ratio (“the area of the gap portion”/“the area of a cross-sectional of the single crystal”). By this producing method, it is possible to appropriately control the oxygen concentration in the pulled single crystal.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: February 27, 2018
    Assignee: SUMCO CORPORATION
    Inventors: Kazumi Tanabe, Takashi Yokoyama, Tegi Kim
  • Publication number: 20180029137
    Abstract: A work holder includes: a first holding part having three attracting members that are arranged circumferentially apart from each other to attract an axial end face of an annular work; and a second holding part having a contacting member that is held in contact with an inner periphery or outer periphery of the work and restricts radial movement of the work.
    Type: Application
    Filed: July 26, 2017
    Publication date: February 1, 2018
    Applicant: JTEKT CORPORATION
    Inventors: Takashi YOKOYAMA, Masami NARISAWA, Shogo KUROYANAGI, Yoshinobu SHICHIRI
  • Publication number: 20180025765
    Abstract: A semiconductor device includes a flip-flop circuit, a control line, a first P-type transistor and a first non-volatile storage element, and a second P-type transistor and a second non-volatile storage element. The flip-flop circuit has a circular structure in which a first inverter circuit, a first connection line including a first node, a second inverter circuit, and a second connection line including a second node are coupled in order. The first P-type transistor and the first non-volatile storage element are coupled together in series between the first node and the control line. The second P-type transistor and the second non-volatile storage element are coupled together in series between the second node and the control line. The non-volatile storage element is a magnetic tunnel junction element including a pinned layer, a tunnel barrier layer, and a free layer arranged in order from a position close to the control line.
    Type: Application
    Filed: October 23, 2015
    Publication date: January 25, 2018
    Inventors: Takashi Yokoyama, Shunsaku Tokito, Hiroshi Hasegawa, Hajime Yamagishi
  • Publication number: 20180009353
    Abstract: A configuration is adopted such that the shape of a peripheral wall portion of a shell-shaped seat back skeleton can be freely set without being restricted by the presence of brackets, the incidence of warping of the seat back skeleton when a vehicle is involved in a rear-end or head-on collision is reduced, and the seat back skeleton does not lose strength even when brackets are affixed to the seat back skeleton. A seat cushion skeleton 8 and the seat back skeleton 9 are coupled by coupling means 19a, 19b, and the seat back skeleton 9 has a main body 14 facing the back of a seated passenger, and a peripheral wall part 15 provided to the peripheral edge of the main body 14. The main body 14 and the peripheral edge part 15 are formed into an integrated shell shape using a synthetic resin. The coupling means 19a, 19b have first brackets 21a, 21b that are joined to the seat back skeleton 9, the first brackets 21a, 21b being affixed by bonding to the main body 14 of the seat back skeleton 9.
    Type: Application
    Filed: January 12, 2016
    Publication date: January 11, 2018
    Inventors: Takashi YOKOYAMA, Naoyuki MAKITA