Patents by Inventor Takeshi Furusawa

Takeshi Furusawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200127632
    Abstract: Aspects of this disclosure relate to methods of manufacturing bulk acoustic wave components. Such methods include plasma dicing to singulate individual bulk acoustic wave components. A buffer layer can be formed over a substrate of bulk acoustic wave components such that streets are exposed.
    Type: Application
    Filed: October 10, 2019
    Publication date: April 23, 2020
    Inventors: Atsushi Takano, Takeshi Furusawa, Mitsuhiro Furukawa
  • Publication number: 20200077510
    Abstract: Devices and methods related to nested filters. In some embodiments, a radio-frequency device can include a substrate, and first and second filter devices mounted on the substrate with respective support structures, such that at least a portion of the second filter device is positioned in a space defined by an underside of the first filter device and the support structures for the first filter device. Such a radio-frequency device can be, for example, a packaged module for use in an electronic device such as a wireless device.
    Type: Application
    Filed: August 31, 2019
    Publication date: March 5, 2020
    Inventors: Robert Francis DARVEAUX, Ki Wook LEE, Takeshi FURUSAWA, Sundeep Nand NANGALIA, Russ Alan REISNER, John C. BALDWIN
  • Patent number: 9980371
    Abstract: A printed wiring board includes a resin insulating layer having recess portions formed on first surface, a first conductor layer formed in the recess portions and including pads positioned to mount an electronic component, conductive pillars formed on the pads, respectively, and formed to mount the electronic component onto the resin insulating layer, a second conductor layer formed on second surface of the resin insulating layer on the opposite side with respect to the first surface, and a via conductor formed in the resin insulating layer such that the via conductor is penetrating through the resin insulating layer and connecting the first and second conductor layers. The pillars is formed such that each of the pads has an exposed surface exposed from a respective one of the conductive pillars, and the pads are formed such that the exposed surface is recessed from the first surface of the resin insulating layer.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: May 22, 2018
    Assignee: IBIDEN CO., LTD.
    Inventors: Takayuki Katsuno, Yuki Ito, Takeshi Furusawa, Takema Adachi
  • Patent number: 9917025
    Abstract: A printed wiring board includes a first circuit board having a first surface and a second surface, and a second circuit board having a third surface and a fourth surface and having a mounting area on the third surface of the second circuit board. The first circuit board is laminated on the third surface of the second circuit board such that the first surface of the first circuit board is in contact with the third surface of the second circuit board, the first circuit board includes reinforcing material and has an opening portion exposing the mounting area of the second circuit board, and the first circuit board and the second circuit board are formed such that a ratio H1/h1 is in a range that is greater than 0.75 and smaller than 2.4, where H1 represents a thickness of the first circuit board and h1 represents a thickness of the second circuit board.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: March 13, 2018
    Assignee: IBIDEN CO., LTD.
    Inventors: Kota Noda, Takeshi Furusawa
  • Patent number: 9793200
    Abstract: A printed wiring board includes a first circuit board having a first surface and a second surface on the opposite side with respect to the first surface, and a second circuit board having a third surface and a fourth surface on the opposite side with respect to the third surface and having a mounting area on the third surface of the second circuit board. The first circuit board is laminated on the third surface of the second circuit board such that the first surface of the first circuit board faces the third surface of the second circuit board, and the first circuit board includes reinforcing material and has an opening portion exposing the mounting area of the second circuit board.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: October 17, 2017
    Assignee: IBIDEN CO., LTD.
    Inventors: Kota Noda, Takeshi Furusawa
  • Patent number: 9723729
    Abstract: A printed wiring board includes a substrate, a first conductor layer formed on first surface of the substrate, a second conductor layer formed on second surface of the substrate, a through-hole conductor penetrating through the substrate and connecting the first and second conductor layers, a build-up layer formed on the second surface of the substrate and including conductor layers, insulating layers and via conductors, and a first insulating layer formed on the first surface the substrate and covering the first conductor layer. The substrate has a cavity penetrating through the first insulating layer and substrate and exposing the build-up layer on the substrate, the via conductors include a lowermost via conductor having a bottom portion exposed at bottom of the cavity, and the bottom portion of the lowermost via conductor is recessed relative to surface of a lowermost insulating layer in the build-up layer at the bottom of the cavity.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: August 1, 2017
    Assignee: IBIDEN CO., LTD.
    Inventors: Takeshi Furusawa, Kota Noda
  • Patent number: 9713267
    Abstract: A method for manufacturing a printed wiring board with conductive posts includes forming on a first foil provided on carrier a first conductive layer including mounting pattern to connect electronic component via conductive posts, forming on the first foil a laminate including an insulating layer and a second foil to form the laminate on the first conductive layer, removing the carrier, forming a metal film on the laminate and first film, forming resist on the metal film to have pattern exposing portion of the metal film corresponding to the mounting pattern and portion of the second foil for a second conductive layer, forming an electroplating layer on the portion of the metal film not covered by the resist, removing the resist, and applying etching to remove the first and second foils below the metal film exposed by the removing the resist and to form the posts on the mounting pattern.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: July 18, 2017
    Assignee: IBIDEN CO., LTD.
    Inventors: Toru Furuta, Takeshi Furusawa, Tomoya Terakura
  • Patent number: 9497849
    Abstract: A printed wiring board includes a core substrate, first and second buildup structures on surfaces of the core, respectively, and first and second solder-resist layers on the first and second structures, respectively. The core includes insulative substrate, conductive layers on surfaces of the substrate and through-hole conductor connecting the conductive layers, the first structure includes interlayer insulation layer and conductive layer in the first structure, the second structure includes interlayer insulation layer and conductive layer in the second structure, a thickness between the outer surfaces of the first and second solder-resist layers is set in range of from 150 ?m or greater and less than 380 ?m, and at least one of the core, first and second structures, and first and second solder-resist layers includes reinforcing material in amount such that the board includes the material in amount in range of from 20 to 35 vol. %.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: November 15, 2016
    Assignee: IBIDEN CO., LTD.
    Inventors: Takashi Kariya, Toshiki Furutani, Takeshi Furusawa
  • Patent number: 9474158
    Abstract: A wiring board includes a first resin insulation layer, an electronic component positioned on first surface of the first insulation layer, a second resin insulation layer formed on the first surface of the first insulation layer such that the second insulation layer is embedding the electronic component, a conductive layer formed on the second insulation layer, a third resin insulation layer formed on the conductive layer and second insulation layer, and a connection via conductor formed in the second insulation layer such that the connection via conductor is connecting electrode of the electronic component and conductive layer on the second insulation layer. The first insulation layer has a pad structure on second surface side of the first insulation layer on opposite side of the first surface, and the first insulation layer has coefficient of thermal expansion set lower than coefficients of thermal expansion of the second and third insulation layers.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: October 18, 2016
    Assignee: IBIDEN CO., LTD.
    Inventors: Toshiki Furutani, Takeshi Furusawa, Keisuke Shimizu, Yuichi Nakamura
  • Publication number: 20160242285
    Abstract: A printed wiring board includes a resin insulating layer having recess portions formed on first surface, a first conductor layer formed in the recess portions and including pads positioned to mount an electronic component, conductive pillars formed on the pads, respectively, and formed to mount the electronic component onto the resin insulating layer, a second conductor layer formed on second surface of the resin insulating layer on the opposite side with respect to the first surface, and a via conductor formed in the resin insulating layer such that the via conductor is penetrating through the resin insulating layer and connecting the first and second conductor layers. The pillars is formed such that each of the pads has an exposed surface exposed from a respective one of the conductive pillars, and the pads are formed such that the exposed surface is recessed from the first surface of the resin insulating layer.
    Type: Application
    Filed: February 16, 2016
    Publication date: August 18, 2016
    Applicant: IBIDEN CO., LTD.
    Inventors: Takayuki Katsuno, Yuki Ito, Takeshi Furusawa, Takema Adachi
  • Patent number: 9401320
    Abstract: A combined substrate includes a first substrate having multiple first metal posts, a second substrate having multiple second metal posts such that the second metal posts are positioned to oppose the first metal posts, respectively, and multiple solder structures interposed between the first metal posts and the second metal posts, respectively. The first metal posts and/or the second metal posts have recessed surfaces formed such that the solder structures are formed on the recessed surfaces, respectively.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: July 26, 2016
    Assignee: IBIDEN CO., LTD.
    Inventors: Tomoya Daizo, Takema Adachi, Takeshi Furusawa, Wataru Nakamura, Yuki Ito, Yuki Yoshikawa, Tomoyoshi Hirabayashi
  • Patent number: 9368459
    Abstract: A semiconductor device including a low dielectric constant film of which the relative dielectric constant is less than 3.5, is provided with one or more seal rings that are moisture blocking walls forming a closed loop in a plan view, and where at least one of the seal rings includes a seal ring protrusion portion in inward protruding form in the vicinity of a chip corner.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: June 14, 2016
    Assignee: ACACIA RESEARCH GROUP LLC
    Inventors: Takeshi Furusawa, Noriko Miura, Kinya Goto, Masazumi Matsuura
  • Publication number: 20160120033
    Abstract: A printed wiring board includes a substrate, a first conductor layer formed on first surface of the substrate, a second conductor layer formed on second surface of the substrate, a through-hole conductor penetrating through the substrate and connecting the first and second conductor layers, a build-up layer formed on the second surface of the substrate and including conductor layers, insulating layers and via conductors, and a first insulating layer formed on the first surface the substrate and covering the first conductor layer. The substrate has a cavity penetrating through the first insulating layer and substrate and exposing the build-up layer on the substrate, the via conductors include a lowermost via conductor having a bottom portion exposed at bottom of the cavity, and the bottom portion of the lowermost via conductor is recessed relative to surface of a lowermost insulating layer in the build-up layer at the bottom of the cavity.
    Type: Application
    Filed: October 23, 2015
    Publication date: April 28, 2016
    Applicant: IBIDEN CO., LTD.
    Inventors: Takeshi FURUSAWA, Kota NODA
  • Publication number: 20160113110
    Abstract: A printed wiring board includes a substrate, a first conductor layer formed on first surface of the substrate, a second conductor layer formed on second surface of the substrate, a through-hole conductor penetrating through the substrate and connecting the first and second conductor layers, a build-up layer formed on the second surface of the substrate and including conductor layers and insulating layers, and a first insulating layer formed on the first surface of the substrate such that the first insulating layer is covering the first conductor layer on the substrate. The substrate has a cavity penetrating through the first insulating layer and substrate such that the cavity is exposing the build-up layer on the second surface of the substrate, and the substrate and insulating layers in the build-up layer are formed such that difference between thermal expansion coefficients of the substrate and insulating layers is set 15 ppm or less.
    Type: Application
    Filed: October 21, 2015
    Publication date: April 21, 2016
    Applicant: IBIDEN CO., LTD.
    Inventors: Takeshi FURUSAWA, Kota NODA
  • Publication number: 20150366061
    Abstract: A printed wiring board includes a first circuit board having a first surface and a second surface, and a second circuit board having a third surface and a fourth surface and having a mounting area on the third surface of the second circuit board. The first circuit board is laminated on the third surface of the second circuit board such that the first surface of the first circuit board is in contact with the third surface of the second circuit board, the first circuit board includes reinforcing material and has an opening portion exposing the mounting area of the second circuit board, and the first circuit board and the second circuit board are formed such that a ratio H1/h1 is in a range of from 0.75 to 2.4, where H1 represents a thickness of the first circuit board and h2 represents a thickness of the second circuit board.
    Type: Application
    Filed: June 16, 2015
    Publication date: December 17, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Kota NODA, Takeshi FURUSAWA
  • Publication number: 20150366062
    Abstract: A printed wiring board includes a first circuit board having a first surface and a second surface on the opposite side with respect to the first surface, and a second circuit board having a third surface and a fourth surface on the opposite side with respect to the third surface and having a mounting area on the third surface of the second circuit board. The first circuit board is laminated on the third surface of the second circuit board such that the first surface of the first circuit board faces the third surface of the second circuit board, and the first circuit board includes reinforcing material and has an opening portion exposing the mounting area of the second circuit board.
    Type: Application
    Filed: June 16, 2015
    Publication date: December 17, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Kota NODA, Takeshi Furusawa
  • Publication number: 20150282314
    Abstract: A method for manufacturing a printed wiring board with conductive posts includes forming on a first foil provided on carrier a first conductive layer including mounting pattern to connect electronic component via conductive posts, forming on the first foil a laminate including an insulating layer and a second foil to form the laminate on the first conductive layer, removing the carrier, forming a metal film on the laminate and first film, forming resist on the metal film to have pattern exposing portion of the metal film corresponding to the mounting pattern and portion of the second foil for a second conductive layer, forming an electroplating layer on the portion of the metal film not covered by the resist, removing the resist, and applying etching to remove the first and second foils below the metal film exposed by the removing the resist and to form the posts on the mounting pattern.
    Type: Application
    Filed: March 31, 2015
    Publication date: October 1, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Toru FURUTA, Takeshi FURUSAWA, Tomoya TERAKURA
  • Publication number: 20150255433
    Abstract: A combined substrate includes a first substrate having multiple first metal posts, a second substrate having multiple second metal posts such that the second metal posts are positioned to oppose the first metal posts, respectively, and multiple solder structures interposed between the first metal posts and the second metal posts, respectively. The first metal posts and/or the second metal posts have recessed surfaces formed such that the solder structures are formed on the recessed surfaces, respectively.
    Type: Application
    Filed: March 4, 2015
    Publication date: September 10, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Tomoya DAIZO, Takema Adachi, Takeshi Furusawa, Wataru Nakamura, Yuki Ito, Yuki Yoshikawa, Tomoyoshi Hirabayashi
  • Publication number: 20150108613
    Abstract: A semiconductor device including a low dielectric constant film of which the relative dielectric constant is less than 3.5, is provided with one or more seal rings that are moisture blocking walls forming a closed loop in a plan view, and where at least one of the seal rings includes a seal ring protrusion portion in inward protruding form in the vicinity of a chip corner.
    Type: Application
    Filed: December 23, 2014
    Publication date: April 23, 2015
    Applicant: Renesas Electronics Corporation
    Inventors: Takeshi FURUSAWA, Noriko MIURA, Kinya GOTO, Masazumi MATSUURA
  • Patent number: 8975742
    Abstract: A printed wiring board includes a substrate, a first buildup formed on a first surface of the substrate and including the outermost conductive layer, and a second buildup layer formed on a second surface of the substrate and including the outermost conductive layer. The outermost layer of the first buildup has pads positioned to connect a semiconductor component, the first buildup has a component mounting region directly under the component such that the outermost layer of the first buildup has a portion in the region, the outermost layer of the second buildup has a portion directly under the region, and the portions satisfy the ratio in the range of from 1.1 to 1.35, where the ratio is obtained by dividing a planar area of the portion of the second buildup by a planar area of the portion of the first buildup.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: March 10, 2015
    Assignee: IBIDEN Co., Ltd.
    Inventors: Toshiki Furutani, Takeshi Furusawa