Abstract: Two first semiconductor layers are on a silicon substrate at a given distance from each other. Two second semiconductor layers are on the respective first semiconductor layers and includes a material different from a material of the first semiconductor layers. A first channel region is formed like a wire between the two second semiconductor layers. A first insulating layer is around the first channel region. A second insulating film is on each of opposite side surfaces of the two first semiconductor layers. A third insulating film is on each of opposite side surfaces of the two second semiconductor layers. A gate electrode is on the first, second, and third insulating films. Film thickness of the second insulating film is larger than film thickness of the first insulating film.

Abstract: According to one embodiment, a semiconductor memory device is disclosed. The device includes MOSFET1 and MOSFET2 arranged in a first direction, variable resistive element (hereafter R1) above MOSFET1 and MOSFET2, a lower end of the R1 being connected to drains of MOSFET1 and MOSFET2, MOSFET3 and MOSFET4 arranged in the first direction, variable resistive element (hereafter R2) above MOSFET3 and MOSFET4, and a lower end of the R2 being connected to drains of MOSFET3 and MOSFET4. The device further includes first wiring line extending in the first direction and connected to sources of MOSFET1 and MOSFET2, second wiring line extending in the first direction and connected to sources of MOSFET3 and MOSFET4, upper electrode connecting upper end of the R1 and upper end of the R2, and third wiring line extending in the first direction and connected to the upper electrode.

Abstract: A magnetic random access memory includes a semiconductor substrate in which a step portion having a side surface and a top face is formed, a gate electrode formed on the side surface of the step portion through a gate insulating film, a drain diffusion layer formed in the top face of the step portion, a source diffusion layer formed in the semiconductor substrate below the drain diffusion layer to be separated from the drain diffusion layer, a magnetoresistive effect element which is connected with the drain diffusion layer, and has a fixed layer, a recording layer and a non-magnetic layer, the magnetization directions of the fixed layer and the recording layer entering a parallel state or an antiparallel state in accordance with a direction of a current flowing through a space between the fixed layer and the recording layer, and a bit line connected with the magnetoresistive effect element.

Abstract: A magnetoresistive element includes a first stacked structure formed by sequentially stacking a first fixed layer in which a magnetization direction is fixed and a first nonmagnetic layer, a second stacked structure formed on the first stacked structure by sequentially stacking a free layer in which a magnetization direction is changeable, a second nonmagnetic layer, and a second fixed layer in which a magnetization direction is fixed, and a circumferential wall formed in contact with a circumferential surface of the second stacked structure to surround the second stacked structure, and made of an insulator. A circumferential surface of the first stacked structure is substantially perpendicular. The second stacked structure has a tapered shape which narrows upward.

Abstract: A magnetic random access memory includes a magnetoresistive effect element which includes a fixed layer in which a magnetization direction is fixed, a recording layer in which a magnetization direction is reversible, and a nonmagnetic layer formed between the fixed layer and the recording layer, and in which the magnetization directions in the fixed layer and the recording layer take one of a parallel state and an antiparallel state in accordance with a direction of an electric current supplied between the fixed layer and the recording layer, and a yoke layer which concentrates a magnetic field generated by the electric current, and causes the magnetic field to act on magnetization in the recording layer.

Abstract: A semiconductor device includes a first semiconductor layer and a second semiconductor layer that have a form of fins and are arranged a predetermined distance apart from each other, in which a center portion of each serves as a channel region, and side portions sandwiching the center portion serve as source/drain regions, a gate electrode formed on two side surfaces of each of the channel regions of the first semiconductor layer and the second semiconductor layer, with a gate insulating film interposed therebetween, an insulating film formed to fill a gap between the source/drain regions of the first semiconductor layer and the source/drain regions of the second semiconductor layer, and silicide layers formed on side surfaces of the source/drain regions of the first semiconductor layer and the source/drain regions of the second semiconductor layer that are not covered by the insulating film.

Abstract: A disclosed disk clamping mechanism includes a turntable fixed on a rotational shaft of a spindle motor to rotate a flexible thin optical disk, a stabilizer member configured to suppress a run-out of the flexible thin optical disk by an applying aerodynamic force to the rotating flexible thin optical disk so as to stabilize the run-out of the rotating flexible thin optical disk, and a clamper movably supported in a center of the stabilizer member in a direction perpendicular to a surface of the flexible thin optical disk. In the disclosed disk clamping mechanism, the flexible thin optical disk is sandwiched between the turntable and the clamper such that the turntable and the clamper rotate the flexible thin optical member sandwiched in-between.

Abstract: First semiconductor layers are in source/drain regions on the semiconductor substrate. A second semiconductor layer comprises first portions on the first semiconductor layers and a second portion on a channel region between the source/drain regions. Third semiconductor layers are on the first portions of the second semiconductor layer. A gate electrode is around the second portion of the second semiconductor layer via an insulating film. Contact plugs are in the first semiconductor layers, the first portions of the second semiconductor layers and the third semiconductor layers in the source/drain regions. A diameter of the contact plug in the second semiconductor layer is smaller than a diameter of the contact plug in the first and third semiconductor layers.

Abstract: First semiconductor layers are in source/drain regions on the semiconductor substrate. A second semiconductor layer comprises first portions on the first semiconductor layers and a second portion in a linear form in a channel region between the source/drain regions. A gate electrode is around the second portion of the second semiconductor layer via an insulating film. A film thickness of the second portion of the second semiconductor layer is smaller than a film thickness of the first portion of the second semiconductor layer.

Abstract: According to one embodiment, a magnetoresistive memory includes first and second contact plugs in a first interlayer insulating film, a lower electrode on the first interlayer insulating film, a magnetoresistive effect element on the lower electrode, and an upper electrode on the magnetoresistive effect element. The lower electrode has a tapered cross-sectional shape in which a dimension of a bottom surface of the lower electrode is longer than a dimension of an upper surface of the lower electrode, one end of the lower electrode is in contact with an upper surface of the first contact plug. The magnetoresistive effect element is provided at a position shifted from a position immediately above the first contact plug in a direction parallel to a surface of the semiconductor substrate.

Abstract: An aspect of the present disclosure, there is provided a magnetoresistive random access memory device, including, an active area formed on a semiconductor substrate in a first direction, a magnetoresistive effect element formed on the active area and storing data by a change in resistance value, a gate electrode of a cell transistor formed on each side of the magnetoresistive effect element on the active area in a second direction, a bit line contact formed on the active area and arranged alternately with the magnetoresistive effect element, a first bit line connected to the magnetoresistive effect, and a second bit line connected to the bit line contact.

Abstract: Two first semiconductor layers are on a silicon substrate at a given distance from each other. Two second semiconductor layers are on the respective first semiconductor layers and includes a material different from a material of the first semiconductor layers. A first channel region is formed like a wire between the two second semiconductor layers. A first insulating layer is around the first channel region. A second insulating film is on each of opposite side surfaces of the two first semiconductor layers. A third insulating film is on each of opposite side surfaces of the two second semiconductor layers. A gate electrode is on the first, second, and third insulating films. Film thickness of the second insulating film is larger than film thickness of the first insulating film.

Abstract: It is possible to reduce writing current without causing fluctuation of the writing characteristic. A magnetic memory includes: a magnetoresistance effect element having a magnetization pinned layer whose magnetization direction is pinned, a storage layer whose magnetization direction is changeable, and a non-magnetic layer provided between the magnetization pinned layer and the storage layer; and a first wiring layer which is electrically connected to the magnetoresistance effect element and extends in a direction substantially perpendicular to a direction of an easy magnetization axis of the storage layer, an end face of the magnetoresistance effect element substantially perpendicular to the direction of the easy magnetization axis of the storage layer and an end face of the first wiring layer substantially perpendicular to the direction of the easy magnetization axis being positioned on the same plane.

Abstract: A semiconductor memory device includes a first write line which is provided in a first direction, a first memory element which is connected to the first write line, a second memory element which is provided to neighbor the first memory element in the first direction, and is connected to the first write line, a first insulation film which is provided on surfaces of the first and second memory elements, and a second insulation film which is provided between the neighboring first and second memory elements and has a lower heat conductivity than the first insulation film.

Abstract: A semiconductor memory device includes variable resistance elements arranged in a memory area and configured to store data according to a resistance variation, each of the variable resistance elements having a first terminal electrically connected to a first line and a second terminal electrically connected to a second line, and dummy elements arranged in the memory area, formed of the same material as the variable resistance element and electrically isolated.

Abstract: A spin transfer type magnetic random access memory includes a magnetoresistive effect element including a fixed layer, a recording layer, and a nonmagnetic layer, a source line connected to one terminal of the magnetoresistive effect element, a transistor having a current path whose one end is connected to the other terminal of the magnetoresistive effect element, a bit line connected to the other end of the current path of the transistor, and running parallel to the source line, and a source/sinker which supplies a write current between the source line and the bit line via the magnetoresistive effect element and the transistor, a direction in which a magnetic field generated by the write current having passed through the bit line is applied to the magnetoresistive effect element being opposite to a direction of the write current passing through the magnetoresistive effect element.

Abstract: A spin-transfer magnetic memory includes a magnetoresistive element having a pinned layer, a free layer and a tunnel insulating layer provided between the pinned layer and the free layer, a bit line connected to one terminal of the magnetoresistive element, a select transistor having a current path whose one terminal is connected to the other terminal of the magnetoresistive element, a source line connected to the other terminal of the current path of the select transistor, and a pulse generation circuit passing a microwave pulse current through the magnetoresistive element, and assisting a magnetization switching of the free layer in a write operation.

Abstract: A magnetic material of a magnetoresistive element is formed on a lower electrode. An upper electrode is formed on the magnetic material. A resist for nano-imprint lithography is formed on the upper electrode. A first pattern or a second pattern is formed in the resist by setting a first template or a second template into contact with the resist and curing the resist. The first template has the first pattern that corresponds to the magnetoresistive element and the lower electrode. The second template has the second pattern that corresponds to the magnetoresistive element and the upper electrode. The magnetic material and the lower electrode are patterned at the same time by using the resist having the first pattern, or the magnetic material and the upper electrode are patterned at the same time by using the resist having the second pattern.

Abstract: First and second transistors are formed on a substrate. An interlayer insulating film is formed on the first transistor. A first contact is formed in the interlayer film on a source or a drain of the first transistor. A second contact is formed in the interlayer film on the other of the source or the drain. A first interconnect is formed on the first contact. A magnetoresistive element is formed on the second contact. The magnetoresistive element is arranged in a layer having a height equal to that of the first interconnect from a substrate surface. A third contact is formed in the interlayer film on a source or a drain of the second transistor. A second interconnect is formed on the third contact. The second interconnect is arranged in a layer having a height equal to those of the first interconnect and the magnetoresistive element from the substrate surface.

Abstract: A semiconductor memory device includes first to third wiring layers formed above a semiconductor substrate, extending in a first direction, and sequentially arranged in a second direction perpendicular to the first direction, a plurality of active areas formed in the semiconductor substrate, and extending in a direction oblique to the first direction, first and second selection transistors formed in each of the active areas, and sharing a source region electrically connected to the second wiring layer, a first magnetoresistive element having one terminal electrically connected to a drain region of the first selection transistor, and the other terminal electrically connected to the first wiring layer, and a second magnetoresistive element having one terminal electrically connected to a drain region of the second selection transistor, and the other terminal electrically connected to the third wiring layer.