Patents by Inventor Takeshi Shioga

Takeshi Shioga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160056089
    Abstract: A semiconductor device includes: a first semiconductor element; a first substrate provided on the first semiconductor element and including a cavity with reduced pressure; coolant held inside the cavity; a second semiconductor element provided on the first substrate; and a heat spreading member thermally connected to the first substrate and provided with a hole communicated with the cavity.
    Type: Application
    Filed: November 3, 2015
    Publication date: February 25, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Jun Taniguchi, Takeshi Shioga, Yoshihiro Mizuno
  • Patent number: 9142476
    Abstract: A semiconductor package includes a substrate with a first surface on which a semiconductor device is mounted and a second surface opposite to the first surface, and a loop heat pipe including an evaporator and attached to the second surface of the substrate, wherein the substrate has a groove structure in the second surface, the groove structure being in contact with a porous wick provided in the evaporator.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: September 22, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Takeshi Shioga, Hideaki Nagaoka, Takahiro Kimura
  • Patent number: 8780560
    Abstract: There is provided a loop heat pipe which includes an evaporator that internally includes at least one wick built, a condenser, a liquid pipe and a vapor pipe that connect the evaporator and the condenser to each other, and a heat dispersion cavity that is formed inside the evaporator, and disperses a vapor, wherein the wick includes, a first wick that is porous, a second wick that is porous, the second wick being inserted into the first wick from the liquid pipe side and including a pore size larger than the first wick, and a vapor channel that is defined between the first wick and the second wick. The vapor channel is connected at an end on the liquid pipe side to the heat dispersion cavity.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: July 15, 2014
    Assignee: Fujitsu Limited
    Inventors: Susumu Ogata, Hiroki Uchida, Seiji Hibino, Takeshi Shioga, Takahiro Kimura
  • Patent number: 8479386
    Abstract: A method for manufacturing an interposer including forming a capacitor over a semiconductor substrate; forming a first resin layer with a first partial electrode buried in over the semiconductor substrate and the capacitor; cutting an upper part of the first partial electrode and the first resin layer with a cutting tool; forming a second resin layer with a second partial electrode buried in over a glass substrate with a through-electrode buried in; cutting an upper part of the second partial electrode and the second resin layer with the cutting tool; making thermal processing with the first resin layer and the second resin layer adhered to each other while connecting the first partial electrode and the second partial electrode to each other; removing the semiconductor substrate; forming a third resin layer over the glass substrate, covering the capacitor; and burying a third partial electrode in the third resin layer.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: July 9, 2013
    Assignee: Fujitsu Limited
    Inventors: Takeshi Shioga, Kazuaki Kurihara, Kanae Nakagawa, Taiji Sakai, Masataka Mizukoshi
  • Patent number: 8474126
    Abstract: A manufacturing method of a semiconductor device include forming a capacitor by forming an oxide film on a surface of a valve metal based on anodic oxidization and by forming a conductive part made of a conductive material on the oxide film; adhering the capacitor on a semiconductor element mounted on a supporting substrate; and coupling the capacitor to the supporting substrate via an outside connection terminal.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: July 2, 2013
    Assignee: Fujitsu Limited
    Inventors: Takeshi Shioga, Kazuaki Kurihara
  • Publication number: 20130044432
    Abstract: There is provided a loop heat pipe which includes an evaporator that internally includes at least one wick built, a condenser, a liquid pipe and a vapor pipe that connect the evaporator and the condenser to each other, and a heat dispersion cavity that is formed inside the evaporator, and disperses a vapor, wherein the wick includes, a first wick that is porous, a second wick that is porous, the second wick being inserted into the first wick from the liquid pipe side and including a pore size larger than the first wick, and a vapor channel that is defined between the first wick and the second wick. The vapor channel is connected at an end on the liquid pipe side to the heat dispersion cavity.
    Type: Application
    Filed: August 6, 2012
    Publication date: February 21, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Susumu Ogata, Hiroki Uchida, Seiji Hibino, Takeshi Shioga, Takahiro Kimura
  • Patent number: 8344386
    Abstract: The present invention provides a novel capacitor element, laminated thin-film device, and circuit wherein the capacitance dependency on voltage can be appropriately adjusted, and a technology for manufacturing such a capacitor element and laminated thin-film device. In the capacitor element that comprises a pair of electrode layers and a dielectric layer disposed between the electrode layers, a well region where an ion is implanted is disposed in the dielectric layer, and the C-V curve between the electrode layers is shifted or shifted and expanded in at least one direction of the plus direction and minus direction with respect to the voltage axis.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: January 1, 2013
    Assignee: Fujitsu Limited
    Inventors: John David Baniecki, Takeshi Shioga, Kazuaki Kurihara
  • Publication number: 20120312506
    Abstract: A loop heat pipe includes an evaporator to vaporize a working fluid due to heat supplied from an external heat source; a condenser to cause the vaporized working fluid to condense; and connecting lines to connect the evaporator and the condenser in a loop, wherein the evaporator includes a first space defined by a set of walls including a contact wall that comes into contact with the external heat source, a second space provided adjacent to at least one of the walls other than the contact wall, and a through-hole formed in a dividing wall separating the first space and the second space to allow the first space and the second space to communicate with each other.
    Type: Application
    Filed: August 22, 2012
    Publication date: December 13, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Hiroki UCHIDA, Takeshi SHIOGA, Shigenori AOKI, Susumu OGATA, Hideaki NAGAOKA
  • Patent number: 8330480
    Abstract: Recesses are formed on one surface of a substrate. A conductive film covers an inner surface of each of the recesses. This conductive film contacts a bump of a semiconductor device to be inspected and is electrically connected to the bump. It is therefore possible to prevent damages of the bump to be caused by contact of a probe pin.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: December 11, 2012
    Assignee: Fujitsu Limited
    Inventors: Takeshi Shioga, Kazuaki Kurihara
  • Publication number: 20120227954
    Abstract: A loop heat pipe system includes: a loop heat pipe (LHP) including an evaporator, a condenser, a vapor line, and a liquid; a temperature sensor to measure temperature of part of the LHP, a working fluid portion in which has different phases in a situation where the LHP functions as a heat transport device and in a situation where the LHP dose not function as a heat transport device and a liquid phase of the working fluid dose not exist in the evaporator; a heater to heat a heating target part of the vapor line; and a controller, in order to start the LHP, to turn on the heater, to monitor temperature of the heating target part using the temperature sensor, and to turn off the heater when detecting a change caused by condensation of a vapor phase of the working fluid in the monitored temperature.
    Type: Application
    Filed: May 17, 2012
    Publication date: September 13, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Hiroki UCHIDA, Takeshi Shioga, Shigenori Aoki, Susumu Ogata, Hideaki Nagaoka
  • Patent number: 8264063
    Abstract: A capacitive element is characterized by including: a base (12); a lower barrier layer (13) formed on the base (12); capacitors (Q1 and Q2) made by forming a lower electrode (14a), capacitor dielectric layers (15a), and upper electrodes (16a) in this order on the lower barrier layer (13); and an upper barrier layer (20) covering at least the capacitor dielectric layers (15a) and the lower barrier layer (13).
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: September 11, 2012
    Assignee: Fujitsu Limited
    Inventors: Takeshi Shioga, John David Baniecki, Kazuaki Kurihara
  • Patent number: 8203198
    Abstract: A thin film capacitor device of the present invention has a thin film capacitor having two electrodes and a dielectric layer provided therebetween and external terminals electrically connected to the electrodes. In addition, the thin film capacitor device also has resistor layers which are provided between the external terminals and the electrodes and adjacent thereto, and which are formed of a material have a higher resistivity than that of the adjacent electrodes.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: June 19, 2012
    Assignee: Fujitsu Limited
    Inventors: Takeshi Shioga, Kazuaki Kurihara
  • Publication number: 20120132402
    Abstract: A loop heat pipe includes: a first evaporator and a second evaporator each of which vaporizes a liquid-phase working fluid and converts the liquid-phase working fluid to a vapor-phase working fluid; a first condenser and a second condenser each of which condenses the vapor-phase working fluid and converts the vapor-phase working fluid back to the liquid-phase working fluid; a first vapor line through which the working fluid converted to the vapor phase is transported to the first condenser; a first liquid line through which the working fluid converted to the liquid phase is transported to the second evaporator; a second vapor line through which the working fluid converted to the vapor phase is transported to the second condenser; and a second liquid line through which the working fluid converted to the liquid phase is transported to the first evaporator.
    Type: Application
    Filed: December 13, 2011
    Publication date: May 31, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Shigenori Aoki, Takeshi Shioga, Hiroki Uchida
  • Publication number: 20110294265
    Abstract: A semiconductor device includes a semiconductor element, a supporting substrate where the semiconductor element is mounted, and a capacitor provided on the semiconductor element and coupled to the supporting substrate via an outside connection terminal. The capacitor includes a valve metal part, an anodic oxide film formed on a surface of the valve metal part, and a conductive part formed on the anodic oxide film and made of a conductive material.
    Type: Application
    Filed: August 9, 2011
    Publication date: December 1, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Takeshi Shioga, Kazuaki Kurihara
  • Patent number: 8058110
    Abstract: The plating method comprises the step of forming a resin layer 10 over a substrate 16; the step of cutting the surface part of the resin layer 10 with a cutting tool 12; the step of forming a seed layer 36 on the resin layer 10 by electroless plating; and the step of forming a plating film 44 on the seed layer 36 by electroplating. Suitable roughness can be give to the surface of the resin layer 10, whereby the adhesion between the seed layer 36 and the resin layer 10 can be sufficiently ensured. Excessively deep pores are not formed in the surface of the resin layer 10 as are by desmearing treatment, whereby a micronized pattern of a photoresist film 40 can be formed on the resin layer 10. Thus, interconnections 44, etc. can be formed over the resin layer 10 at a narrow pitch with high reliability ensured.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: November 15, 2011
    Assignee: Fujitsu Limited
    Inventors: Masataka Mizukoshi, Kanae Nakagawa, Takeshi Shioga, Kazuaki Kurihara, John David Baniecki
  • Patent number: 8035981
    Abstract: A semiconductor device includes a semiconductor element, a supporting substrate where the semiconductor element is mounted, and a capacitor provided on the semiconductor element and coupled to the supporting substrate via an outside connection terminal. The capacitor includes a valve metal part, an anodic oxide film formed on a surface of the valve metal part, and a conductive part formed on the anodic oxide film and made of a conductive material.
    Type: Grant
    Filed: May 2, 2008
    Date of Patent: October 11, 2011
    Assignee: Fujitsu Limited
    Inventors: Takeshi Shioga, Kazuaki Kurihara
  • Publication number: 20110168564
    Abstract: The plating method comprises the step of forming a resin layer 10 over a substrate 16; the step of cutting the surface part of the resin layer 10 with a cutting tool 12; the step of forming a seed layer 36 on the resin layer 10 by electroless plating; and the step of forming a plating film 44 on the seed layer 36 by electroplating. Suitable roughness can be give to the surface of the resin layer 10, whereby the adhesion between the seed layer 36 and the resin layer 10 can be sufficiently ensured. Excessively deep pores are not formed in the surface of the resin layer 10 as are by desmearing treatment, whereby a micronized pattern of a photoresist film 40 can be formed on the resin layer 10. Thus, interconnections 44, etc. can be formed over the resin layer 10 at a narrow pitch with high reliability ensured.
    Type: Application
    Filed: March 9, 2011
    Publication date: July 14, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Masataka Mizukoshi, Kanae Nakagawa, Takeshi Shioga, Kazuaki Kurihara, John David Baniecki
  • Patent number: 7940516
    Abstract: A capacitor including a substrate; a conductive layer provided on the substrate and containing conductive particles; a valve metal sheet having a dielectric part formed throughout an entire surface of the conductive layer; a protection layer covering the valve metal sheet; a first electrode terminal electrically connected to the conductive layer and partially exposed from an external surface of the protection layer; and a second electrode terminal electrically connected to a surface of the valve metal sheet which is opposite to a surface of the valve metal sheet on which the dielectric part is provided, and the second electrode terminal partially exposed from the external surface of the protection layer; wherein the dielectric part is made of an oxide of a metallic material of the valve metal sheet, the dielectric part is formed with a corrugated surface on the conductive layer, and the conductive particles of the conductive layer are in contact with the corrugated surface of the dielectric part.
    Type: Grant
    Filed: August 4, 2010
    Date of Patent: May 10, 2011
    Assignee: Fujitsu Limited
    Inventors: Takeshi Shioga, Kazuaki Kurihara
  • Patent number: 7937830
    Abstract: An interposer 2 comprising a base 10 formed of a plurality of resin layers 26, 34, 42, 52, 56; a thin-film capacitor 12 buried in the base 10, including a lower electrode 20, a capacitor dielectric film 22 and an upper electrode 24; a first through-electrode 14b formed through the base 10 and electrically connected to the upper electrode 24 of the thin-film capacitor 12; and a second through-electrode 14a formed through the base 10 and electrically connected to the lower electrode 20 of the thin-film capacitor 12, further comprising: an interconnection 48 buried in the base 10 and electrically connected to the respective upper electrodes 24 of a plurality of the thin-film capacitors 12, a plurality of the first through-electrodes 14b being electrically connected to the upper electrodes 24 of said plurality of the thin-film capacitors 12 via the interconnection 48, and said plurality of the first through-electrodes 14b being electrically interconnected by the interconnections 48.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: May 10, 2011
    Assignee: Fujitsu Limited
    Inventors: Takeshi Shioga, Yoshikatsu Ishizuki, John David Baniecki, Kazuaki Kurihara
  • Patent number: 7927998
    Abstract: The plating method comprises the step of forming a resin layer 10 over a substrate 16; the step of cutting the surface part of the resin layer 10 with a cutting tool 12; the step of forming a seed layer 36 on the resin layer 10 by electroless plating; and the step of forming a plating film 44 on the seed layer 36 by electroplating. Suitable roughness can be give to the surface of the resin layer 10, whereby the adhesion between the seed layer 36 and the resin layer 10 can be sufficiently ensured. Excessively deep pores are not formed in the surface of the resin layer 10, as are by desmearing treatment, whereby a micronized pattern of a photoresist film 40 can be formed on the resin layer 10. Thus, interconnections 44, etc. can be formed over the resin layer 10 at a narrow pitch with high reliability ensured.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: April 19, 2011
    Assignee: Fujitsu Limited
    Inventors: Masataka Mizukoshi, Kanae Nakagawa, Takeshi Shioga, Kazuaki Kurihara, John David Baniecki