Patents by Inventor Tatsuya Naito

Tatsuya Naito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154003
    Abstract: Provided is a semiconductor device in which a boundary region between a transistor portion and a diode portion includes: a first portion which is in contact with the transistor portion and is not provided with a lifetime adjustment region; and a second portion which is in contact with the diode portion and to which the lifetime adjustment region of the diode portion extends, a density distribution of a lifetime killer in a first direction has a lateral slope where a density of the lifetime killer decreases from the second portion of the boundary region toward the first portion, a width of the first portion is smaller than a width of the second portion in the first direction, and the width of the first portion is equal to or larger than a width of the lateral slope in the first direction.
    Type: Application
    Filed: October 24, 2023
    Publication date: May 9, 2024
    Inventors: Yosuke SAKURAI, Tatsuya NAITO, Seiji NOGUCHI, Motoyoshi KUBOUCHI, Naoko KODAMA, Hiroshi TAKISHITA
  • Publication number: 20240128361
    Abstract: There is provided a semiconductor device comprising: a semiconductor substrate including a drift region of a first conductivity type; an emitter region of the first conductivity type provided above the drift region inside the semiconductor substrate and having a doping concentration higher than the drift region; a base region of a second conductivity type provided between the emitter region and the drift region inside the semiconductor substrate; a first accumulation region of the first conductivity type provided between the base region and the drift region inside the semiconductor substrate and having a doping concentration higher than the drift region; a plurality of trench portions provided to pass through the emitter region, the base region and first accumulation region from an upper surface of the semiconductor substrate, and provided with a conductive portion inside; and a capacitance addition portion provided below the first accumulation region to add a gate-collector capacitance thereto.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Inventor: Tatsuya NAITO
  • Publication number: 20240076524
    Abstract: A film contains a ?-1,3-glucan derivative obtained by introducing an acyl group into a ?-1,3-glucan and at least one resin selected from the group consisting of a rosin-based resin, a terpene-based resin, and a petroleum-based resin. The acyl group is represented by RCO—, and the R is a hydrocarbon group having 1 or more and 5 or less carbon atoms. Parts by weight of the resin with respect to 100 parts by weight of the ?-1,3-glucan derivative are 90 parts by weight or less. A pressure-sensitive adhesive tape includes the film and a pressure-sensitive adhesive layer.
    Type: Application
    Filed: February 28, 2022
    Publication date: March 7, 2024
    Inventors: Yoshiko OGINO, Tatsuya KUMADA, Yusuke HARA, Tomonari NAITO
  • Patent number: 11923444
    Abstract: There is provided a semiconductor device including a drift region of a first conductivity type, a first semiconductor region of the first conductivity type provided above the drift region and having a doping concentration higher than the drift region, a second semiconductor region of a second conductivity type provided between the first semiconductor region and the drift region, and a plurality of trench portions arranged in a first direction and having an extending portion that extends in a second direction perpendicular to the first direction. At least one trench portion of the plurality of trench portions has a first tapered portion at an upper side than a depth position of a lower surface of the second semiconductor region. The width of the first tapered portion in the first direction becomes smaller from a lower side of the first tapered portion toward an upper side of the first tapered portion.
    Type: Grant
    Filed: January 5, 2023
    Date of Patent: March 5, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Tatsuya Naito
  • Publication number: 20240014269
    Abstract: A semiconductor device is provided, including: a semiconductor substrate; a first-conductivity-type drift region provided in the semiconductor substrate; a trench portion provided from an upper surface of the semiconductor substrate to an inside of the semiconductor substrate, and extending in a predetermined extending direction in a plane of the upper surface of the semiconductor substrate; a mesa portion provided in contact with the trench portion in an array direction orthogonal to the extending direction; a second-conductivity-type base region provided in the mesa portion above the drift region and in contact with the trench portion; and a second-conductivity-type floating region provided in the mesa portion below the base region, in contact with the trench portion, and provided in at least a part of the mesa portion in the array direction.
    Type: Application
    Filed: September 20, 2023
    Publication date: January 11, 2024
    Inventor: Tatsuya NAITO
  • Publication number: 20240014207
    Abstract: There is provided a semiconductor device that includes a diode portion, the semiconductor device including: a drift region of a first conductivity type provided in a semiconductor substrate; an anode region of a second conductivity type provided to be closer to a front surface side of the semiconductor substrate than the drift region; and a trench contact portion provided at a front surface of the semiconductor substrate in the diode portion, in which in a depth direction of the semiconductor substrate, a doping concentration of the anode region at a same depth as that of a bottom portion of the trench contact portion is 1E16 cm?3 or more and 1E17 cm?3 or less.
    Type: Application
    Filed: May 24, 2023
    Publication date: January 11, 2024
    Inventors: Kazuki KAMIMURA, Toshiyuki MATSUI, Tatsuya NAITO
  • Publication number: 20240006520
    Abstract: Provided is a semiconductor device in which each of a transistor portion and a diode portion has one or more trench contact portions provided from an upper surface of a semiconductor substrate in a depth direction of the semiconductor substrate, the transistor portion has a first bottom region of a second conductivity type provided in contact with a bottom of any one of the one or more trench contact portions, the diode portion has a second bottom region of the second conductivity type provided in contact with a bottom of any one of the one or more trench contact portions, and a length of the first bottom region in the extending direction is larger than a length of the second bottom region in the extending direction.
    Type: Application
    Filed: September 19, 2023
    Publication date: January 4, 2024
    Inventor: Tatsuya NAITO
  • Publication number: 20230402533
    Abstract: There is provided a semiconductor device in which the transistor portion has a first transistor region provided with the emitter region, the contact region, and the first base region; a second transistor region which is provided with the emitter region and the contact region and which is provided between the first transistor region and the diode portion; and a boundary region which includes the second base region and which is provided between the second transistor region and the diode portion, and at a front surface of the semiconductor substrate, an area of the contact region in the second transistor region is smaller than an area of the contact region in the first transistor region.
    Type: Application
    Filed: April 25, 2023
    Publication date: December 14, 2023
    Inventors: Tomonori MIZUSHIMA, Tatsuya NAITO
  • Publication number: 20230361111
    Abstract: A semiconductor device includes a semiconductor substrate having a first conductivity type drift region and a second conductivity type base region above the drift region, trench portions at an upper surface of the semiconductor substrate arrayed parallel to one another, each of them penetrating the base region, and mesa portions between respective trench portions. Among the mesa portions, at least one mesa portion includes a first conductivity type first semiconductor region having a higher concentration than the drift region, a second conductivity type second semiconductor region having a higher concentration than the base region, and a first conductivity type accumulation region between the base and drift regions and has a higher concentration than the drift region. The drift region does not extend above the accumulation region. In a longitudinal direction of the trench portions, the accumulation region extends beyond an end portion of the first semiconductor region.
    Type: Application
    Filed: July 18, 2023
    Publication date: November 9, 2023
    Inventor: Tatsuya NAITO
  • Patent number: 11810952
    Abstract: A semiconductor device is provided, including: a semiconductor substrate; a first-conductivity-type drift region provided in the semiconductor substrate; a trench portion provided from an upper surface of the semiconductor substrate to an inside of the semiconductor substrate, and extending in a predetermined extending direction in a plane of the upper surface of the semiconductor substrate; a mesa portion provided in contact with the trench portion in an array direction orthogonal to the extending direction; a second-conductivity-type base region provided in the mesa portion above the drift region and in contact with the trench portion; and a second-conductivity-type floating region provided in the mesa portion below the base region, in contact with the trench portion, and provided in at least a part of the mesa portion in the array direction.
    Type: Grant
    Filed: May 15, 2022
    Date of Patent: November 7, 2023
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Tatsuya Naito
  • Publication number: 20230299077
    Abstract: A semiconductor device includes a semiconductor substrate that has a transistor portion and a diode portion and that is provided with a plurality of trench portions, in which the transistor portion has a main region that has the emitter region and the contact region at the front surface of the semiconductor substrate and that is spaced apart from the diode portion and a first boundary region that is provided between the main region and the diode portion and that has, at the front surface of the semiconductor substrate, the emitter region and the base region which are alternately provided in a trench extension direction.
    Type: Application
    Filed: January 23, 2023
    Publication date: September 21, 2023
    Inventors: Toru MURAMATSU, Tatsuya NAITO
  • Patent number: 11735584
    Abstract: A semiconductor device, allowing easy hole extraction, including a semiconductor substrate having drift and base regions; and transistor and diode portions, in which trench portions and mesa portions are formed, is provided. The transistor portion includes emitter and contact regions above the base region and exposed to an upper surface of the semiconductor substrate. The emitter region has a higher concentration than the drift region. The contact region has a higher concentration than the base region. The mesa portions include boundary mesa portion(s) at a boundary between the transistor and diode portions. The trench portions include dummy trench portion(s) provided adjacent to a trench portion adjacent to the boundary mesa portion(s) and provided on the transistor portion side relative to the trench portion adjacent to the boundary mesa portion(s). The boundary mesa portion(s) include a base boundary mesa portion in which the base region is exposed to the upper surface.
    Type: Grant
    Filed: August 14, 2022
    Date of Patent: August 22, 2023
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Tatsuya Naito
  • Patent number: 11710784
    Abstract: Provided is a semiconductor device comprising: a semiconductor substrate; a gate trench section that is provided from an upper surface to an inside of the semiconductor substrate and extends in a predetermined extending direction on the upper surface of the semiconductor substrate; a mesa section in contact to the gate trench section in an arrangement direction orthogonal the extending direction; and an interlayer dielectric film provided above the semiconductor substrate; wherein the interlayer dielectric film is provided above at least a part of the gate trench section in the arrangement direction; a contact hole through which the mesa section is exposed is provided to the interlayer dielectric film; and a width of the contact hole in the arrangement direction is equal to or greater than a width of the mesa section in the arrangement direction.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: July 25, 2023
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Tatsuya Naito
  • Publication number: 20230142388
    Abstract: There is provided a semiconductor device comprising: a semiconductor substrate including a drift region of a first conductivity type; an emitter region of the first conductivity type provided above the drift region inside the semiconductor substrate and having a doping concentration higher than the drift region; a base region of a second conductivity type provided between the emitter region and the drift region inside the semiconductor substrate; a first accumulation region of the first conductivity type provided between the base region and the drift region inside the semiconductor substrate and having a doping concentration higher than the drift region; a plurality of trench portions provided to pass through the emitter region, the base region and first accumulation region from an upper surface of the semiconductor substrate, and provided with a conductive portion inside; and a capacitance addition portion provided below the first accumulation region to add a gate-collector capacitance thereto.
    Type: Application
    Filed: January 5, 2023
    Publication date: May 11, 2023
    Inventor: Tatsuya NAITO
  • Publication number: 20230029909
    Abstract: A semiconductor device, including a semiconductor substrate, a transistor section and a diode section arranged in a predetermined arrangement direction and provided on the semiconductor substrate, is provided. The diode section includes a drift region of a first conductivity-type provided in the semiconductor substrate, a base region of a second conductivity-type extending to a height of an upper surface of the semiconductor substrate and provided above the drift region, first cathode regions of the first conductivity-type, and second and third cathode regions of the second conductivity-type. The first, second, and third cathode regions extend to a height of a lower surface of the semiconductor substrate in a depth direction and provided below the drift region. The first and second cathode regions are provided in contact with each other, alternating in the arrangement direction, and sandwiched between the third cathode regions in an extension direction orthogonal to the arrangement direction.
    Type: Application
    Filed: October 6, 2022
    Publication date: February 2, 2023
    Inventor: Tatsuya NAITO
  • Publication number: 20230036039
    Abstract: A semiconductor device, including a semiconductor substrate having a diode portion, wherein the diode portion includes: an anode region which is provided on a front surface of the semiconductor substrate and is of a second conductivity type; a trench portion provided so as to extend in a predetermined extending direction on the front surface of the semiconductor substrate; a trench contact portion provided on the front surface of the semiconductor substrate; and a plug region which is provided at a lower end of the trench contact portion and is of a second conductivity type, and which has a doping concentration higher than that of the anode region, wherein a plurality of plug regions, each of which being the plug region, is provided separately from each other along the extending direction, is provided.
    Type: Application
    Filed: May 17, 2022
    Publication date: February 2, 2023
    Inventors: Toshiyuki MATSUI, Tatsuya NAITO, Kazuki KAMIMURA
  • Patent number: 11552185
    Abstract: There is provided a semiconductor device comprising: a semiconductor substrate including a drift region of a first conductivity type; an emitter region of the first conductivity type provided above the drift region inside the semiconductor substrate and having a doping concentration higher than the drift region; a base region of a second conductivity type provided between the emitter region and the drift region inside the semiconductor substrate; a first accumulation region of the first conductivity type provided between the base region and the drift region inside the semiconductor substrate and having a doping concentration higher than the drift region; a plurality of trench portions provided to pass through the emitter region, the base region and first accumulation region from an upper surface of the semiconductor substrate, and provided with a conductive portion inside; and a capacitance addition portion provided below the first accumulation region to add a gate-collector capacitance thereto.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: January 10, 2023
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Tatsuya Naito
  • Patent number: 11532737
    Abstract: A semiconductor device is provided, wherein a semiconductor substrate includes: a first trench portion provided from a front surface of the semiconductor substrate to a predetermined depth, and having a longer portion and a shorter portion as seen from above; and a first conductivity-type floating semiconductor region at least partially exposed on the front surface and surrounded by the first trench portion, an interlayer insulating film has openings to electrically connect an emitter electrode and the floating semiconductor region, the openings include: a first opening closest to an outer end of the floating semiconductor region in a direction parallel to the longer portion; and a second opening second closest to the outer end in the direction parallel to the longer portion, and a distance between the first opening and the second opening is shorter than a distance between any adjacent two of the openings other than the first opening.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: December 20, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Yoshiharu Kato, Hidenori Takahashi, Tatsuya Naito
  • Patent number: 11527639
    Abstract: A semiconductor device includes a semiconductor substrate, an emitter region, a base region and multiple accumulation areas, and an upper accumulation area in the multiple accumulation areas is in direct contact with a gate trench section and a dummy trench section, in an arrangement direction that is orthogonal to a depth direction and an extending direction, a lower accumulation area furthest from the upper surface of the semiconductor substrate in the multiple accumulation areas has: a gate vicinity area closer to the gate trench section than the dummy trench section in the arrangement direction; and a dummy vicinity area closer to the dummy trench section than the gate trench section in the arrangement direction, and having a doping concentration of the first conductivity type lower than that of the gate vicinity area.
    Type: Grant
    Filed: November 1, 2020
    Date of Patent: December 13, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Tatsuya Naito
  • Publication number: 20220392891
    Abstract: A semiconductor device, allowing easy hole extraction, including a semiconductor substrate having drift and base regions; and transistor and diode portions, in which trench portions and mesa portions are formed, is provided. The transistor portion includes emitter and contact regions above the base region and exposed to an upper surface of the semiconductor substrate. The emitter region has a higher concentration than the drift region. The contact region has a higher concentration than the base region. The mesa portions include boundary mesa portion(s) at a boundary between the transistor and diode portions. The trench portions include dummy trench portion(s) provided adjacent to a trench portion adjacent to the boundary mesa portion(s) and provided on the transistor portion side relative to the trench portion adjacent to the boundary mesa portion(s). The boundary mesa portion(s) include a base boundary mesa portion in which the base region is exposed to the upper surface.
    Type: Application
    Filed: August 14, 2022
    Publication date: December 8, 2022
    Inventor: Tatsuya NAITO