Patents by Inventor Toshiaki Morita
Toshiaki Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8592996Abstract: A semiconductor device wherein a semiconductor element made of Si or Si group material mounted on a substrate, the semiconductor element is mounted on the substrate and the semiconductor element is bonded to a silver bonding material via a oxide film formed on the semiconductor element. The bonding material comprising silver oxide particles having an average particle size of 1 nm to 50 nm and an organic reducing agent is used for bonding in air, which gives a high bonding strength to the oxide on the semiconductor element.Type: GrantFiled: June 29, 2010Date of Patent: November 26, 2013Assignee: Hitachi, Ltd.Inventors: Toshiaki Morita, Yusuke Yasuda, Eiichi Ide
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Publication number: 20130299962Abstract: A semiconductor device includes an IGBT as a vertical semiconductor element provided between first, and second lead frames, in pairs, the first, and second lead frames being opposed to each other, first and second sintered-metal bonding layers provided on first and second bonding surfaces of the IGBT, in pairs, respectively, a through-hole opened in the second lead frame, and a heat-release member having a surface on one side thereof, bonded to a second sintered-metal bonding layer of the second bonding surface while a side (lateral face) of a surface of the heat-release member, on the other side thereof, being fitted into the through-hole. A solder layer is formed in a gap between an outer-side wall of the side of the surface of the heat-release member, on the other side thereof, and an inner-side wall of the through-hole.Type: ApplicationFiled: April 25, 2013Publication date: November 14, 2013Applicant: Hitachi, Ltd.Inventors: Eiichi IDE, Toshiaki MORITA
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Publication number: 20130264696Abstract: A semiconductor device featuring a semiconductor chip including a MOSFET and having a first main surface and a second, opposing main surface, a source electrode pad and a gate electrode pad over the first main surface, a drain electrode over the second main surface, a source external terminal and a gate external terminal, each having a first main surface electrically connected to the source electrode pad and gate electrode pad of the chip, respectively, and a drain external terminal having a first main surface and a second, opposing main surface and being electrically connected to the second main surface of the chip, each of the source, gate and drain external terminals having second main surfaces thereof in a same plane, and, in a plan view of the external terminals, the gate external terminal has a portion located between the source and drain external terminals in at least one direction.Type: ApplicationFiled: May 31, 2013Publication date: October 10, 2013Inventors: Ryoichi KAJIWARA, Masahiro KOIZUMI, Toshiaki MORITA, Kazuya TAKAHASHI, Munehisa KISHIMOTO, Shigeru ISHII, Toshinori HIRASHIMA, Yasushi TAKAHASHI, Toshiyuki HATA, Hiroshi SATO, Keiichi OOKAWA
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Patent number: 8513534Abstract: The present invention is directed to enhancing the bonding reliability of a bonding portion between an Al electrode of a semiconductor device and a bonding material having metal particles as a main bonding agent. In the semiconductor device, a semiconductor element and an Al electrode are connected to each other with a bonding layer made of Ag or Cu interposed therebetween, and the bonding layer and the Al electrode are bonded to each other with an amorphous layer interposed therebetween. It is possible to obtain excellent bonding strength to the Al electrode by performing a bonding process in atmospheric air by using a bonding material including a metal oxide particle with an average diameter of 1 nm to 50 ?m, an acetic acid- or formic acid-based compound, and a reducing agent made of an organic material.Type: GrantFiled: February 26, 2009Date of Patent: August 20, 2013Assignee: Hitachi, Ltd.Inventors: Toshiaki Morita, Yusuke Yasuda, Eiichi Ide
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Patent number: 8455986Abstract: A semiconductor device featuring a semiconductor chip having a first main surface and a second, opposing main surface and including a MOSFET having source and gate electrodes formed on the first main surface and a drain electrode thereof formed on the second main surface, first and second conductive members acting as lead terminals for the source and gate electrodes, respectively, are disposed over the first main surface, each of the first and second conductive members has a part overlapped with the chip in a plan view, a sealing body sealing the chip and parts of the first and second conductive members such that a part of the first conductive member is projected outwardly from a first side surface of the sealing body and parts of the first and second conductive members are projected outwardly from the opposing second side surface of the sealing body in a plan view.Type: GrantFiled: April 30, 2012Date of Patent: June 4, 2013Assignees: Renesas Electronics Corporation, Hitachi Tohbu Semiconductor, Ltd.Inventors: Ryoichi Kajiwara, Masahiro Koizumi, Toshiaki Morita, Kazuya Takahashi, Munehisa Kishimoto, Shigeru Ishii, Toshinori Hirashima, Yasushi Takahashi, Toshiyuki Hata, Hiroshi Sato, Keiichi Ookawa
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Publication number: 20130119322Abstract: There is provided a conductive sintered layer forming composition and a conductive sintered layer forming method that can lower heating temperature and shorten heating time for a process of accelerating sintering or bonding by sintering of metal nano-particles coated with an organic substance. The conductive sintered layer forming composition may be obtained by utilizing a phenomenon that particles may be sintered at low temperature by mixing silver oxide with metal particles coated with the organic substance and having a grain size of 1 nm to 5 ?m as compared to sintering each simple substance. The conductive sintered layer forming composition of the invention is characterized in that it contains the metal particles whose surface is coated with the organic substance and whose grain size is 1 nm to 5 ?m and the silver oxide particles.Type: ApplicationFiled: January 9, 2013Publication date: May 16, 2013Applicant: Hitachi Ltd.Inventors: Eiichi Ide, Toshiaki Morita, Yusuke Yasuda, Hiroshi Hozoji
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Patent number: 8400777Abstract: When silver oxide is reduced to silver, a large number of cores of metallic silver are formed inside the silver oxide. Then, the silver oxide is reduced in a manner of being hollowed out while its original outer configuration is being maintained. As a result, the curvature of the silver generated becomes larger. The utilization of this microscopic-particle implementation mechanism allows accomplishment of the bonding even if the silver oxide is supplied not in a particle-like configuration, but in a closely-packed layer-like configuration. In the present invention, there is provided an electronic member including an electrode for inputting/outputting an electrical signal, or a connection terminal for establishing a connection with the electrical signal, wherein the uppermost surface of the electrode or the connection terminal is a silver-oxide layer.Type: GrantFiled: January 29, 2010Date of Patent: March 19, 2013Assignee: Hitachi, Ltd.Inventors: Eiichi Ide, Toshiaki Morita, Yusuke Yasuda
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Publication number: 20120217556Abstract: A semiconductor device featuring a semiconductor chip having a first main surface and a second, opposing main surface and including a MOSFET having source and gate electrodes formed on the first main surface and a drain electrode thereof formed on the second main surface, first and second conductive members acting as lead terminals for the source and gate electrodes, respectively, are disposed over the first main surface, each of the first and second conductive members has a part overlapped with the chip in a plan view, a sealing body sealing the chip and parts of the first and second conductive members such that a part of the first conductive member is projected outwardly from a first side surface of the sealing body and parts of the first and second conductive members are projected outwardly from the opposing second side surface of the sealing body in a plan view.Type: ApplicationFiled: April 30, 2012Publication date: August 30, 2012Inventors: Ryoichi Kajiwara, Masahiro Koizumi, Toshiaki Morita, Kazuya Takahashi, Munehisa Kishimoto, Shigeru Ishii, Toshinori Hirashima, Yasushi Takahashi, Toshiyuki Hata, Hiroshi Sato, Keiichi Ookawa
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Publication number: 20120204297Abstract: Optical information and topographic information of the surface of a sample are measured at a nanometer-order resolution and with high reproducibility without damaging a probe and the sample by combining a nanometer-order cylindrical structure with a nanometer-order microstructure to form a plasmon intensifying near-field probe having a nanometer-order optical resolution and by repeating approach/retreat of the probe to/from each measurement point on the sample at a low contact force.Type: ApplicationFiled: April 13, 2012Publication date: August 9, 2012Applicant: Hitachi, Ltd.Inventors: Toshihiko NAKATA, Masahiro Watanabe, Takashi Inoue, Kishio Hidaka, Makoto Okai, Toshiaki Morita, Motoyuki Hirooka
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Patent number: 8183607Abstract: A semiconductor device features a semiconductor chip including a MOSFET, a first electrode of the MOSFET disposed on an obverse surface of the chip, a second, control electrode of the MOSFET disposed on the obverse surface, a third electrode of the MOSFET disposed on a second, opposing surface of the chip, first, second, and third conductive members, each having top surface and opposing bottom surface, the first, second, and third conductive members connecting with the first, second, and third electrodes electrically, respectively, a sealing body having top and bottom surfaces and sealing parts of the first, second, and third conductive members, the first conductive member having first, second, and third contiguous portions, the first portion is positioned over the first electrode, the second is positioned between the first and second portions and the third portion is positioned under the obverse surface of the chip.Type: GrantFiled: July 25, 2011Date of Patent: May 22, 2012Assignees: Renesas Electronics Corporation, Hitachi Tohbu Semiconductor, Ltd.Inventors: Ryoichi Kajiwara, Masahiro Koizumi, Toshiaki Morita, Kazuya Takahashi, Munehisa Kishimoto, Shigeru Ishii, Toshinori Hirashima, Yasushi Takahashi, Toshiyuki Hata, Hiroshi Sato, Keiichi Ookawa
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Patent number: 8181268Abstract: Optical information and topographic information of the surface of a sample are measured at a nanometer-order resolution and with high reproducibility without damaging a probe and the sample by combining a nanometer-order cylindrical structure with a nanometer-order microstructure to form a plasmon intensifying near-field probe having a nanometer-order optical resolution and by repeating approach/retreat of the probe to/from each measurement point on the sample at a low contact force.Type: GrantFiled: December 18, 2008Date of Patent: May 15, 2012Assignee: Hitachi, Ltd.Inventors: Toshihiko Nakata, Masahiro Watanabe, Takashi Inoue, Kishio Hidaka, Makoto Okai, Toshiaki Morita, Motoyuki Hirooka
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Publication number: 20120104618Abstract: A bonding material comprising metal particles coated with an organic substance having carbon atoms of 2 to 8, wherein the metal particles comprises first portion of 100 nm or less, and a second portion larger than 100 nm but not larger than 100 ?m, each of the portions having at least peak of a particle distribution, based on a volumetric base. The disclosure is further concerned with a bonding method using the bonding material.Type: ApplicationFiled: January 11, 2012Publication date: May 3, 2012Inventors: Yusuke Yasuda, Toshiaki Morita, Eiichi Ide, Hiroshi Hozoji, Toshiaki Ishii
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Publication number: 20110298020Abstract: A semiconductor device, wherein a first metallic member is bonded to a first electrode of a semiconductor element via a first metallic body containing a first precious metal, and a second metallic member is bonded to a second electrode via a second metallic body containing a second precious metal.Type: ApplicationFiled: July 25, 2011Publication date: December 8, 2011Inventors: Ryoichi KAJIWARA, Masahiro Koizumi, Toshiaki Morita, Kazuya Takahashi, Munehisa Kishimoto, Shigeru Ishii, Toshinori Hirashima, Yasushi Takahashi, Toshiyuki Hata, Hiroshi Sato, Keiichi Ookawa
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Patent number: 8008772Abstract: A semiconductor device having a structure in which a semiconductor element and a Cu or Ni electrode are connected by way of a bonding layer comprising Cu, and the Cu bonding layer and the Cu or Ni electrode are diffusion-bonded to each other. The bonding layer is formed by conducting bonding in a reducing atmosphere by using a bonding material containing particles of Cu oxide with an average particle size of 1 nm to 50 ?m and a reducing agent comprising an organic material, thereby providing excellent bonding strength to Ni or Cu electrode.Type: GrantFiled: January 25, 2008Date of Patent: August 30, 2011Assignee: Hitachi, Ltd.Inventors: Toshiaki Morita, Yusuke Yasuda, Eiichi Ide
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Publication number: 20110204125Abstract: A bonding material comprising metal particles coated with an organic substance having carbon atoms of 2 to 8, wherein the metal particles comprises first portion of 100 nm or less, and a second portion larger than 100 nm but not larger than 100 ?m, each of the portions having at least peak of a particle distribution, based on a volumetric base. The disclosure is further concerned with a bonding method using the bonding material.Type: ApplicationFiled: May 3, 2011Publication date: August 25, 2011Inventors: Yusuke YASUDA, Toshiaki MORITA, Eiichi IDE, Hiroshi HOZOJI, Toshiaki ISHII
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Patent number: 7985991Abstract: A semiconductor device features a semiconductor substrate with a MOSFET, an electrode for main current of the MOSFET disposed on a first major surface of the substrate, an electrode for control of the MOSFET disposed on the first major surface, a rear plane electrode of the MOSFET disposed on a second, opposing surface of the substrate, and an external connection terminal electrically connected to the rear plane electrode, the external electrode contains a first part, a second part and a third part, the first part is positioned over the rear plane electrode, the third part is positioned below the second major surface and the third part is connected via the second part to the first part.Type: GrantFiled: March 12, 2008Date of Patent: July 26, 2011Assignees: Renesas Electronics Corporation, Hitachi Tohbu Semiconductor, Ltd.Inventors: Ryoichi Kajiwara, Masahiro Koizumi, Toshiaki Morita, Kazuya Takahashi, Munehisa Kishimoto, Shigeru Ishii, Toshinori Hirashima, Yasushi Takahashi, Toshiyuki Hata, Hiroshi Sato, Keiichi Ookawa
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Publication number: 20110156225Abstract: A semiconductor device achieving both electromagnetic wave shielding property and reliability in a heating process upon mounting electronic components. In the semiconductor device, mount devices 5 and 6 mounted on a main surface of a circuit board 1 are provided, the mount devices 5 and 6 are electrically connected to a wiring pattern 4 at the main surface of the circuit board 1, a sealant 7 of an insulating resin is formed to seal the mount devices 5 and 6, metal particles are applied to a surface of the sealant 7, and the metal particles applied are sintered, thereby forming an electromagnetic shielding layer 2, and electrically connecting the electromagnetic shielding layer 2 to a ground pattern 3 of the circuit board 1.Type: ApplicationFiled: July 31, 2009Publication date: June 30, 2011Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Hiroshi Hozoji, Toshiaki Morita, Yusuke Yasuda, Chiko Yorita, Yuji Shirai
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Patent number: 7955411Abstract: A bonding material comprising metal particles coated with an organic substance having carbon atoms of 2 to 8, wherein the metal particles comprises first portion of 100 nm or less, and a second portion larger than 100 nm but not larger than 100 ?m, each of the portions having at least peak of a particle distribution, based on a volumetric base. The disclosure is further concerned with a bonding method using the bonding material.Type: GrantFiled: December 27, 2007Date of Patent: June 7, 2011Assignee: Hitachi, Ltd.Inventors: Yusuke Yasuda, Toshiaki Morita, Eiichi Ide, Hiroshi Hozoji, Toshiaki Ishii
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Publication number: 20110012262Abstract: A semiconductor device wherein a semiconductor element made of Si or Si group material mounted on a substrate, the semiconductor element is mounted on the substrate and the semiconductor element is bonded to a silver bonding material via a oxide film formed on the semiconductor element. The bonding material comprising silver oxide particles having an average particle size of 1 nm to 50 nm and an organic reducing agent is used for bonding in air, which gives a high bonding strength to the oxide on the semiconductor element.Type: ApplicationFiled: June 29, 2010Publication date: January 20, 2011Inventors: Toshiaki MORITA, Yusuke Yasuda, Eiichi Ide
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Publication number: 20100325761Abstract: Optical information and topographic information of the surface of a sample are measured at a nanometer-order resolution and with high reproducibility without damaging a probe and the sample by combining a nanometer-order cylindrical structure with a nanometer-order microstructure to form a plasmon intensifying near-field probe having a nanometer-order optical resolution and by repeating approach/retreat of the probe to/from each measurement point on the sample at a low contact force.Type: ApplicationFiled: December 18, 2008Publication date: December 23, 2010Applicant: Hitachi, Ltd.Inventors: Toshihiko Nakata, Masahiro Watanabe, Takashi Inoue, Kishio Hidaka, Makoto Okai, Toshiaki Morita, Motoyuki Hirooka