Patents by Inventor Toshio Hasegawa

Toshio Hasegawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210142982
    Abstract: A plasma processing method according to an embodiment is performed in a state in which a substrate is placed on a support stage in an internal space of a chamber body. In the plasma processing method, a plasma treatment is performed on the substrate. Subsequently, a phase of a voltage of a lower electrode is relatively adjusted with respect to a phase of a voltage of an upper electrode by a phase adjustment circuit, such that a thickness of a sheath between the support stage and plasma without extinguishing the plasma generated in order to perform the plasma treatment. Thereafter, in a state in which supply of a high-frequency power is stopped, gases and particles in the internal space of the chamber body are discharged using an exhaust device.
    Type: Application
    Filed: September 26, 2018
    Publication date: May 13, 2021
    Inventors: Shinya IWASHITA, Takamichi KIKUCHI, Naotaka NORO, Toshio HASEGAWA, Tsuyoshi MORIYA
  • Patent number: 10872764
    Abstract: Disclosed is a film forming method including forming a metal oxide film on a base film by alternately supplying a metal-containing gas and a plasmatized oxidizing gas. The metal-containing gas is changed from a first metal-containing gas having no halogen to a second metal-containing gas different from the first metal-containing gas during the film forming of the metal oxide film.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: December 22, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Shinya Iwashita, Takamichi Kikuchi, Naotaka Noro, Toshio Hasegawa, Tsuyoshi Moriya
  • Publication number: 20200299841
    Abstract: Provided is an abnormality detection system that includes a first controller configured to control a substrate processing apparatus and a second controller configured to control a device provided in the substrate processing apparatus according to an instruction from the first controller, thereby detecting an abnormality in the device. The second controller includes a storage unit configured to collect status signals for the device for a predetermined time and at a predetermined sampling interval in a predetermined cycle and accumulate the collected status signals for the device, and the first controller includes an abnormality determination unit configured to acquire the accumulated status signals for the device from the second controller at a time interval equal to or longer than the predetermined time, and determine presence or absence of an abnormality in the device.
    Type: Application
    Filed: March 15, 2017
    Publication date: September 24, 2020
    Inventors: Katsuhito Hirose, Toshio Hasegawa, Shohei Yoshida, Takeshi Shinohara, Shinji Kawasaki
  • Publication number: 20200208260
    Abstract: A method of forming a RuSi film includes performing a process a plurality of times, the process including alternately repeating: supplying a Ru(DMBD)(CO)3 gas into a processing container accommodating a substrate; and supplying a hydrogenated silicon gas into the processing container.
    Type: Application
    Filed: December 26, 2019
    Publication date: July 2, 2020
    Inventors: Takamichi KIKUCHI, Naotaka NORO, Toshio HASEGAWA
  • Publication number: 20200111675
    Abstract: There is provided a method of performing a surface processing on a substrate having a metal layer formed on a bottom portion of a recess formed in an insulating film, the method including: supplying a halogen-containing gas into a processing chamber in which the substrate is loaded; and removing a metal oxide from the bottom portion of the recess using the halogen-containing gas.
    Type: Application
    Filed: September 30, 2019
    Publication date: April 9, 2020
    Inventors: Koichi TAKATSUKI, Tadahiro ISHIZAKA, Mikio SUZUKI, Toshio HASEGAWA
  • Patent number: 10535528
    Abstract: A method for forming a titanium oxide film on a substrate to be processed, which has a silicon portion on a surface thereof, the method including: forming a first titanium oxide film on the surface of the substrate to be processed, which includes the silicon portion, by means of thermal ALD by alternately supplying a titanium-containing gas and a gas containing hydrogen and oxygen serving as an oxidizing agent in a first stage; and forming a second titanium oxide film on the first titanium oxide film by means of plasma ALD by alternately supplying a titanium-containing gas and plasma of an oxygen-containing gas as an oxidizing agent in a second stage.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: January 14, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Naoki Shindo, Toshio Hasegawa, Naotaka Noro, Miyako Kaneko
  • Patent number: 10361366
    Abstract: A plurality of embodiments for ReRAM devices and method of making are described. According to one embodiment, the ReRAM device includes a first electrode film formed on a substrate, a metal oxide film with oxygen vacancies formed on a first electrode film, a conformal TiAlC film, oxidized by diffused oxygen atoms from the metal oxide film, formed on the metal oxide film, and a second electrode film formed on the TiAlC film. According to another embodiment, the ReRAM device includes a pair of vertical metal oxide films, a pair of vertical conformal TiAlC films formed on the pair of vertical metal oxide films, the pair of vertical conformal TiAlC films oxidized by diffused oxygen atoms from the pair of vertical metal oxide films, and an electrode film formed between the pair of vertical conformal TiAlC films.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: July 23, 2019
    Assignee: Tokyo Electron Limited
    Inventors: Takahiro Hakamata, Genji Nakamura, Sara Aoki, Toshio Hasegawa, Takamichi Kikuchi
  • Publication number: 20190088475
    Abstract: Disclosed is a film forming method including forming a metal oxide film on a base film by alternately supplying a metal-containing gas and a plasmatized oxidizing gas. The metal-containing gas is changed from a first metal-containing gas having no halogen to a second metal-containing gas different from the first metal-containing gas during the film forming of the metal oxide film.
    Type: Application
    Filed: September 17, 2018
    Publication date: March 21, 2019
    Inventors: Shinya Iwashita, Takamichi Kikuchi, Naotaka Noro, Toshio Hasegawa, Tsuyoshi Moriya
  • Publication number: 20190044064
    Abstract: A plurality of embodiments for ReRAM devices and method of making are described. According to one embodiment, the ReRAM device includes a first electrode film formed on a substrate, a metal oxide film with oxygen vacancies formed on a first electrode film, a conformal TiAlC film, oxidized by diffused oxygen atoms from the metal oxide film, formed on the metal oxide film, and a second electrode film formed on the TiAlC film. According to another embodiment, the ReRAM device includes a pair of vertical metal oxide films, a pair of vertical conformal TiAlC films formed on the pair of vertical metal oxide films, the pair of vertical conformal TiAlC films oxidized by diffused oxygen atoms from the pair of vertical metal oxide films, and an electrode film formed between the pair of vertical conformal TiAlC films.
    Type: Application
    Filed: August 3, 2018
    Publication date: February 7, 2019
    Inventors: Takahiro Hakamata, Genji Nakamura, Sara Aoki, Toshio Hasegawa, Takamichi Kikuchi
  • Patent number: 10199268
    Abstract: In a film forming method for forming a cobalt film on a target substrate having a recess formed in a surface thereof to fill the recess with the cobalt film, the recess is partially filled by forming a cobalt film on the target substrate by an ALD method or a CVD method using an organic metal compound gas. The cobalt film is partially etched by supplying an etching gas containing ?-diketone gas and NO gas to the target substrate. Then, the recess is further filled by forming a cobalt film on the target substrate by the ALD method or the CVD method using an organic metal compound gas.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: February 5, 2019
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Susumu Yamauchi, Jun Lin, Kazuaki Nishimura, Toshio Hasegawa
  • Publication number: 20180108534
    Abstract: A method for forming a titanium oxide film on a substrate to be processed, which has a silicon portion on a surface thereof, the method including: forming a first titanium oxide film on the surface of the substrate to be processed, which includes the silicon portion, by means of thermal ALD by alternately supplying a titanium-containing gas and a gas containing hydrogen and oxygen serving as an oxidizing agent in a first stage; and forming a second titanium oxide film on the first titanium oxide film by means of plasma ALD by alternately supplying a titanium-containing gas and plasma of an oxygen-containing gas as an oxidizing agent in a second stage.
    Type: Application
    Filed: October 11, 2017
    Publication date: April 19, 2018
    Inventors: Naoki SHINDO, Toshio HASEGAWA, Naotaka NORO, Miyako KANEKO
  • Publication number: 20180108518
    Abstract: A film forming apparatus 1 includes a plasma generating mechanism 47 commonly used for plasmarizing a processing gas and a cleaning gas supplied into a processing vessel 11 in which a vacuum atmosphere is formed; an exhaust device 17 configured to evacuate an exhaust line 61 connected to a processing gas discharge unit 43 while the plasmarization of the cleaning gas is being performed by the plasma generating mechanism 47; a tank 62 provided at the exhaust line 61; and a valve V2 which is provided at the exhaust line 61 between the tank 62 and the processing gas discharge unit 43. The valve V2 is configured to be closed to reduce an internal pressure of the tank 62 and opened to attract the plasmarized cleaning gas into the tank 62 from a processing space 40 through the processing gas discharge unit 43.
    Type: Application
    Filed: October 13, 2017
    Publication date: April 19, 2018
    Inventors: Naotaka Noro, Toshio Hasegawa, Tamaki Takeyama, Shinya Iwashita, Katsuhito Hirose
  • Publication number: 20180076087
    Abstract: In a film forming method for forming a cobalt film on a target substrate having a recess formed in a surface thereof to fill the recess with the cobalt film, the recess is partially filled by forming a cobalt film on the target substrate by an ALD method or a CVD method using an organic metal compound gas. The cobalt film is partially etched by supplying an etching gas containing ?-diketone gas and NO gas to the target substrate. Then, the recess is further filled by forming a cobalt film on the target substrate by the ALD method or the CVD method using an organic metal compound gas.
    Type: Application
    Filed: September 7, 2017
    Publication date: March 15, 2018
    Inventors: Susumu YAMAUCHI, Jun LIN, Kazuaki NISHIMURA, Toshio HASEGAWA
  • Patent number: 9698020
    Abstract: A method of forming a semiconductor device is disclosed in various embodiments. The method includes providing a substrate containing first and second device regions, and a high-k film on the substrate, depositing a metal nitride gate electrode film on the high-k film, forming a metal-containing gate electrode film on the metal nitride gate electrode film in the second device region but not in the first device region, and depositing a Si-based cap layer on the metal-containing gate electrode film in the second device region and on the metal nitride gate electrode film in the first device region.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: July 4, 2017
    Assignee: Tokyo Electron Limited
    Inventors: Genji Nakamura, Toshio Hasegawa
  • Patent number: 9607888
    Abstract: Methods for integration of atomic layer deposition (ALD) of barrier layers and chemical vapor deposition (CVD) of Ru liners for Cu filling of narrow recessed features for semiconductor devices are disclosed in several embodiments. According to one embodiment, the method includes providing a substrate containing a recessed feature, depositing a conformal barrier layer by ALD in the recessed feature, where the barrier layer contains TaN or TaAlN, depositing a conformal Ru liner by CVD on the barrier layer, and filling the recessed feature with Cu metal.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: March 28, 2017
    Assignee: Tokyo Electron Limited
    Inventors: Kai-Hung Yu, Toshio Hasegawa, Tadahiro Ishizaka, Manabu Oie, Fumitaka Amano, Steven Consiglio, Cory Wajda, Kaoru Maekawa, Gert J. Leusink
  • Patent number: 9330936
    Abstract: A method is provided for forming a semiconductor device. According to one embodiment, the method includes providing a substrate having a Ge-containing film thereon, identifying a first plasma processing recipe that uses a metal chloride precursor to deposit a first metal layer on the Ge-containing film at a higher rate than the Ge-containing film is etched by the metal chloride precursor, identifying a second plasma processing recipe that uses the metal chloride precursor to etch the Ge-containing film at a higher rate than a second metal layer is deposited on the Ge-containing film by the metal chloride precursor, performing the first plasma processing recipe to deposit the first metal layer on the Ge-containing film, and performing the second plasma processing recipe to deposit the second metal layer on the first metal layer, and where the second metal layer is deposited at a higher rate than the first metal layer.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: May 3, 2016
    Assignee: Tokyo Electron Limited
    Inventors: Toshio Hasegawa, Hideaki Yamasaki
  • Publication number: 20160111290
    Abstract: A method of forming a semiconductor device is disclosed in various embodiments. The method includes providing a substrate containing first and second device regions, and a high-k film on the substrate, depositing a metal nitride gate electrode film on the high-k film, forming a metal-containing gate electrode film on the metal nitride gate electrode film in the second device region but not in the first device region, and depositing a Si-based cap layer on the metal-containing gate electrode film in the second device region and on the metal nitride gate electrode film in the first device region.
    Type: Application
    Filed: October 20, 2015
    Publication date: April 21, 2016
    Inventors: Genji Nakamura, Toshio Hasegawa
  • Publication number: 20150221550
    Abstract: Methods for integration of atomic layer deposition (ALD) of barrier layers and chemical vapor deposition (CVD) of Ru liners for Cu filling of narrow recessed features for semiconductor devices are disclosed in several embodiments. According to one embodiment, the method includes providing a substrate containing a recessed feature, depositing a conformal barrier layer by ALD in the recessed feature, where the barrier layer contains TaN or TaAlN, depositing a conformal Ru liner by CVD on the barrier layer, and filling the recessed feature with Cu metal.
    Type: Application
    Filed: February 3, 2015
    Publication date: August 6, 2015
    Inventors: Kai-Hung Yu, Toshio Hasegawa, Tadahiro Ishizaka, Manabu Oie, Fumitaka Amano, Steven Consiglio, Cory Wajda, Kaoru Maekawa, Gert J. Leusink
  • Patent number: 9101067
    Abstract: In a Cu wiring forming method for forming a Cu wiring by filling Cu in a recess which is formed in a substrate in a predetermined pattern, a barrier film formed of a TaAlN film is formed at least on the surface of the recess by thermal ALD or thermal CVD. Then a Cu film is formed to fill the recess with the Cu film. Further, the Cu wiring is formed in the recess by polishing the entire surface of the substrate by CMP.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: August 4, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Tadahiro Ishizaka, Toshio Hasegawa
  • Publication number: 20150132939
    Abstract: A method is provided for forming a semiconductor device. According to one embodiment, the method includes providing a substrate having a Ge-containing film thereon, identifying a first plasma processing recipe that uses a metal chloride precursor to deposit a first metal layer on the Ge-containing film at a higher rate than the Ge-containing film is etched by the metal chloride precursor, identifying a second plasma processing recipe that uses the metal chloride precursor to etch the Ge-containing film at a higher rate than a second metal layer is deposited on the Ge-containing film by the metal chloride precursor, performing the first plasma processing recipe to deposit the first metal layer on the Ge-containing film, and performing the second plasma processing recipe to deposit the second metal layer on the first metal layer, and where the second metal layer is deposited at a higher rate than the first metal layer.
    Type: Application
    Filed: November 6, 2014
    Publication date: May 14, 2015
    Inventors: Toshio Hasegawa, Hideaki Yamasaki