Abstract: A non-volatile semiconductor memory device comprising a first conductive semiconductor having steps on a surface thereof, a second conductive semiconductor region formed on an upper portion and a bottom portion of each of the steps and being separated in a direction perpendicular to the main surface of the first conductive semiconductor to function as a source or a drain, a gate dielectric film containing therein charge storage means which is spatially discrete and being formed on the first conductive semiconductor so as to coat at least a sidewall of each of the steps, and a gate electrode formed on the gate dielectric film. Accordingly, there are provided a non-volatile semiconductor memory device which suffers almost no deterioration in the properties and can perform the operation of recording of 2 bits per unit memory device even when the size of the semiconductor memory device in the semiconductor substrate is scaled down, and a process for fabricating the non-volatile semiconductor memory device.

Abstract: A semiconductor device enabling word lines to be arranged at close intervals, comprising a plurality of memory transistors arranged in an array and a plurality of word lines serving also as gate electrodes of memory transistors in a same row, extending in a row direction, and repeating in a column direction, where insulating films are formed between the plurality of word lines to insulate and isolate the word lines from each other and where a dimension of separation of word lines is defined by the thickness of the insulating films.

Abstract: A non-volatile semiconductor memory device comprising a first conductive semiconductor having steps on a surface thereof, a second conductive semiconductor region formed on an upper portion and a bottom portion of each of the steps and being separated in a direction perpendicular to the main surface of the first conductive semiconductor to function as a source or a drain, a gate dielectric film containing therein charge storage means which is spatially discrete and being formed on the first conductive semiconductor so as to coat at least a sidewall of each of the steps, and a gate electrode formed on the gate dielectric film. Accordingly, there are provided a non-volatile semiconductor memory device which suffers almost no deterioration in the properties and can perform the operation of recording of 2 bits per unit memory device even when the size of the semiconductor memory device in the semiconductor substrate is scaled down, and a process for fabricating the non-volatile semiconductor memory device.

Abstract: A non-volatile semiconductor memory device comprising a first conductive semiconductor having steps on a surface thereof, a second conductive semiconductor region formed on an upper portion and a bottom portion of each of the steps and being separated in a direction perpendicular to the main surface of the first conductive semiconductor to function as a source or a drain, a gate dielectric film containing therein charge storage means which is spatially discrete and being formed on the first conductive semiconductor so as to coat at least a sidewall of each of the steps, and a gate electrode formed on the gate dielectric film. Accordingly, there are provided a non-volatile semiconductor memory device which suffers almost no deterioration in the properties and can perform the operation of recording of 2 bits per unit memory device even when the size of the semiconductor memory device in the semiconductor substrate is scaled down, and a process for fabricating the non-volatile semiconductor memory device.

Abstract: A semiconductor device enabling word lines to be arranged at close intervals, comprising a plurality of memory transistors arranged in an array and a plurality of word lines serving also as gate electrodes of memory transistors in a same row, extending in a row direction, and repeating in a column direction, where insulating films are formed between the plurality of word lines to insulate and isolate the word lines from each other and where a dimension of separation of word lines is defined by the thickness of the insulating films.

Abstract: An automatic transmission with input shaft having drive gears and an output shaft with driven gears engaging with the drive gears are provided. A transmission gear for transmitting a power is selectively switched from transmission gear trains of the drive gears and driven gears, by a switching mechanism. An input clutch for switching engine power transmission and input shaft disconnect states is arranged between an engine crankshaft and the input shaft. Bypass clutches capable of transmitting the power to the respective transmission gear trains are provided at an end portion of the input shaft, and the engine power is transmitted to the output shaft via at least any one of the bypass clutches at a time of shifting gears. The input clutch and the plurality of bypass clutches are concentrically arranged in series between the engine and the input shaft providing size reduction.

Abstract: A semiconductor device enabling word lines to be arranged at close intervals, comprising a plurality of memory transistors arranged in an array and a plurality of word lines serving also as gate electrodes of memory transistors in a same row, extending in a row direction, and repeating in a column direction, where insulating films are formed between the plurality of word lines to insulate and isolate the word lines from each other and where a dimension of separation of word lines is defined by the thickness of the insulating films.

Abstract: A molded body formed with pulp mold having projected lines corresponding to a slit-shaped vent package part, capable of being provided by paper-making/dewatering, using a paper making mold, a slurry having fibers dispersed in a liquid so as to obtain a three-dimensional fiber wetted laminated body, moving the laminated body to a dry mold having an inner surface with the slit-shaped vent package, and pressing and drying that laminated body.

Abstract: This discharge power supply apparatus is for supplying a D.C. voltage to a discharge load 6 and discharging the same. The discharge power supply apparatus includes an inverter circuit 2 that converts D.C. voltage to A.C. voltage; a transformer 3 having a primary winding 3a to which the A.C. voltage output by the inverter circuit 2 is supplied and a secondary winding 3b; a full-wave rectifier circuit 4 that has a plurality of diodes 4A to 4D and rectifies the A.C. voltage generated by the secondary winding 3b; and a trigger capacitor 7 connected in parallel to a part of the diodes of the full-wave rectifier circuit 4.

Abstract: A terminal arrangement of a motor has a terminal base formed with a plurality of terminal pins, the terminal base being fixed detachably on a stator iron core of a motor, terminal pins formed on bobbins, connected electrically with windings wound around the bobbins, a printed circuit board arranged on the stator iron core so as to connect electrically the terminal pins formed on the bobbins with the terminal pins formed on the terminal base, and an end bracket arranged so as to cover the printed circuit board. A hole is formed in the stator iron core, and an earth electrode is projected from the terminal base, and inserted into the hole so as to be connected electrically with the stator iron core, the earth electrode being connected electrically to one of the terminal pins formed on the terminal base. A capacitor motor has a motor having a stator iron core, and a phase advancing capacitor fixed detachably on the stator iron core.

Abstract: Disclosed is a coating composition for a tendon for prestressed concrete; wherein being applied on the surface of the tendon for a tendon for prestressed concrete; comprising oxidation-curing type resin modified with fatty acid, and metal catalyst to promote the curing of the resin; and curing time thereof is adjusted so that tensioning by the tendon can be exerted 30 days or later after casting of the concrete. The coating composition can be used safely almost without cutaneous stimulation, and enable effective tensioning even after hardening of the concrete when applied to massive concrete structure. Further, the coating composition exhibits excellent storage stability.

Abstract: A non-volatile semiconductor memory having a memory transistor including a stacked-layer film formed between a semiconductor substrate and a gate electrode and having a charge storage ability, a first conductivity type region of the semiconductor substrate in which a channel is formed under the control of the gate electrode via the stacked-layer film, and two second conductivity type regions formed at the semiconductor substrate sandwiching the first conductivity type region therebetween, the memory transistor having a channel length estimated as the boundary of occurrence of a short channel effect differing between the time of a write operation and the time of a read operation and has a channel length of the actual device between the different channel lengths.

Abstract: A terminal arrangement of a motor has a terminal base formed with a plurality of terminal pins, the terminal base being fixed detachably on a stator iron core of a motor, terminal pins formed on bobbins, connected electrically with windings wound around the bobbins, a printed circuit board arranged on the stator iron core so as to connect electrically the terminal pins formed on the bobbins with the terminal pins formed on the terminal base, and an end bracket arranged so as to cover the printed circuit board. A hole is formed in the stator iron core, and an earth electrode is projected from the terminal base, and inserted into the hole so as to be connected electrically with the stator iron core, the earth electrode being connected electrically to one of the terminal pins formed on the terminal base. A capacitor motor has a motor having a stator iron core, and a phase advancing capacitor fixed detachably on the stator iron core.

Abstract: A semiconductor device enabling word lines to be arranged at close intervals, comprising a plurality of memory transistors arranged in an array and a plurality of word lines serving also as gate electrodes of memory transistors in a same row, extending in a row direction, and repeating in a column direction, where insulating films are formed between the plurality of word lines to insulate and isolate the word lines from each other and where a dimension of separation of word lines is defined by the thickness of the insulating films.

Abstract: A semiconductor device enabling word lines to be arranged at close intervals, comprising a plurality of memory transistors arranged in an array and a plurality of word lines serving also as gate electrodes of memory transistors in a same row, extending in a row direction, and repeating in a column direction, where insulating films are formed between the plurality of word lines to insulate and isolate the word lines from each other and where a dimension of separation of word lines is defined by the thickness of the insulating films.

Abstract: A nonvolatile semiconductor memory device having MONOS type memory cells of increased efficiency by hot electron injection and improved scaling characteristics includes a channel forming region in the vicinity of a surface of a substrate, first and second impurity regions, acting as a source and a drain in operation, formed in the vicinity of the surface of the substrate sandwiching the channel forming region between them, a gate insulating film stacked on the channel forming region and having a plurality of films, and a charge storing means that is formed in the gate insulating film dispersed in the plane facing the channel forming region. A bottom insulating film includes a dielectric film that exhibits a FN type electroconductivity and makes the energy barrier between the bottom insulating film and the substrate lower than that between silicon dioxide and silicon.

Abstract: A non-volatile semiconductor memory device comprising a first conductive semiconductor having steps on a surface thereof, a second conductive semiconductor region formed on an upper portion and a bottom portion of each of the steps and being separated in a direction perpendicular to the main surface of the first conductive semiconductor to function as a source or a drain, a gate dielectric film containing therein charge storage means which is spatially discrete and being formed on the first conductive semiconductor so as to coat at least a sidewall of each of the steps, and a gate electrode formed on the gate dielectric film. Accordingly, there are provided a non-volatile semiconductor memory device which suffers almost no deterioration in the properties and can perform the operation of recording of 2 bits per unit memory device even when the size of the semiconductor memory device in the semiconductor substrate is scaled down, and a process for fabricating the non-volatile semiconductor memory device.

Abstract: The present invention provides a semiconductor device in which a problem such as a thermal diffusion defect in a hollow wiring technique can be solved. In the semiconductor device, a gap is formed between wirings formed on a substrate, and the gap is filled with a gas having a thermal conductivity equal to or higher than three times that of air at 0° C.

Abstract: A semiconductor device enabling word lines to be arranged at close intervals, comprising a plurality of memory transistors arranged in an array and a plurality of word lines serving also as gate electrodes of memory transistors in a same row, extending in a row direction, and repeating in a column direction, where insulating films are formed between the plurality of word lines to insulate and isolate the word lines from each other and where a dimension of separation of word lines is defined by the thickness of the insulating films.

Abstract: A method of forming a semiconductor device to have a gap between wirings formed on a substrate, which gap is filled with a gas having a thermal conductivity equal to or higher than three times that of air at zero degrees Celsius. In the method, the following steps are performed: (A) forming a wiring and a filling layer filled between wirings, on a substrate; (B) forming a gas permeable film on the wiring and the filling layer; (C) removing the filling layer through the gas permeable film so as to form a gap between the wirings; (D) filling a gas having a thermal conductivity equal to or higher than three times that of air at 0.degree. C. through the gas permeable film into the gap; and (E) forming a gas impermeable film on the gas permeable film.