Patents by Inventor Toshiyuki Fukuda

Toshiyuki Fukuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110083322
    Abstract: An optical device includes a substrate, an optical element, a translucent component, a plurality of first terminals and a sealant. The sealant is located lower than the top surface of the translucent component. The top surface of the translucent component is exposed out of the sealant, while the side surface of the translucent component is covered with the sealant.
    Type: Application
    Filed: December 16, 2010
    Publication date: April 14, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Masanori MINAMIO, Yutaka Harada, Kiyokazu Itoi, Toshiyuki Fukuda
  • Patent number: 7923798
    Abstract: An optical device includes a light receiving element chip having: an active region formed on a principal plane of a substrate and made by arranging a plurality of light receiving pixels; a circuit region disposed around an outer circumference of the active region; a penetrating conductor provided to penetrate the substrate in the thickness direction of the substrate; and an external connection terminal provided on a back surface of the substrate facing the principal plane thereof and connected to the penetrating conductor. The optical device further includes a microlens, a planarization film, and a transparent protective film formed on the planarization film.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: April 12, 2011
    Assignee: Panasonic Corporation
    Inventors: Masanori Minamio, Yoshiki Takayama, Toshiyuki Fukuda
  • Patent number: 7876570
    Abstract: In a module with embedded electronic components, connection electrodes are formed on the component mounting surface of a substrate. The electrode portions of each of the electronic components are placed on the individual connection electrodes and connected in fixed relation thereto by using a solder. The electronic components are encapsulated in an encapsulating resin.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: January 25, 2011
    Assignee: Panasonic Corporation
    Inventors: Masanori Minamio, Hideki Takehara, Yoshiyuki Arai, Toshiyuki Fukuda
  • Publication number: 20110001208
    Abstract: An insulation is provided in a portion surrounding a light receiving portion in a semiconductor element, and a sealing resin is provided around the insulation, thereby warping the insulation outward when viewed from the light receiving portion to prevent diffuse light from returning to the light receiving portion of the semiconductor element.
    Type: Application
    Filed: February 26, 2009
    Publication date: January 6, 2011
    Inventors: Junya Furuyashiki, Noriyuki Yoshikawa, Toshiyuki Fukuda, Toshimasa Itooka, Hiroki Utatsu
  • Publication number: 20100308468
    Abstract: In a semiconductor device made of a plurality of materials, if the device is fabricated through a step of cutting the bonded plurality of materials, a boundary line of the plurality of materials is exposed on a cutting plane. Internal stress in the cutting remains at this boundary line to allow moisture and corrosive gas to easily enter into the device. In order to reduce the entrance of the moisture, the gas, and the like, the boundary appearing on the cutting plane is covered by a covering layer. At this time, partial cutting exposing the boundary line and not separating semiconductor devices are performed so that the covering layer can be formed with the plurality of semiconductor devices attached to the substrate.
    Type: Application
    Filed: March 2, 2009
    Publication date: December 9, 2010
    Inventors: Noriyuki Yoshikawa, Toshiyuki Fukuda, Junya Furuyashiki, Toshimasa Itooka, Hiroki Utatsu
  • Patent number: 7834926
    Abstract: A semiconductor image sensing element has a semiconductor element including an image sensing area, a peripheral circuit region, a plurality of electrode portions provided in the peripheral circuit region, and a plurality of micro-lenses provided on the image sensing area and an optical member having a configuration covering at least the image sensing area and bonded over the micro-lenses via a transparent bonding member. The side surface region of the optical member is formed with a light shielding film for preventing the irradiation of the image sensing area with a reflected light beam or a scattered light beam from the side surface region.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: November 16, 2010
    Assignee: Panasonic Corporation
    Inventors: Masanori Minamio, Tomoko Komatsu, Kiyokazu Itoi, Toshiyuki Fukuda
  • Patent number: 7822090
    Abstract: A semiconductor device includes an optical semiconductor element, a package including a base made of a metal for mounting the optical semiconductor element, and a cap for encapsulating the optical semiconductor element and a gas by covering the package and the optical semiconductor element. The gas encapsulated with the package has an oxygen concentration not less than 15% and less than 30% and has a dew-point not less than ?15° C. and not more than ?5° C.
    Type: Grant
    Filed: August 6, 2008
    Date of Patent: October 26, 2010
    Assignee: Panasonic Corporation
    Inventors: Masanori Minamio, Noriyuki Yoshikawa, Shinichi Ijima, Toshiyuki Fukuda
  • Patent number: 7817204
    Abstract: A solid-state image sensor includes a first image sensing device, a first flexible substrate connected to the first image sensing device, a second solid-state image sensing device, and a second flexible substrate connected to the second solid-state image sensing device. The solid-state image sensing devices are disposed adjacently to each other such that light receiving surfaces are perpendicular to each other. The second solid-state image sensing device directly receives incident light. However, the first solid-state image sensing device receives the incident light reflected by a mirror. Electronic components are mounted on the two flexible substrates. The first flexible substrate is bent at two bending positions to face the second flexible substrate and electrically connected thereto.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: October 19, 2010
    Assignee: Panasonic Corporation
    Inventors: Masanori Minamio, Yutaka Harada, Takahito Ishikawa, Toshiyuki Fukuda, Yoshiki Takayama
  • Patent number: 7816777
    Abstract: A semiconductor-element mounting substrate is a substrate for mounting a semiconductor element, and includes a substrate body. The substrate body has a mounting surface, and the center portion of the mounting surface is provided with a die pattern. Through conductors are provided in a portion of the substrate body located outside the die pattern to penetrate the substrate body in the thicknesswise direction. First terminals and second terminals are connected to the through conductors, respectively. The first terminals each extend toward the outer edge of the mounting surface, and they are electrically connected to the semiconductor element. The second terminals are provided on a surface of the substrate body opposite to the mounting surface.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: October 19, 2010
    Assignee: Panasonic Corporation
    Inventors: Masanori Minamio, Noboru Takeuchi, Kenichi Itou, Toshiyuki Fukuda, Hideki Sakota
  • Patent number: 7800209
    Abstract: A wiring board includes a film base, a plurality of conductive wirings aligned on the film base, and protrusion electrodes formed of a plated metal in the vicinity of end portions of the conductive wirings, respectively. An outer surface at both side portions of the protrusion electrodes in cross section in a width direction of the conductive wirings defines a curve, and the protrusion electrodes in cross section in a longitudinal direction of the conductive wirings define a rectangular shape. The conductive wirings include a first conductive wiring having a wiring width of W1 and a second conductive wiring having a wiring width of W2 larger than W1, and the protrusion electrode on the first conductive wiring and the protrusion electrode on the second conductive wiring have a substantially same height.
    Type: Grant
    Filed: January 8, 2007
    Date of Patent: September 21, 2010
    Assignee: Panasonic Corporation
    Inventors: Yukihiro Kozaka, Nozomi Shimoishizaka, Toshiyuki Fukuda
  • Patent number: 7790270
    Abstract: The present invention provides a wiring board which may be warped only by a reduced amount when the wiring board is thin and has wiring patterns of different shapes on the opposite surfaces thereof and which enables a thin, small, and reliable semiconductor device to be implemented. The wiring board includes a planar resin base material 12, a first resin film 26 provided on the first surface of the resin base material 12 and shaped to expose the element connection terminals 14, and a second resin film 28 provided on the second surface of the resin base material and shaped to expose the external connection terminals 16, wherein the first resin film 26 and the second resin film 28 are different in at least one of a glass transition point, cure shrinkage, and a thermal expansion coefficient.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: September 7, 2010
    Assignee: Panasoniic Corporation
    Inventors: Yoshihiro Tomita, Masanori Minamio, Toshiyuki Fukuda
  • Patent number: 7789575
    Abstract: An optical device includes an optical element, a transparent member arranged on the optical element, and a transparent resin adhesive for causing the transparent member to adhere and be fixed onto a circuit formation face of the optical element. The optical device includes a light detecting region having a plurality of micro lenses, a peripheral circuit region formed in the outer peripheral part of the light detecting region, and an electrode region formed at the outer peripheral part of the peripheral circuit region. A roughed region in a saw-toothed shape in section is formed in part of a face of the transparent member which adheres to the optical element, the part being overlapped with the outer peripheral part of the light detecting region as viewed in plan.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: September 7, 2010
    Assignee: Panasonic Corporation
    Inventors: Masanori Minamio, Yutaka Harada, Toshiyuki Fukuda
  • Publication number: 20100190287
    Abstract: A semiconductor image sensor includes: a semiconductor imaging element including an imaging area, a peripheral circuit area, and an electrode area; cylindrical electrodes provided on electrode terminals so as to be electrically connected with an external device; and a transparent resin layer provided on the upper surface of the semiconductor imaging element. The upper surface of each cylindrical electrode and the upper surface of the transparent resin layer are substantially of the same height.
    Type: Application
    Filed: March 4, 2010
    Publication date: July 29, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Masanori MINAMIO, Toshiyuki Fukuda
  • Patent number: 7745834
    Abstract: A semiconductor image sensor includes: a semiconductor imaging element including an imaging area, a peripheral circuit area, and an electrode area; cylindrical electrodes provided on electrode terminals so as to be electrically connected with an external device; and a transparent resin layer provided on the upper surface of the semiconductor imaging element. The upper surface of each cylindrical electrode and the upper surface of the transparent resin layer are substantially of the same height.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: June 29, 2010
    Assignee: Panasonic Corporation
    Inventors: Masanori Minamio, Toshiyuki Fukuda
  • Publication number: 20100148342
    Abstract: A stacked semiconductor module is made by stacking a second semiconductor device having a second semiconductor chip mounted to the top surface of a second semiconductor substrate above the top surface of a first semiconductor device having a first semiconductor chip mounted to a first semiconductor substrate. The top surface of the first semiconductor substrate is provided with a first connection terminal and the bottom surface of the first semiconductor substrate is provided with an external connection terminal. A region of the bottom surface of the second semiconductor substrate lying opposite to the second semiconductor chip is provided with a second connection terminal. A conductive connecting member connects the first connection terminal to the second connection terminal.
    Type: Application
    Filed: February 22, 2010
    Publication date: June 17, 2010
    Applicant: Panasonic Corporation
    Inventors: Takeshi KAWABATA, Toshiyuki Fukuda
  • Patent number: 7728429
    Abstract: A semiconductor device in accordance with the present invention includes IC chips (semiconductor elements) (2, 3, 4) having solder bumps (24) (projecting electrodes) formed on electrode pads, and a first wiring board (1) having connection terminals (7) to which the respective solder bumps (24) of the IC chips (2, 3, 4) are connected, external connection terminals (8) for connection to an external apparatus, and conductor wires (9) provided in respective groove portions formed in a board surface and connected to the respective connection terminals (7). In spite of the reduced pitch of the conductor wires (9), the presence of the groove portions enables an increase in cross section, allowing a reduction in wiring resistance.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: June 1, 2010
    Assignee: Panasonic Corporation
    Inventors: Isamu Aokura, Toshiyuki Fukuda, Yukitoshi Ota, Keiji Miki
  • Publication number: 20100128750
    Abstract: The semiconductor device includes: a base; a first mount placed on the bottom of the base; a second mount placed on the top of the base; a first light-emitting element placed on the bottom of the first mount; and a second light-emitting element placed on the top of the second mount for emitting light. The first light-emitting element and the second light-emitting element are placed so that the emission direction of light from the second light-emitting element is at an angle of depression with respect to the emission direction of light from the first light-emitting element and that the emission direction of light from the first light-emitting element and the emission direction of light from the second light-emitting element substantially coincide with each other as viewed from above the base.
    Type: Application
    Filed: August 12, 2009
    Publication date: May 27, 2010
    Inventors: Toshiyuki Fukuda, Mitsuhiro Mishima, Isao Hayami
  • Patent number: 7719119
    Abstract: A semiconductor device has upper electrodes and external terminals which are protruding above the both surfaces of a substrate for semiconductor device and connected to each other by penetrating electrodes, a first insulating film covering at least a metal pattern except for the portions of the first insulating film corresponding to the upper electrodes, a second insulating film covering at least another metal pattern except for the portions of the second insulating film corresponding to the external terminals, and a semiconductor element connected to the upper electrodes and placed on the substrate for semiconductor device. The solder-connected surface of the external terminal is positioned to have a height larger than that of a surface of the second insulating film. The semiconductor element is placed on the first insulating film and covered, together with the upper electrodes, with a mold resin.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: May 18, 2010
    Assignee: Panasonic Corporation
    Inventors: Noriyuki Yoshikawa, Noboru Takeuchi, Kenichi Itou, Toshiyuki Fukuda
  • Publication number: 20100096739
    Abstract: A stacked semiconductor module is made by stacking a second semiconductor device having a second semiconductor chip mounted to the top surface of a second semiconductor substrate above the top surface of a first semiconductor device having a first semiconductor chip mounted to a first semiconductor substrate. The top surface of the first semiconductor substrate is provided with a first connection terminal and the bottom surface of the first semiconductor substrate is provided with an external connection terminal. A region of the bottom surface of the second semiconductor substrate lying opposite to the second semiconductor chip is provided with a second connection terminal. A conductive connecting member connects the first connection terminal to the second connection terminal.
    Type: Application
    Filed: December 22, 2009
    Publication date: April 22, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: TAKESHI KAWABATA, TOSHIYUKI FUKUDA
  • Publication number: 20100091633
    Abstract: A flat pre-board plate including connection electrodes, internal interconnections, and external-connection portions is prepared. This pre-board plate is cut at portions each located between adjacent ones of the connection electrodes, thereby forming trenches. A plurality of semiconductor elements are placed in each of the trenches. Electrode pads and the connection electrodes are connected to each other by metal wires. Transparent lids are placed on, and bonded to, spacers to cover the semiconductor elements. Thereafter, two lines of the connection electrodes arranged between adjacent ones of the trenches are separated from each other. Subsequently, adjacent ones of the semiconductor elements are also separated from each other.
    Type: Application
    Filed: March 10, 2008
    Publication date: April 15, 2010
    Inventors: Junya FuruyashikiI, Syouzou Moribe, Hiroki Utatsu, Noriyuki Yoshikawa, Toshiyuki Fukuda, Masanori Minamio, Hiroyuki Ishida