Patents by Inventor Tzu-Jin Yeh

Tzu-Jin Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10804228
    Abstract: A device includes a semiconductor substrate of a first conductivity type, and a deep well region in the semiconductor substrate, wherein the deep well region is of a second conductivity type opposite to the first conductivity type. The device further includes a well region of the first conductivity type over the deep well region. The semiconductor substrate has a top portion overlying the well region, and a bottom portion underlying the deep well region, wherein the top portion and the bottom portion are of the first conductivity type, and have a high resistivity. A gate dielectric is over the semiconductor substrate. A gate electrode is over the gate dielectric. A source region and a drain region extend into the top portion of the semiconductor substrate. The source region, the drain region, the gate dielectric, and the gate electrode form a Radio Frequency (RF) switch.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: October 13, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Chung Chen, Chi-Feng Huang, Shu Fang Fu, Tzu-Jin Yeh, Chewn-Pu Jou
  • Patent number: 10797655
    Abstract: A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: October 6, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: An-Hsun Lo, Wen-Sheng Chen, En-Hsiang Yeh, Tzu-Jin Yeh
  • Publication number: 20200279808
    Abstract: A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.
    Type: Application
    Filed: May 21, 2020
    Publication date: September 3, 2020
    Inventors: WEN-SHENG CHEN, AN-HSUN LO, EN-HSIANG YEH, TZU-JIN YEH
  • Patent number: 10672704
    Abstract: A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: June 2, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wen-Sheng Chen, An-Hsun Lo, En-Hsiang Yeh, Tzu-Jin Yeh
  • Publication number: 20200169236
    Abstract: A method of detecting a power level of an RF signal includes driving an internal node of a power detection circuit to a DC node voltage level, generating, based on the DC node voltage level, a first component of an output voltage on an output node of the power detection circuit, receiving the RF signal on an input node of the power detection circuit, dividing the RF signal to generate a modulation signal on the internal node, and generating, by at least partially rectifying the modulation signal, a second component of the output voltage on the power detection circuit output node.
    Type: Application
    Filed: January 31, 2020
    Publication date: May 28, 2020
    Inventors: Hong-Lin CHU, Hsieh-Hung HSIEH, Tzu-Jin YEH
  • Publication number: 20200168730
    Abstract: A method of making a semiconductor device includes depositing an isolation region between adjacent fins of a plurality of fins over a substrate, wherein a top-most surface of the isolation region is a first distance from a bottom of the substrate. The method further includes doping each of the plurality of fins with a first dopant having a first dopant type to define a first doped region in each of the plurality of fins, wherein a bottom-most surface of the first doped region is a second distance from the bottom of the substrate, and the second distance is greater than the first distance. The method further includes doping each of the plurality of fins with a second dopant having a second dopant type to define a second doped region in each of the plurality of fins, wherein the second doped region contacts the isolation region.
    Type: Application
    Filed: January 28, 2020
    Publication date: May 28, 2020
    Inventors: Chewn-Pu JOU, Tzu-Jin YEH, Chia-Chung CHEN
  • Publication number: 20200162041
    Abstract: Disclosed is an amplifying circuit and method. In one embodiment, an amplifying circuit, includes: a common-gate (CG) amplifier, wherein the CG amplifier comprises a first transistor, wherein source terminal and body terminal of the first transistor is coupled together through a first resistor.
    Type: Application
    Filed: November 4, 2019
    Publication date: May 21, 2020
    Inventors: Garming LIANG, Simon CHAI, Tzu-Jin YEH, En-Hsiang YEH, Wen-Sheng CHEN
  • Publication number: 20200135730
    Abstract: A method for manufacturing a semiconductor device includes forming one or more fins extending in a first direction over a substrate. The one or more fins include a first region along the first direction and second regions on both sides of the first region along the first direction. A dopant is implanted in the first region of the fins but not in the second regions. A gate structure overlies the first region of the fins and source/drains are formed on the second regions of the fins.
    Type: Application
    Filed: December 31, 2019
    Publication date: April 30, 2020
    Inventors: Chia-Chung CHEN, Chi-Feng HUANG, Victor Chiang LIANG, Fu-Huan TSAI, Hsieh-Hung HSIEH, Tzu-Jin YEH, Han-Min TSAI, Hong-Lin CHU
  • Publication number: 20200067351
    Abstract: A wireless transmitter includes a an amplifier; and a switchable transformer, coupled to the amplifier, wherein the amplifier is configured to be coupled to the switchable transformer in first and second configurations, wherein the first configuration causes the amplifier to provide a first output impedance to the switchable transformer, and wherein the second configuration causes the amplifier to provide a second output impedance to the switchable transformer, the first and second output impedances being different from each other.
    Type: Application
    Filed: October 28, 2019
    Publication date: February 27, 2020
    Inventors: Wen-Sheng Chen, An-Hsun Lo, En-Hsiang Yeh, Tzu-Jin Yeh
  • Patent number: 10554190
    Abstract: A transmitter circuit includes an amplifier configured to output a radio frequency (RF) signal on an output node, a power detection circuit coupled with the output node and configured to generate an output voltage having a first component based on a power level of the RF signal, and a reference voltage generator configured to generate a reference voltage. A comparator is configured to receive the output voltage and the reference voltage, an analog-to-digital converter (ADC) is coupled between the comparator and the amplifier, and the amplifier is configured to adjust the power level of the RF signal responsive to an output of the ADC.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: February 4, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hong-Lin Chu, Hsieh-Hung Hsieh, Tzu-Jin Yeh
  • Patent number: 10553721
    Abstract: A semiconductor device includes a plurality of fins over a substrate. Each fin of the plurality of fins extends in a first direction substantially perpendicular to a bottom surface of the substrate, and each fin of the plurality of fins comprises a first doped region having a first dopant type. The semiconductor device further includes an isolation region over the substrate between a first fin of the plurality of fins and a second fin of the plurality of fins adjacent to the first fin. The semiconductor device further includes a second doped region extends continuously across the isolation region, the second doped region extends into each fin of the plurality of fins, and a dimension of the second doped region in the isolation region in a second direction perpendicular to the first direction is less than a dimension of the at least one isolation region in the second direction.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: February 4, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chewn-Pu Jou, Tzu-Jin Yeh, Chia-Chung Chen
  • Patent number: 10529711
    Abstract: A method for manufacturing a semiconductor device includes forming one or more fins extending in a first direction over a substrate. The one or more fins include a first region along the first direction and second regions on both sides of the first region along the first direction. A dopant is implanted in the first region of the fins but not in the second regions. A gate structure overlies the first region of the fins and source/drains are formed on the second regions of the fins.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: January 7, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Chung Chen, Chi-Feng Huang, Victor Chiang Liang, Fu-Huan Tsai, Hsieh-Hung Hsieh, Tzu-Jin Yeh, Han-Min Tsai, Hong-Lin Chu
  • Publication number: 20200004920
    Abstract: A phase shifter includes an active region, a first and a second set of gates and a set of contacts. The active region extends in a first direction and is located at a first level. The first and second set of gates each extend in a second direction, overlap the active region and are located at a second level. The second set of gates are positioned along opposite edges of the active region, are configured to receive a first voltage, and are part of a first transistor. The first transistor is configured to adjust a first capacitance of the phase shifter responsive to the first voltage. The set of contacts extend in the second direction, are over the active region, are located at a third level, and are positioned between at least the second set of gates.
    Type: Application
    Filed: June 14, 2019
    Publication date: January 2, 2020
    Inventors: Chi-Hsien LIN, Ho-Hsiang CHEN, Hsien-Yuan LIAO, Tzu-Jin YEH, Ying-Ta LU
  • Publication number: 20200007080
    Abstract: A voltage-controlled oscillator (VCO) includes a power supply node configured to have a power supply voltage. A reference node is configured to have a first reference voltage. A transformer-coupled band-pass filter (BPF) is coupled to a cross-coupled pair of transistors. The cross-coupled pair of transistors and the transformer-coupled band-pass filter are positioned between the power supply node and the reference node.
    Type: Application
    Filed: June 5, 2019
    Publication date: January 2, 2020
    Inventors: Chi-Hsien LIN, Ho-Hsiang CHEN, Hsien-Yuan LIAO, Tzu-Jin YEH, Ying-Ta LU
  • Patent number: 10491046
    Abstract: A wireless transmitter includes a an amplifier; and a switchable transformer, coupled to the amplifier, wherein the amplifier is configured to be coupled to the switchable transformer in first and second configurations, wherein the first configuration causes the amplifier to provide a first output impedance to the switchable transformer, and wherein the second configuration causes the amplifier to provide a second output impedance to the switchable transformer, the first and second output impedances being different from each other.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: November 26, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Sheng Chen, An-Hsun Lo, En-Hsiang Yeh, Tzu-Jin Yeh
  • Patent number: 10453809
    Abstract: A device includes a semiconductor substrate of a first conductivity type, and a deep well region in the semiconductor substrate, wherein the deep well region is of a second conductivity type opposite to the first conductivity type. The device further includes a well region of the first conductivity type over the deep well region. The semiconductor substrate has a top portion overlying the well region, and a bottom portion underlying the deep well region, wherein the top portion and the bottom portion are of the first conductivity type, and have a high resistivity. A gate dielectric is over the semiconductor substrate. A gate electrode is over the gate dielectric. A source region and a drain region extend into the top portion of the semiconductor substrate. The source region, the drain region, the gate dielectric, and the gate electrode form a Radio Frequency (RF) switch.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: October 22, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Chung Chen, Chi-Feng Huang, Shu Fang Fu, Tzu-Jin Yeh, Chewn-Pu Jou
  • Publication number: 20190259715
    Abstract: A device includes a semiconductor substrate of a first conductivity type, and a deep well region in the semiconductor substrate, wherein the deep well region is of a second conductivity type opposite to the first conductivity type. The device further includes a well region of the first conductivity type over the deep well region. The semiconductor substrate has a top portion overlying the well region, and a bottom portion underlying the deep well region, wherein the top portion and the bottom portion are of the first conductivity type, and have a high resistivity. A gate dielectric is over the semiconductor substrate. A gate electrode is over the gate dielectric. A source region and a drain region extend into the top portion of the semiconductor substrate. The source region, the drain region, the gate dielectric, and the gate electrode form a Radio Frequency (RF) switch.
    Type: Application
    Filed: May 1, 2019
    Publication date: August 22, 2019
    Inventors: Chia-Chung Chen, Chi-Feng Huang, Shu Fang Fu, Tzu-Jin Yeh, Chewn-Pu Jou
  • Publication number: 20190245084
    Abstract: Semiconductor structures and methods for forming a semiconductor structure are provided. An active semiconductor region is disposed in a substrate. A gate is formed over the substrate. Source and drain regions of a transistor are formed in the active semiconductor region on opposite sides of the gate. The drain region has a first width, and the source region has a second width that is not equal to the first width.
    Type: Application
    Filed: April 16, 2019
    Publication date: August 8, 2019
    Inventors: HSIEN-YUAN LIAO, CHIEN-CHIH HO, CHI-HSIEN LIN, HUA-CHOU TSENG, HO-HSIANG CHEN, RU-GUN LIU, TZU-JIN YEH, YING-TA LU
  • Publication number: 20190164886
    Abstract: A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.
    Type: Application
    Filed: April 27, 2018
    Publication date: May 30, 2019
    Inventors: WEN-SHENG CHEN, AN-HSUN LO, EN-HSIANG YEH, TZU-JIN YEH
  • Patent number: 10277171
    Abstract: An amplifying unit includes a converter and a feedback mechanism. The converter has a supply input coupled to a supply node. The converter further has an input terminal configured to receive an input signal. The converter is configured to amplify the input signal from the input terminal to generate an output signal. The feedback mechanism is coupled to the input terminal of the converter and is configured to cause a constant bias current to flow from the supply node through the converter based on the input signal.
    Type: Grant
    Filed: July 5, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limted
    Inventors: An-Hsun Lo, En-Hsiang Yeh, Tzu-Jin Yeh, Wen-Sheng Chen