Abstract: A substrate centering device for an organic material deposition system comprises: a plurality of substrate support holders configured to be reciprocally movable in a facing direction within an organic material deposition chamber and supporting both side portions of a substrate loaded by a robot; a substrate centering unit configured to be reciprocally movable at each of the substrate support holders and centering the substrate by guiding both side portions of the substrate; and a plurality of substrate clampers configured to be reciprocally movable in a vertical direction at each of the substrate support holders, and clamping the substrate that has been centered by the substrate centering unit.

Abstract: An apparatus for depositing an organic material and a depositing method thereof, wherein a deposition process is performed with respect to a second substrate while transfer and alignment processes are performed with respect to a first substrate in a chamber, so that loss of an organic material wasted in the transfer and alignment processes can be reduced, thereby maximizing material efficiency and minimizing a processing tack time. The apparatus includes a chamber having an interior divided into a first substrate deposition area and a second substrate deposition area, an organic material deposition source transferred to within ones of the first and second substrate deposition areas to spray particles of an organic material onto respective ones of first and second substrates and a first transferring unit to rotate the organic material deposition source in a first direction from one of the first and second substrate deposition areas to an other of the first and second substrate deposition areas.

Abstract: A substrate centering device for an organic material deposition system comprises: a plurality of substrate support holders configured to be reciprocally movable in a facing direction within an organic material deposition chamber and supporting both side portions of a substrate loaded by a robot; a substrate centering unit configured to be reciprocally movable at each of the substrate support holders and centering the substrate by guiding both side portions of the substrate; and a plurality of substrate clampers configured to be reciprocally movable in a vertical direction at each of the substrate support holders, and clamping the substrate that has been centered by the substrate centering unit.

Abstract: A vertical non-volatile memory device is structured/fabricated to include a substrate, groups of memory cell strings each having a plurality of memory transistors distributed vertically so that the memory throughout multiple layers on the substrate, integrated word lines coupled to sets of the memory transistors, respectively, and stacks of word select lines. The memory transistors of each set are those transistors, of one group of the memory cell strings, which are disposed in the same layer above the substrate. The word select lines are respectively connected to the integrated word lines.

Abstract: A semiconductor device includes a semiconductor pattern on a substrate, gate structures on sidewalls of the semiconductor pattern, the gate structures being spaced apart from one another, insulating interlayers among the gate structures, wherein an uppermost insulating interlayer is lower than an upper face of the semiconductor pattern, a common source line contacting the substrate and protruding above the uppermost insulating interlayer, an etch stop layer pattern on the semiconductor pattern and on the common source line wherein the common source line protrudes above the uppermost insulating interlayer, an additional insulating interlayer on the uppermost insulating interlayer, and contact plugs extending through the additional insulating interlayer so as to make contact with the semiconductor pattern and the common source line, respectively.

Abstract: A deposition source capable of uniformly producing a deposition film. The deposition source includes a furnace, a first heating unit surrounding the furnace to heat the furnace and a second heating unit spaced-apart from the first heating unit by an interval and surrounding the furnace to heat the furnace, wherein the second heating unit comprises a plurality of separate sub-heating units that surround the furnace.

Abstract: A substrate centering device for an organic material deposition system comprises: a plurality of substrate support holders configured to be reciprocally movable in a facing direction within an organic material deposition chamber and supporting both side portions of a substrate loaded by a robot; a substrate centering unit configured to be reciprocally movable at each of the substrate support holders and centering the substrate by guiding both side portions of the substrate; and a plurality of substrate clampers configured to be reciprocally movable in a vertical direction at each of the substrate support holders, and clamping the substrate that has been centered by the substrate centering unit.

Abstract: A vertical non-volatile memory device is structured/fabricated to include a substrate, groups of memory cell strings each having a plurality of memory transistors distributed vertically so that the memory throughout multiple layers on the substrate, integrated word lines coupled to sets of the memory transistors, respectively, and stacks of word select lines. The memory transistors of each set are those transistors, of one group of the memory cell strings, which are disposed in the same layer above the substrate. The word select lines are respectively connected to the integrated word lines.

Abstract: A semiconductor device includes a semiconductor substrate including a first region having a cell region and a second region having a peripheral circuit region, first transistors on the semiconductor substrate, a first protective layer covering the first transistors, a first insulation layer on the first protective layer, a semiconductor pattern on the first insulation layer in the first region, second transistors on the semiconductor pattern, a second protective layer covering the second transistors, the second protective layer having a thickness greater than that of the first protective layer, and a second insulation layer on the second protective layer and the first insulation layer of the second region.

Abstract: A non-volatile memory device having a vertical structure includes a NAND string having a vertical structure. The NAND string includes a plurality of memory cells, and at least one pair of first selection transistors arranged to be adjacent to a first end of the plurality of memory cells. A plurality of word lines are coupled to the plurality of memory cells of the NAND string. A first selection line is commonly connected to the at least one pair of first selection transistors of the NAND string.

Abstract: On embodiment of a contact structure may include a lower insulation layer on a lower substrate, an upper substrate on the lower insulation layer, a groove penetrating the upper substrate to extend into the lower insulation layer, the groove below an interface between the upper substrate and the lower insulation layer, an upper insulation layer in the groove, and a contact plug penetrating the upper insulation layer in the groove to extend into the lower insulation layer.

Abstract: A flash memory device having a vertical channel structure. The flash memory device includes a substrate having a surface that extends in a first direction, a channel region having a pillar shape and extending from the substrate in a second direction that is perpendicular to the first direction, a gate dielectric layer formed around the channel region, a memory cell string comprising a plurality of transistors sequentially formed around the channel region in the second direction, wherein the gate dielectric layer is disposed between the plurality of transistors and the channel region, and a bit line connected to one of the plurality of transistors, and surrounding a side wall and an upper surface of one end of the channel region so as to directly contact the channel region.

Abstract: A non-volatile memory device having a vertical structure includes a NAND string having a vertical structure. The NAND string includes a plurality of memory cells, and at least one pair of first selection transistors arranged to be adjacent to a first end of the plurality of memory cells. A plurality of word lines are coupled to the plurality of memory cells of the NAND string. A first selection line is commonly connected to the at least one pair of first selection transistors of the NAND string.

Abstract: A semiconductor device includes a semiconductor pattern on a substrate, gate structures on sidewalls of the semiconductor pattern, the gate structures being spaced apart from one another, insulating interlayers among the gate structures, wherein an uppermost insulating interlayer is lower than an upper face of the semiconductor pattern, a common source line contacting the substrate and protruding above the uppermost insulating interlayer, an etch stop layer pattern on the semiconductor pattern and on the common source line wherein the common source line protrudes above the uppermost insulating interlayer, an additional insulating interlayer on the uppermost insulating interlayer, and contact plugs extending through the additional insulating interlayer so as to make contact with the semiconductor pattern and the common source line, respectively.

Abstract: A semiconductor device includes a semiconductor substrate including a first region having a cell region and a second region having a peripheral circuit region, first transistors on the semiconductor substrate, a first protective layer covering the first transistors, a first insulation layer on the first protective layer, a semiconductor pattern on the first insulation layer in the first region, second transistors on the semiconductor pattern, a second protective layer covering the second transistors, the second protective layer having a thickness greater than that of the first protective layer, and a second insulation layer on the second protective layer and the first insulation layer of the second region.

Abstract: On embodiment of a contact structure may include a lower insulation layer on a lower substrate, an upper substrate on the lower insulation layer, a groove penetrating the upper substrate to extend into the lower insulation layer, the groove below an interface between the upper substrate and the lower insulation layer, an upper insulation layer in the groove, and a contact plug penetrating the upper insulation layer in the groove to extend into the lower insulation layer.

Abstract: A semiconductor device includes a semiconductor substrate including a first region having a cell region and a second region having a peripheral circuit region, first transistors on the semiconductor substrate, a first protective layer covering the first transistors, a first insulation layer on the first protective layer, a semiconductor pattern on the first insulation layer in the first region, second transistors on the semiconductor pattern, a second protective layer covering the second transistors, the second protective layer having a thickness greater than that of the first protective layer, and a second insulation layer on the second protective layer and the first insulation layer of the second region.

Abstract: A memory device having a vertical channel structure is disclosed. The memory device includes a plurality of gate lines extending substantially parallel to one another along a surface of a substrate, and a connection unit electrically connecting the plurality of gate lines. The connection unit includes a first portion laterally extending along the surface of the substrate, a second portion extending substantially perpendicular to the surface of the substrate, and a supporting insulating layer extending in a cavity defined by the first and second portions of the connection unit. Related fabrication methods are also discussed.

Abstract: A substrate centering device for an organic material deposition system comprises: a plurality of substrate support holders configured to be reciprocally movable in a facing direction within an organic material deposition chamber and supporting both side portions of a substrate loaded by a robot; a substrate centering unit configured to be reciprocally movable at each of the substrate support holders and centering the substrate by guiding both side portions of the substrate; and a plurality of substrate clampers configured to be reciprocally movable in a vertical direction at each of the substrate support holders, and clamping the substrate that has been centered by the substrate centering unit.

Abstract: A flash memory device having a vertical channel structure. The flash memory device includes a substrate having a surface that extends in a first direction, a channel region having a pillar shape and extending from the substrate in a second direction that is perpendicular to the first direction, a gate dielectric layer formed around the channel region, a memory cell string comprising a plurality of transistors sequentially formed around the channel region in the second direction, wherein the gate dielectric layer is disposed between the plurality of transistors and the channel region, and a bit line connected to one of the plurality of transistors, and surrounding a side wall and an upper surface of one end of the channel region so as to directly contact the channel region.