Abstract: The embodiments of the disclosure provide a method and device for video preview. The method includes: with the determination of a need to enter a video preview interface, obtaining a respective preview control corresponding to at least one playback position for playing a preview video in a video preview interface; loading video data of respective one way of preview video corresponding to each of the preview controls; and playing the video data of the respective one way of preview video in each of preview controls. The embodiments of the disclosure can reflect preview video contents accurately in real time, allowing the user to rapidly and accurately find the desirable video, improving the user experience. The video preview manner may have enhanced universality, especially applicable to the preview of the videos having varied contents in real time such as live broadcast and carousel.

Abstract: The embodiments of the present invention provide a method and a device for previewing and displaying multimedia streaming data, wherein the method includes: when a terminal displays a designated interface, determining a thumbnail display area corresponding to at least one previewing and playing area preset in the designated interface, acquiring multimedia streaming data corresponding to the previewing and playing area, loading a floating layer playing control in the previewing and playing area, and previewing and playing the multimedia streaming data.

Abstract: The present invention provides a method and a device for previewing video files. The method includes: receiving a video file previewing instruction; determining a given dynamic previewing area in response to the instruction; acquiring information of a first video file currently mapped by the dynamic previewing area from a source code of an interface to be displayed; and requesting to acquire the first video file from a resource server, and playing the first video file acquired in the dynamic previewing area when displaying the interface to be displayed.

Abstract: The embodiments of the disclosure provide a method and device for switching channel. The method comprises: when a first touch gesture for a first channel is detected, loading a first channel display window; displaying channel information of the first channel on the first channel display window; according to a detected second touch gesture, moving at least a portion of channel information of the first channel out of and moving at least a portion of channel information of a second channel into the first channel display window; and when the moved-out channel information of the first channel or the moved-in channel information of the second channel satisfies a predefined switching condition, playing back video data of the second channel. The displaying of channel information informs user of the channel which can be triggered by the touch gesture, and the switching of channel information informs user of the timing of channel switch.

Abstract: The embodiments of the disclosure provide a method and device for switching channel. Method includes: when a first touch gesture for a first channel is detected, loading at least one channel display window after an enlargement processing; displaying channel information of the first channel on the channel display window of a display interface; when a second touch gesture is detected, moving the channel information displayed on channel display windows based on a direction of the second touch gesture; and when the channel information of the second channel is displayed on the channel display window of the display interface, playing back video data of the second channel. In the embodiments of the disclosure, the displaying of channel information informs user of the channel which can be triggered by the touch gesture, and the switching of channel information informs user of the timing of channel switch.

Abstract: Semiconductor devices includes a thin epitaxial layer (nanotube) formed on sidewalls of mesas formed in a semiconductor layer. In one embodiment, a semiconductor device includes a first epitaxial layer and a second epitaxial layer formed on mesas of the semiconductor layer. The thicknesses and doping concentrations of the first and second epitaxial layers and the mesa are selected to achieve charge balance in operation. In another embodiment, the semiconductor body is lightly doped and the thicknesses and doping concentrations of the first and second epitaxial layers are selected to achieve charge balance in operation.

Abstract: A semiconductor power device comprises a plurality of power transistor cells each having a trenched gate disposed in a gate trench wherein the trenched gate comprising a shielding bottom electrode disposed in a bottom portion of the gate trench electrically insulated from a top gate electrode disposed in a top portion of the gate trench by an inter-electrode insulation layer. At least one of the transistor cells includes the shielding bottom electrode functioning as a source-connecting shielding bottom electrode electrically connected to a source electrode of the semiconductor power device and at least one of the transistor cells having the shielding bottom electrode functioning as a gate-connecting shielding bottom electrode electrically connected to a gate metal of the semiconductor power device.

Abstract: Semiconductor devices includes a thin epitaxial layer (nanotube) formed on sidewalls of mesas formed in a semiconductor layer. In one embodiment, a semiconductor device includes a first epitaxial layer and a second epitaxial layer formed on mesas of the semiconductor layer. The thicknesses and doping concentrations of the first and second epitaxial layers and the mesa are selected to achieve charge balance in operation. In another embodiment, the semiconductor body is lightly doped and the thicknesses and doping concentrations of the first and second epitaxial layers are selected to achieve charge balance in operation.

Abstract: The present disclosure discloses a method for indicating port states and a switch. A main panel of the switch is provided with port indicators one-to-one corresponding to physical ports and N channel indicators. The switch further includes a main chip and a control component. The control component is configured to: receive a port state indication signal from the main chip, and parse the port state indication signal to obtain usage state information of each logical port; generate N enable signals, and control at most one enable signal to be valid at any time point; and control the states of the N channel indicators by using the N enable signals sent from the enable signal controlling module, and control the state of each port indicator according to the N enable signals and the usage state information of each logical port.

Abstract: The present invention is directed to a magnetic random access memory comprising a first magnetic tunnel junction (MTJ) including a first magnetic reference layer and a first magnetic free layer with a first insulating tunnel junction layer interposed therebetween; a second MTJ including a second magnetic reference layer and a second magnetic free layer with a second insulating tunnel junction layer interposed therebetween; and an anti-ferromagnetic coupling layer formed between the first and second variable magnetic free layers. The first and second magnetic free layers have a first and second magnetization directions, respectively, that are perpendicular to the layer planes thereof. The first magnetic reference layer has a first pseudo-fixed magnetization direction substantially perpendicular to the layer plane thereof.

Abstract: A method of manufacturing a trench power MOSFET device with improved UIS performance and a high avalanche breakdown voltage is disclosed. The method includes performing a first etching of the epitaxial layer to form an active trench with an initial depth in an active area of the semiconductor substrate and a termination trench with a desired depth in a termination area of the semiconductor substrate, wherein the initial depth of the active trench is smaller than the desired depth of the termination trench and performing a second etching to increase the depth of the active trench to a desired depth wherein a depth difference between the desired depth of the active trench and the desired depth of the termination trench is smaller than a depth difference between the initial depth of the active trench and the desired depth of the termination trench.

Abstract: A method for checking sets of components of a vehicle includes configuring a system control unit of a vehicle to perform a check of a first set of components and a second set of components of the vehicle, the first set of components being different from the second set of components. The first set of components is automatically checked using the system control unit. The second set of components is optionally checked using the system control unit, wherein the control unit is configured to disable the check of the second set of components based upon a disable command provided to the control system. Further, a system for verifying different sets of components and a further method for checking sets of components of a vehicle are described.

Abstract: The present invention is directed to an MTJ memory element including a magnetic free layer structure which comprises one or more magnetic free layers that have a same variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a magnetic reference layer structure comprising a first magnetic reference layer formed adjacent to the insulating tunnel junction layer and a second magnetic reference layer separated therefrom by a perpendicular enhancement layer with the first and second magnetic reference layers having a first fixed magnetization direction substantially perpendicular to layer planes thereof; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer opposite the perpendicular enhancement layer; and a magnetic fixed layer comprising first and second magnetic fixed sublayers with the second magnetic fixed sublayer formed adjacent to the anti-ferromagnetic

Abstract: A semiconductor device may have an active device region containing a plurality of active devices and a termination structure that surrounds the active device region. The termination structure includes a first conductive region that surrounds the active device region, an insulator region that surrounds the first conductive region, and a second conductive region that surrounds the first conductive region and the insulator region. The active device region and termination structure are formed into a semiconductor material of a first conductivity type. The first conductive region is electrically connected to a gate metal and the second conductive region is connected to a drain metal.

Abstract: Semiconductor devices includes a thin epitaxial layer (nanotube) formed on sidewalls of mesas formed in a semiconductor layer. In one embodiment, a semiconductor device includes a first epitaxial layer and a second epitaxial layer formed on mesas of the semiconductor layer. The thicknesses and doping concentrations of the first and second epitaxial layers and the mesa are selected to achieve charge balance in operation. In another embodiment, the semiconductor body is lightly doped and the thicknesses and doping concentrations of the first and second epitaxial layers are selected to achieve charge balance in operation.

Abstract: Semiconductor devices includes a thin epitaxial layer (nanotube) formed on sidewalls of mesas formed in a semiconductor layer. In one embodiment, a semiconductor device includes a first epitaxial layer and a second epitaxial layer formed on mesas of the semiconductor layer. The thicknesses and doping concentrations of the first and second epitaxial layers and the mesa are selected to achieve charge balance in operation. In another embodiment, the semiconductor body is lightly doped and the thicknesses and doping concentrations of the first and second epitaxial layers are selected to achieve charge balance in operation.

Abstract: The present invention is directed to an MTJ memory element including a magnetic free layer structure which comprises one or more magnetic free layers that have a same variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a magnetic reference layer structure comprising a first magnetic reference layer formed adjacent to the insulating tunnel junction layer and a second magnetic reference layer separated therefrom by a perpendicular enhancement layer with the first and second magnetic reference layers having a first fixed magnetization direction substantially perpendicular to layer planes thereof; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer opposite the perpendicular enhancement layer; and a magnetic fixed layer comprising first and second magnetic fixed sublayers with the second magnetic fixed sublayer formed adjacent to the anti-ferromagnetic

Abstract: A semiconductor device formed on a semiconductor substrate, comprising: an epitaxial layer overlaying the semiconductor substrate; a drain formed on back of the semiconductor substrate; a drain region that extends into the epitaxial layer; an active region; and an island region under the contact trench and disconnected from the body, the island region having an opposite polarity as the epitaxial layer. The active region comprises: a body disposed in the epitaxial layer; a source embedded in the body; a gate trench extending into the epitaxial layer; a gate disposed in the gate trench; an active region contact trench extending through the source and the body; and an active region contact electrode disposed within the active region contact trench.

Abstract: The present invention is directed to a spin-orbitronics device including a magnetic comparison layer structure having a pseudo-invariable magnetization direction; a magnetic free layer structure whose variable magnetization direction can be switched by a switching current passing between the magnetic comparison layer structure and the magnetic free layer structure; an insulating tunnel junction layer interposed between the magnetic comparison layer structure and the magnetic free layer structure; and a non-magnetic transverse polarizing layer formed adjacent to the magnetic comparison layer structure. The pseudo-invariable magnetization direction of the magnetic comparison layer structure may be switched by passing a comparison current through the transverse polarizing layer along a direction that is substantially parallel to a layer plane of the transverse polarizing layer. The pseudo-invariable magnetization direction of the magnetic comparison layer structure is not switched by the switching current.

Abstract: An electric drive system for a vehicle includes a first generator in communication with a first engine, a second generator in communication with a second engine, a first rectifier and a second rectifier. Each generator has a main winding, each main winding being independently excitable and generating an alternating current (AC) output. A main AC output of the main winding of the first generator is in communication with the first rectifier, and a main AC output of the main winding of the second generator is in communication with the second rectifier. When in drive mode, the first engine drives the first generator and the second engine drives the second generator, and the first and second generators supply power to a plurality of inverters coupled to the first and second rectifiers, the plurality of inverts supplying power to a plurality of electric wheel motors.