Patents by Inventor Yasuhisa Yamamoto

Yasuhisa Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11227862
    Abstract: An amplifier circuit including a semiconductor element is formed on a substrate. A protection circuit is formed including a plurality of protection diodes that are formed on the substrate and that are connected in series with each other, the protection circuit being connected to an output terminal of the amplifier circuit. A pad conductive layer is formed that at least partially includes a pad for connecting to a circuit outside the substrate. An insulating protective film covers the pad conductive layer. The insulating protective film includes an opening that exposes a partial area of a surface of the pad conductive layer, and that covers another area. A first bump is formed on the pad conductive layer on a bottom surface of the opening, and a second bump at least partially overlaps the protection circuit in plan view and is connected to a ground (GND) potential connected to the amplifier circuit.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: January 18, 2022
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenji Sasaki, Takayuki Tsutsui, Isao Obu, Yasuhisa Yamamoto
  • Publication number: 20210391640
    Abstract: A communication device includes: a first body including a first display portion; a second body including a second display portion; a communication circuit that carries out millimeter-wave band communication; and one or more millimeter-wave band communication antennas provided in at least one of the first body and the second body.
    Type: Application
    Filed: August 26, 2021
    Publication date: December 16, 2021
    Inventors: Ryuken MIZUNUMA, Satoshi TANAKA, Yasuhisa YAMAMOTO, Akiko ITABASHI
  • Publication number: 20210359758
    Abstract: A communication network system is a communication network system that distributes information to a plurality of terminals inside a closed space. The communication network system includes a network server and a plurality of lighting fixtures each having an antenna that transmits and receives millimeter-wave-band communication signals to and from the terminals.
    Type: Application
    Filed: May 11, 2021
    Publication date: November 18, 2021
    Inventors: Ryuken MIZUNUMA, Satoshi TANAKA, Yasuhisa YAMAMOTO, Akiko ITABASHI
  • Publication number: 20210328562
    Abstract: A power amplifier circuit includes a power amplifier, first and second filters, and first and second output paths. The power amplifier is able to amplify both of a first signal and a second signal. The frequency of the second signal is higher than that of the first signal. The first filter includes a first inductor and attenuates the second signal amplified in the power amplifier. The first inductor serves as a path for the first signal amplified in the power amplifier. The second filter includes a first capacitor and attenuates the first signal amplified in the power amplifier. The first capacitor serves as a path for the second signal amplified in the power amplifier. The first signal outputted from the first filter is supplied to the first output path. The second signal outputted from the second filter is supplied to the second output path.
    Type: Application
    Filed: July 1, 2021
    Publication date: October 21, 2021
    Inventors: Shota ISHIHARA, Hiroshi OKABE, Yasuhisa YAMAMOTO
  • Patent number: 11133574
    Abstract: A communication device includes: a first body including a first display portion; a second body including a second display portion; a communication circuit that carries out millimeter-wave band communication; and one or more millimeter-wave band communication antennas provided in at least one of the first body and the second body.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: September 28, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Ryuken Mizunuma, Satoshi Tanaka, Yasuhisa Yamamoto, Akiko Itabashi
  • Publication number: 20210281226
    Abstract: A power amplifier module includes a substrate, an amplifier circuit including a plurality of transistors to be mounted on the substrate and a bump connected to the plurality of transistors, a harmonic termination circuit and an output matching circuit that are disposed in or on the substrate and configured to be electrically connected to the amplifier circuit, a connection pad disposed on the substrate and configured to be connected to the bump, and a plurality of connection wiring lines branching from the connection pad. The plurality of connection wiring lines include at least a first connection wiring line that connects the connection pad and the harmonic termination circuit to each other, a second connection wiring line that connects the connection pad and the output matching circuit to each other, and a third connection wiring line that connects the connection pad and an external power supply to each other.
    Type: Application
    Filed: March 5, 2021
    Publication date: September 9, 2021
    Inventors: Takashi YAMADA, Satoshi TANAKA, Yasuhisa YAMAMOTO
  • Patent number: 11088663
    Abstract: A power amplifier circuit includes a power amplifier, first and second filters, and first and second output paths. The power amplifier is able to amplify both of a first signal and a second signal. The frequency of the second signal is higher than that of the first signal. The first filter includes a first inductor and attenuates the second signal amplified in the power amplifier. The first inductor serves as a path for the first signal amplified in the power amplifier. The second filter includes a first capacitor and attenuates the first signal amplified in the power amplifier. The first capacitor serves as a path for the second signal amplified in the power amplifier. The first signal outputted from the first filter is supplied to the first output path. The second signal outputted from the second filter is supplied to the second output path.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: August 10, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shota Ishihara, Hiroshi Okabe, Yasuhisa Yamamoto
  • Publication number: 20210219147
    Abstract: A communication terminal device is a glasses-type communication terminal device having an optically transmissive display mounted thereon. The communication terminal device includes first and second radio-frequency modules that perform radio-frequency signal processing and a baseband module that is connected to the first and second radio-frequency modules via communication lines so as to be communicable and that performs baseband signal processing. The first and second radio-frequency modules are selectively switched by the baseband module to perform a reception operation. When the first radio-frequency module performs the reception operation, a reception signal received by the first radio-frequency module is retransmitted from the second radio-frequency module.
    Type: Application
    Filed: January 6, 2021
    Publication date: July 15, 2021
    Inventors: Ryuken Mizunuma, Satoshi Tanaka, Yasuhisa Yamamoto, Akiko Itabashi
  • Publication number: 20210211106
    Abstract: Provided is a power amplification module that includes: a first transistor, a first signal being inputted to a base thereof; a second transistor, the first signal being inputted to a base thereof and a collector thereof being connected to a collector of the first transistor; a first resistor, a first bias current being supplied to one end thereof and another end thereof being connected to the base of the first transistor; a second resistor, one end thereof being connected to the one end of the first resistor and another end thereof being connected to the base of the second transistor; and a third resistor, a second bias current being supplied to one end thereof and another end thereof being connected to the base of the second transistor.
    Type: Application
    Filed: March 24, 2021
    Publication date: July 8, 2021
    Inventors: Satoshi ARAYASHIKI, Satoshi GOTO, Satoshi TANAKA, Yasuhisa YAMAMOTO
  • Publication number: 20210203289
    Abstract: A power amplifier circuit has an input node from which an input signal, which is a high-frequency signal, is inputted and an output node to which the input signal is amplified by a differential amplifier circuit to be outputted as an output signal. The power amplifier circuit includes a balun transformer (second balun transformer) including an input-side winding that has a substantially center to which a power-supply voltage is supplied and that is connected between differential outputs of the differential amplifier circuit, and an output-side winding that is coupled to the input-side winding via an electromagnetic field and that has one end connected to a reference potential; and a capacitive element (capacitor) provided between another end (node) of the output-side winding and the output node.
    Type: Application
    Filed: December 21, 2020
    Publication date: July 1, 2021
    Inventors: Yuri HONDA, Satoshi TANAKA, Yasuhisa YAMAMOTO, Hiroki SHONAI
  • Patent number: 11031910
    Abstract: A power amplifier module includes a power amplifier circuit and a control IC. The power amplifier circuit includes a bipolar transistor that amplifies power of an RF signal and outputs an amplified signal. The control IC includes an FET, which serves as a bias circuit that supplies a bias signal to the bipolar transistor. The FET is operable at a threshold voltage lower than that of the bipolar transistor, thereby making it possible to decrease the operating voltage of the power amplifier module.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: June 8, 2021
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Shota Ishihara, Yasuhisa Yamamoto
  • Publication number: 20210125982
    Abstract: On a single-crystal semiconductor substrate with an upper surface including a first direction in which an inverted mesa step extends and a second direction in which a forward mesa step extends in response to anisotropic etching in which an etching rate depends on crystal plane orientation, a bipolar transistor including a collector layer, a base layer, and an emitter layer that are epitaxially grown, and a base wire connected to the base layer are arranged. A step is provided at an edge of the base layer, and the base wire is extended from inside to outside of the base layer in a direction intersecting the first direction in a plan view. An intersection of the edge of the base layer and the base wire has a disconnection prevention structure that makes it difficult for step-caused disconnection of the base wire to occur.
    Type: Application
    Filed: January 6, 2021
    Publication date: April 29, 2021
    Inventors: Kenji SASAKI, Yasuhisa YAMAMOTO
  • Patent number: 10985712
    Abstract: Provided is a power amplification module that includes: a first transistor, a first signal being inputted to a base thereof; a second transistor, the first signal being inputted to a base thereof and a collector thereof being connected to a collector of the first transistor; a first resistor, a first bias current being supplied to one end thereof and another end thereof being connected to the base of the first transistor; a second resistor, one end thereof being connected to the one end of the first resistor and another end thereof being connected to the base of the second transistor; and a third resistor, a second bias current being supplied to one end thereof and another end thereof being connected to the base of the second transistor.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: April 20, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Arayashiki, Satoshi Goto, Satoshi Tanaka, Yasuhisa Yamamoto
  • Publication number: 20210105030
    Abstract: A feed line connects an RFIC and a radiating element. A baseband ground plane (BB ground) is connected to a ground terminal of a BBIC. A radio frequency ground plane (RF ground) is placed in such a manner as to overlap the BB ground. The RF ground serves as a return path of the feed line. A first inter-ground connection circuit connects the BB ground and the RF ground. Furthermore, a second inter-ground connection circuit connects the BB ground and the RF ground. Connecting parts between these grounds and the second inter-ground connection circuit are arranged closer to the edges of these grounds than connecting parts between these grounds and the first inter-ground connection circuit. The connecting part between the ground and the second inter-ground connection circuit is placed on one side of a certain imaginary straight line that passes substantially the geometric center of the ground.
    Type: Application
    Filed: September 25, 2020
    Publication date: April 8, 2021
    Inventors: Kazunari KAWAHATA, Ryuken MIZUNUMA, Hideki UEDA, Satoshi TANAKA, Masashi OMURO, Yasuhisa YAMAMOTO
  • Patent number: 10965325
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: March 30, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Tetsuaki Adachi, Masahito Numanami, Yasuhisa Yamamoto
  • Patent number: 10957617
    Abstract: A semiconductor chip includes an active element on a first surface of a substrate. A heat-conductive film having a higher thermal conductivity than the substrate is disposed at a position different from a position of the active element. An insulating film covering the active element and heat-conductive film is disposed on the first surface. A bump electrically connected to the heat-conductive film is disposed on the insulating film. A via-hole extends from a second surface opposite to the first surface to the heat-conductive film. A heat-conductive member having a higher thermal conductivity than the substrate is continuously disposed from a region of the second surface overlapping the active element in plan view to an inner surface of the via-hole. The bump is connected to a land of a printed circuit board facing the first surface. The semiconductor chip is sealed with a resin.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: March 23, 2021
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masao Kondo, Isao Obu, Yasunari Umemoto, Yasuhisa Yamamoto, Masahiro Shibata, Takayuki Tsutsui
  • Publication number: 20210075495
    Abstract: A communication terminal capable of at least millimeter-wave communication and microwave communication is provided. The communication terminal includes a repeater that relays communication between a first communication terminal and a second communication terminal by using millimeter-wave communication. Such a communication terminal is capable of maintaining good millimeter-wave communication between terminals.
    Type: Application
    Filed: September 2, 2020
    Publication date: March 11, 2021
    Inventors: Ryuken MIZUNUMA, Satoshi TANAKA, Yasuhisa YAMAMOTO, Akiko ITABASHI
  • Patent number: 10944438
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: March 9, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Tetsuaki Adachi, Masahito Numanami, Yasuhisa Yamamoto
  • Publication number: 20210044263
    Abstract: A power amplifier circuit amplifies a radio-frequency signal in a transmit frequency band. The power amplifier circuit includes an amplifier, a bias circuit, and an impedance circuit. The amplifier amplifies power of a radio-frequency signal and outputs an amplified signal. The impedance circuit is connected between a signal input terminal of the amplifier and a bias-current output terminal of the bias circuit and has frequency characteristics in which attenuation is obtained in the transmit frequency band. The impedance circuit includes first and second impedance circuits. The first impedance circuit is connected to the signal input terminal. The second impedance circuit is connected between the first impedance circuit and the bias-current output terminal.
    Type: Application
    Filed: October 28, 2020
    Publication date: February 11, 2021
    Inventors: Takayuki TSUTSUI, Satoshi TANAKA, Yasuhisa YAMAMOTO
  • Patent number: 10910484
    Abstract: On a single-crystal semiconductor substrate with an upper surface including a first direction in which an inverted mesa step extends and a second direction in which a forward mesa step extends in response to anisotropic etching in which an etching rate depends on crystal plane orientation, a bipolar transistor including a collector layer, a base layer, and an emitter layer that are epitaxially grown, and a base wire connected to the base layer are arranged. A step is provided at an edge of the base layer, and the base wire is extended from inside to outside of the base layer in a direction intersecting the first direction in a plan view. An intersection of the edge of the base layer and the base wire has a disconnection prevention structure that makes it difficult for step-caused disconnection of the base wire to occur.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: February 2, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kenji Sasaki, Yasuhisa Yamamoto