Patents by Inventor Yasuhisa Yamamoto

Yasuhisa Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190199302
    Abstract: A power amplifier circuit amplifies a radio-frequency signal in a transmit frequency band. The power amplifier circuit includes an amplifier, a bias circuit, and an impedance circuit. The amplifier amplifies power of a radio-frequency signal and outputs an amplified signal. The impedance circuit is connected between a signal input terminal of the amplifier and a bias-current output terminal of the bias circuit and has frequency characteristics in which attenuation is obtained in the transmit frequency band. The impedance circuit includes first and second impedance circuits. The first impedance circuit is connected to the signal input terminal. The second impedance circuit is connected between the first impedance circuit and the bias-current output terminal.
    Type: Application
    Filed: December 20, 2018
    Publication date: June 27, 2019
    Inventors: Takayuki TSUTSUI, Satoshi TANAKA, Yasuhisa YAMAMOTO
  • Publication number: 20190190455
    Abstract: A transmission unit includes a first transistor that amplifies power of a first signal and outputs a second signal, a power supply circuit that supplies to the first transistor a power supply voltage that changes in accordance with an amplitude level of the first signal, and an attenuator that attenuates the first signal in such a manner that an amount of attenuation of the first signal increases with a decrease in the power supply voltage when the power supply voltage is less than a first level.
    Type: Application
    Filed: December 18, 2018
    Publication date: June 20, 2019
    Inventors: Masao KONDO, Satoshi TANAKA, Yasuhisa YAMAMOTO, Takayuki TSUTSUI, Isao OBU
  • Publication number: 20190190546
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Application
    Filed: February 26, 2019
    Publication date: June 20, 2019
    Inventors: Satoshi TANAKA, Kazuo WATANABE, Tetsuaki ADACHI, Masahito NUMANAMI, Yasuhisa YAMAMOTO
  • Publication number: 20190190476
    Abstract: A power amplifier circuit includes a first transistor amplifying a first signal; a second transistor amplifying a second signal; a bias circuit supplying a bias current or voltage to a base or gate of the second transistor; and an attenuator attenuating the first or second signal in accordance with a control voltage supplied from the bias circuit. The attenuator includes a first diode to which the control voltage is supplied, a third transistor including a collector connected to a supply path of the first or second signal, an emitter connected to a ground, and a base to which the control voltage is supplied from the first diode, and a capacitor connected in parallel with the first diode. The control voltage decreases as a second signal power level increases. The third transistor allows part of the first or second signal to pass to the emitter in accordance with the control voltage.
    Type: Application
    Filed: December 18, 2018
    Publication date: June 20, 2019
    Inventors: Masao KONDO, Satoshi TANAKA, Yasuhisa YAMAMOTO, Takayuki TSUTSUI, Isao OBU
  • Publication number: 20190190547
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Application
    Filed: February 26, 2019
    Publication date: June 20, 2019
    Inventors: Satoshi TANAKA, Kazuo WATANABE, Tetsuaki ADACHI, Masahito NUMANAMI, Yasuhisa YAMAMOTO
  • Publication number: 20190149701
    Abstract: A reading apparatus includes: a reading section configured to generate a first image being a read image of a first face of a document sheet and a second image being a read image of a second face of the document sheet; if there is a brightness change area including a bright part having a brightness change in a convex state and a dark part being in contact with the bright part and having a brightness change in a concave state at an identical position on both of the images, an identification section configured to identify the brightness change area as a wrinkle area; and an output section configured to output the first image having been subjected to image processing of the identified wrinkle area.
    Type: Application
    Filed: November 8, 2018
    Publication date: May 16, 2019
    Inventor: Yasuhisa YAMAMOTO
  • Patent number: 10291182
    Abstract: A power amplifier module includes a power amplifier circuit and a control IC. The power amplifier circuit includes a bipolar transistor that amplifies power of an RF signal and outputs an amplified signal. The control IC includes an FET, which serves as a bias circuit that supplies a bias signal to the bipolar transistor. The FET is operable at a threshold voltage lower than that of the bipolar transistor, thereby making it possible to decrease the operating voltage of the power amplifier module.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: May 14, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shota Ishihara, Yasuhisa Yamamoto
  • Publication number: 20190131941
    Abstract: A power amplifier circuit includes a power amplifier, first and second filters, and first and second output paths. The power amplifier is able to amplify both of a first signal and a second signal. The frequency of the second signal is higher than that of the first signal. The first filter includes a first inductor and attenuates the second signal amplified in the power amplifier. The first inductor serves as a path for the first signal amplified in the power amplifier. The second filter includes a first capacitor and attenuates the first signal amplified in the power amplifier. The first capacitor serves as a path for the second signal amplified in the power amplifier. The first signal outputted from the first filter is supplied to the first output path. The second signal outputted from the second filter is supplied to the second output path.
    Type: Application
    Filed: October 24, 2018
    Publication date: May 2, 2019
    Inventors: Shota ISHIHARA, Hiroshi OKABE, Yasuhisa YAMAMOTO
  • Publication number: 20190123441
    Abstract: A multi-antenna module includes, on or in the dielectric substrate, a first radiation element, a second radiation element that operates at a frequency band lower than that of the first radiation element, and a ground plane. A first feed line and a second feed line are provided on or in the dielectric substrate. A first switch element switches between a first state in which a signal is supplied to the second radiation element and a second state including at least one of a state in which the second radiation element is connected to the ground plane with terminal impedance interposed therebetween, a state in which the second radiation element is in a floating state with respect to the second feed line and the ground plane, and a state in which the second radiation element is short-circuited to the ground plane.
    Type: Application
    Filed: July 18, 2018
    Publication date: April 25, 2019
    Inventors: Kaoru SUDO, Yasuhisa YAMAMOTO, Satoshi TANAKA
  • Publication number: 20190115338
    Abstract: An amplifier circuit including a semiconductor element is formed on a substrate. A protection circuit formed on the substrate includes a plurality of protection diodes that are connected in series with each other, and the protection circuit is connected to an output terminal of the amplifier circuit. A pad conductive layer at least partially includes a pad for connecting to a circuit outside the substrate. The pad conductive layer and the protection circuit at least partially overlap each other in plan view.
    Type: Application
    Filed: December 13, 2018
    Publication date: April 18, 2019
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Kenji SASAKI, Takayuki TSUTSUI, Isao OBU, Yasuhisa YAMAMOTO
  • Patent number: 10256848
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: April 9, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Tetsuaki Adachi, Masahito Numanami, Yasuhisa Yamamoto
  • Patent number: 10256849
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: April 9, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Tetsuaki Adachi, Masahito Numanami, Yasuhisa Yamamoto
  • Publication number: 20190103841
    Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
    Type: Application
    Filed: November 30, 2018
    Publication date: April 4, 2019
    Inventors: Satoshi TANAKA, Tetsuaki ADACHI, Kazuo WATANABE, Masahito NUMANAMI, Yasuhisa YAMAMOTO
  • Publication number: 20190058054
    Abstract: On a single-crystal semiconductor substrate with an upper surface including a first direction in which an inverted mesa step extends and a second direction in which a forward mesa step extends in response to anisotropic etching in which an etching rate depends on crystal plane orientation, a bipolar transistor including a collector layer, a base layer, and an emitter layer that are epitaxially grown, and a base wire connected to the base layer are arranged. A step is provided at an edge of the base layer, and the base wire is extended from inside to outside of the base layer in a direction intersecting the first direction in a plan view. An intersection of the edge of the base layer and the base wire has a disconnection prevention structure that makes it difficult for step-caused disconnection of the base wire to occur.
    Type: Application
    Filed: August 8, 2018
    Publication date: February 21, 2019
    Inventors: Kenji SASAKI, Yasuhisa Yamamoto
  • Patent number: 10192862
    Abstract: An amplifier circuit including a semiconductor element is formed on a substrate. A protection circuit formed on the substrate includes a plurality of protection diodes that are connected in series with each other, and the protection circuit is connected to an output terminal of the amplifier circuit. A pad conductive layer at least partially includes a pad for connecting to a circuit outside the substrate. The pad conductive layer and the protection circuit at least partially overlap each other in plan view.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: January 29, 2019
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenji Sasaki, Takayuki Tsutsui, Isao Obu, Yasuhisa Yamamoto
  • Patent number: 10171036
    Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: January 1, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Tetsuaki Adachi, Kazuo Watanabe, Masahito Numanami, Yasuhisa Yamamoto
  • Publication number: 20180247926
    Abstract: An amplifier circuit including a semiconductor element is formed on a substrate. A protection circuit formed on the substrate includes a plurality of protection diodes that are connected in series with each other, and the protection circuit is connected to an output terminal of the amplifier circuit. A pad conductive layer at least partially includes a pad for connecting to a circuit outside the substrate. The pad conductive layer and the protection circuit at least partially overlap each other in plan view.
    Type: Application
    Filed: February 22, 2018
    Publication date: August 30, 2018
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Kenji SASAKI, Takayuki TSUTSUI, Isao OBU, Yasuhisa YAMAMOTO
  • Publication number: 20180241349
    Abstract: A power amplifier module includes a power amplifier circuit and a control IC. The power amplifier circuit includes a bipolar transistor that amplifies power of an RF signal and outputs an amplified signal. The control IC includes an FET, which serves as a bias circuit that supplies a bias signal to the bipolar transistor. The FET is operable at a threshold voltage lower than that of the bipolar transistor, thereby making it possible to decrease the operating voltage of the power amplifier module.
    Type: Application
    Filed: February 14, 2018
    Publication date: August 23, 2018
    Inventors: Shota ISHIHARA, Yasuhisa YAMAMOTO
  • Publication number: 20180062579
    Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
    Type: Application
    Filed: July 21, 2017
    Publication date: March 1, 2018
    Inventors: Satoshi Tanaka, Tetsuaki Adachi, Kazuo Watanabe, Masahito Numanami, Yasuhisa Yamamoto
  • Publication number: 20180006608
    Abstract: Provided is a bias circuit that supplies a first bias current or voltage to an amplifier that amplifies a radio frequency signal. The bias circuit includes: an FET that has a power supply voltage supplied to a drain thereof and that outputs the first bias current or voltage from a source thereof; a first bipolar transistor that has a collector thereof connected to a gate of the FET, that has a base thereof connected to the source of the FET, that has a common emitter and that has a constant current supplied to the collector thereof; and a first capacitor that has one end thereof connected to the collector of the first bipolar transistor and that suppresses variations in a collector voltage of the first bipolar transistor.
    Type: Application
    Filed: April 6, 2017
    Publication date: January 4, 2018
    Inventors: Satoshi TANAKA, Tetsuaki ADACHI, Kazuo WATANABE, Masahito NUMANAMI, Yasuhisa YAMAMOTO