Patents by Inventor Yasuyuki Kimura
Yasuyuki Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8600079Abstract: The invention provides an amplifier circuit of a capacitor microphone of which the noise resistance against noise of a supply voltage is enhanced. In an amplifier circuit of a capacitor microphone of the invention, while a noise component of a supply voltage is applied to one inversion input terminal of an operational amplifier of an amplification portion through a parasitic capacitor existing between an external power supply wiring and an external wiring that are adjacent to each other, the problem noise component of the supply voltage is applied to the other non-inversion input terminal by capacitive coupling to an internal power supply wiring. Therefore, the noise component is cancelled at the operational amplifier.Type: GrantFiled: April 2, 2010Date of Patent: December 3, 2013Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLCInventors: Yasuyuki Kimura, Masahito Kanaya, Takashi Tokano
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Publication number: 20130277701Abstract: A package for mounting a light emitting element includes a housing and a flat plate-shaped electrode. The electrode is exposed from a lower surface of the housing. An upper surface of the electrode includes a mounting area on which the light emitting element is mounted. An insulator is arranged on the upper surface of the electrode. An element connector is connected to the insulator. A tubular reflective portion extends from the element connector to a height corresponding to the upper surface of the housing. A terminal is arranged on the side surface of the housing and connected to the reflective portion. A recess accommodates the light emitting element. The recess is formed in an upper portion of the housing, and the recess is formed by the upper surface of the electrode, the element connector, and the reflective portion.Type: ApplicationFiled: April 17, 2013Publication date: October 24, 2013Applicant: Shinko Electric Industries Co., Ltd.Inventors: Toshiyuki Okabe, Tsuyoshi Kobayashi, Toshio Kobayashi, Yasuyuki Kimura
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Patent number: 8374559Abstract: An internal operation of RF IC is adjusted so that the level of an RF transmitter signal is substantially stopped from rising, or made to descend in course of ramp-up of the RF transmitter signal. This adjustment is enabled by ramp-up adjustment data Last 4 symbols contained in preamble data precedent to real transmission data transmitted after completion of ramp-up. The ramp-up adjustment data and real transmission data are supplied from a baseband LSI. The RF transmitter signal contains phase and amplitude modulation components according to the EDGE system. RF IC includes phase and amplitude modulation control loops PM LP and AM LP. Ramp-up of RF power amplifiers PA1 and PA2 is performed by controlling the gain of the first variable amplifier MVGA included in the AM LP according to ramp information. Thus, unwanted radiation's level is reduced during ramp-up of the RF transmitter signal of the RF power amplifiers.Type: GrantFiled: February 24, 2012Date of Patent: February 12, 2013Assignee: Renesas Electronics CorporationInventors: Hiroaki Matsui, Yasuo Shima, Yasuyuki Kimura, Masahiko Yamamoto
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Publication number: 20120287955Abstract: An optical semiconductor element package, includes a ceramic wiring substrate portion having a mounting area for mounting an optical semiconductor element in a center part, and including an element electrode for connecting the optical semiconductor element, and an external connection electrode connected to the element electrode, and a metal sealing ring provided on the ceramic wiring substrate portion, and including an opening portion exposing the element electrode and the mounting area, in a center part, and a ring-like protruding portion provided to an outer peripheral part of the opening portion.Type: ApplicationFiled: April 30, 2012Publication date: November 15, 2012Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Yasuyuki KIMURA, Mikio SUYAMA, Misuzu MACHII
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Publication number: 20120177911Abstract: There is provided a prepreg for electronic materials which has superior flame retardancy and heat resistance. The prepreg relevant to the present invention comprises a glass composition filler which has a mean particle diameter of 2.0 ?m or less and a CaO content of 5% by mass or more, a glass cloth, and a matrix resin, characterized in that an amount of said glass composition filler to be filled is 10% by volume to 70% by volume relative to the total volume of said glass composition filler and said matrix resin.Type: ApplicationFiled: September 14, 2010Publication date: July 12, 2012Inventors: Yasuyuki Kimura, Yoshinori Gondoh, Shinichiro Tachibana
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Publication number: 20120157016Abstract: An internal operation of RF IC is adjusted so that the level of an RF transmitter signal is substantially stopped from rising, or made to descend in course of ramp-up of the RF transmitter signal. This adjustment is enabled by ramp-up adjustment data Last 4 symbols contained in preamble data precedent to real transmission data transmitted after completion of ramp-up. The ramp-up adjustment data and real transmission data are supplied from a baseband LSI. The RF transmitter signal contains phase and amplitude modulation components according to the EDGE system. RF IC includes phase and amplitude modulation control loops PM LP and AM LP. Ramp-up of RF power amplifiers PA1 and PA2 is performed by controlling the gain of the first variable amplifier MVGA included in the AM LP according to ramp information. Thus, unwanted radiation's level is reduced during ramp-up of the RF transmitter signal of the RF power amplifiers.Type: ApplicationFiled: February 24, 2012Publication date: June 21, 2012Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Hiroaki MATSUI, Yasuo SHIMA, Yasuyuki KIMURA, Masahiko YAMAMOTO
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Patent number: 8150342Abstract: An internal operation of RF IC is adjusted so that the level of an RF transmitter signal is substantially stopped from rising, or made to descend in course of ramp-up of the RF transmitter signal. This adjustment is enabled by ramp-up adjustment data Last 4 symbols contained in preamble data precedent to real transmission data transmitted after completion of ramp-up. The ramp-up adjustment data and real transmission data are supplied from a baseband LSI. The RF transmitter signal contains phase and amplitude modulation components according to the EDGE system. RF IC includes phase and amplitude modulation control loops PM LP and AM LP. Ramp-up of RF power amplifiers PA1 and PA2 is performed by controlling the gain of the first variable amplifier MVGA included in the AM LP according to ramp information. Thus, unwanted radiation's level is reduced during ramp-up of the RF transmitter signal of the RF power amplifiers.Type: GrantFiled: April 25, 2008Date of Patent: April 3, 2012Assignee: Renesas Electronics CorporationInventors: Hiroaki Matsui, Yasuo Shima, Yasuyuki Kimura, Masahiko Yamamoto
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Patent number: 8103560Abstract: A market-demand-forecasting-value calculation section acquires order entry actual achievement data from an order-entry-actual-achievement-data storing unit of an order receiving system, and calculates a market demand forecasting value using the order entry actual achievement data. A correction safety inventory quantity calculation section calculates an error rate, which becomes negative when an ordering required-quantity becomes large, based on a number of ordered parts and a past ordering required-quantity. Subsequently, the correction safety inventory quantity calculation section calculates a correction safety inventory quantity using the error rate and the market demand forecasting value and a money-amount-zone index value.Type: GrantFiled: December 9, 2008Date of Patent: January 24, 2012Assignee: Ricoh Company, Ltd.Inventors: Yoshio Ohno, Makiko Watanabe, Yasuyuki Kimura
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Patent number: 8053803Abstract: A package for an optical semiconductor element is provided. The package includes: a stem body having a sealing hole therein; and a lead pin having a glass sealing portion which is sealed with sealing glass in the sealing hole. Characteristic impedance of the glass sealing portion is adjusted to a given value. The characteristic impedance Zo is given by: Zo=(138/Er1/2)×log(D/d), where a hole diameter of the sealing hole is D, a wire diameter of the lead pint is d, and a dielectric constant of the sealing glass is Er, and the dielectric constant Er of the sealing glass is set by controlling an amount of bubble contained in the sealing glass.Type: GrantFiled: March 23, 2009Date of Patent: November 8, 2011Assignee: Shinko Electric Industries Co., Ltd.Inventor: Yasuyuki Kimura
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Patent number: 8055218Abstract: This invention provides a wireless transmitter circuit for mobile communication apparatus and this circuit can be configured with fewer components and is suitable for downsizing. A single PLL synthesizer serves as both RF frequency band PLL and IF frequency band PLL among three oscillators for TX, RX and IF frequency bands, which have been required in conventional mobile communication apparatus. The number of necessary oscillators occupying a large area within a chip is reduced and the number of components is decreased. Specifically, circuitry is arranged to generate local oscillation signals for RF and IF frequency bands by frequency dividing the output of a VCO of the RF frequency band PLL.Type: GrantFiled: June 22, 2005Date of Patent: November 8, 2011Assignee: Renesas Electronics CorporationInventors: Satoshi Tanaka, Yukinori Akamine, Manabu Kawabe, Yasuyuki Kimura, Takao Okazaki
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Publication number: 20100254544Abstract: The invention provides an amplifier circuit of a capacitor microphone of which the noise resistance against noise of a supply voltage is enhanced. In an amplifier circuit of a capacitor microphone of the invention, while a noise component of a supply voltage is applied to one inversion input terminal of an operational amplifier of an amplification portion through a parasitic capacitor existing between an external power supply wiring and an external wiring that are adjacent to each other, the problem noise component of the supply voltage is applied to the other non-inversion input terminal by capacitive coupling to an internal power supply wiring. Therefore, the noise component is cancelled at the operational amplifier.Type: ApplicationFiled: April 2, 2010Publication date: October 7, 2010Applicants: SANYO Electric Co., Ltd, SANYO Semiconductor Co., LtdInventors: Yasuyuki KIMURA, Masahito KANAYA, Takashi TOKANO
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Patent number: 7689191Abstract: A semiconductor integrated circuit having a built-in PLL circuit which has two charge pump circuits for charging and discharging capacitive elements of a loop filter in response to signals generated by a phase comparator circuit. One of the two charge pump circuits has current sources which generate current values smaller than those generated by current sources of the other charge pump circuit. The loop filter has a first capacitive element connected to a charge/discharge node, and a second capacitive element connected to the charge/discharge node through a resistive element. The first capacitive element is charged and discharged by the one charge pump circuit, while the second capacitive element is charged and discharged by the other charge pump circuit. A charging current source of the one charge pump circuit operates simultaneously with a discharging current source of the other charge pump circuit, i.e., the charge pump circuits operate in opposite phase.Type: GrantFiled: March 30, 2007Date of Patent: March 30, 2010Assignees: Renesas Technology Corp., Epoch Microelectronics, Inc.Inventors: Yasuyuki Kimura, Satoshi Shimizu, Masakatsu Yokota, Ken Suyama, Aleksander Dec
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Patent number: 7640951Abstract: Glass cloth which is formed of a warp yarn and a weft yarn of the same glass yarn, wherein a ratio of warp yarn width to weft yarn width is not less than 0.80 and not more than 1.20 and a ratio of an elongation rate in a length direction when a load in a range of 25 N to 100 N per 25 mm width of the glass cloth is added in a warp yarn direction, to an elongation rate in a width direction when said load is added in a weft yarn direction is not less than 0.80 and not more than 1.20.Type: GrantFiled: April 10, 2008Date of Patent: January 5, 2010Assignee: Asahi-Schwebel Co., Ltd.Inventors: Yoshinobu Fujimura, Yasuyuki Kimura
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Publication number: 20090242926Abstract: A package for an optical semiconductor element is provided. The package includes: a stem body having a sealing hole therein; and a lead pin having a glass sealing portion which is sealed with sealing glass in the sealing hole. Characteristic impedance of the glass sealing portion is adjusted to a given value. The characteristic impedance Zo is given by: Zo=(138/Er1/2)×log(D/d), where a hole diameter of the sealing hole is D, a wire diameter of the lead pint is d, and a dielectric constant of the sealing glass is Er, and the dielectric constant Er of the sealing glass is set by controlling an amount of bubble contained in the sealing glass.Type: ApplicationFiled: March 23, 2009Publication date: October 1, 2009Applicant: Shinko Electric Industries Co., Ltd.Inventor: Yasuyuki Kimura
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Patent number: 7586592Abstract: A sheet recognizing device and method for precisely checking the authentication of a sheet by performing recognition of color and watermark of a sheet and detecting the subtle characteristic of a hue ink printed on one side of the sheet.Type: GrantFiled: November 11, 2005Date of Patent: September 8, 2009Assignee: Kabushiki Kaisha Nippon ConluxInventors: Eiji Itako, Yasuyuki Kimura, Futoshi Houjo, Satoru Tsurumaki, Seiji Takamatsu
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Patent number: 7574033Abstract: There are provided a sheet paper identification device and method capable of preventing use of the device in an abnormal state by preventing erroneous identification caused by dust attached to an interior of a pickup section, detecting the abnormal state in the pickup section due to the dust, and notifying it outside. When a sheet paper is inserted from a sheet paper insert section (3), the sheet paper is fed by a sheet paper feed section (4). An image pickup section (7) images the interior of the image pickup section (7) before the sheet paper is fed to the image pickup section (7) so as to acquire image data without any sheet paper so as to acquire image data having the sheet paper. A dust detection section (8) calculates the position and the area of the image indicating dust of the image data having no sheet paper.Type: GrantFiled: March 31, 2004Date of Patent: August 11, 2009Assignee: Kabushiki Kaisha Nippon ConluxInventors: Takeshi Ishida, Yasuyuki Kimura
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Publication number: 20090157533Abstract: A market-demand-forecasting-value calculation section acquires order entry actual achievement data from an order-entry-actual-achievement-data storing unit of an order receiving system, and calculates a market demand forecasting value using the order entry actual achievement data. A correction safety inventory quantity calculation section calculates an error rate, which becomes negative when an ordering required-quantity becomes large, based on a number of ordered parts and a past ordering required-quantity. Subsequently, the correction safety inventory quantity calculation section calculates a correction safety inventory quantity using the error rate and the market demand forecasting value and a money-amount-zone index value.Type: ApplicationFiled: December 9, 2008Publication date: June 18, 2009Inventors: Yoshio OHNO, Makiko Watanabe, Yasuyuki Kimura
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Patent number: 7499689Abstract: In a communication semiconductor integrated circuit device using offset PLL architectures and including an oscillator circuit and a frequency divider circuit generating an intermediate frequency signal, the oscillator circuit includes an oscillator, a programmable frequency divider which frequency-divides the oscillation signal in accordance with frequency division information, a phase comparator detecting a phase difference between an output signal of the programmable frequency divider and a reference signal, and a frequency control unit for outputting a signal indicative of the phase difference and controlling the oscillation frequency of the oscillator, wherein a frequency division ratio generator circuit generates an integer part I and a fraction part F/G based on band information concerning the use frequency band and mode information along with channel information and for producing the frequency division ratio information to thereby give it to the programmable frequency divider.Type: GrantFiled: March 26, 2007Date of Patent: March 3, 2009Assignees: Renesas Technology Corp., TTPCOM LimitedInventors: Toshiya Uozumi, Yasuyuki Kimura, Hirotaka Osawa, Satoru Yamamoto, Robert Astel Henshaw
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Patent number: 7499688Abstract: In a communication semiconductor integrated circuit device using offset PLL architectures and including an oscillator circuit and a frequency divider circuit generating an intermediate frequency signal, the oscillator circuit includes an oscillator, a programmable frequency divider which frequency-divides the oscillation signal in accordance with frequency division information, a phase comparator detecting a phase difference between an output signal of the programmable frequency divider and a reference signal, and a frequency control unit for outputting a signal indicative of the phase difference and controlling the oscillation frequency of the oscillator, wherein a frequency division ratio generator circuit generates an integer part I and a fraction part F/G based on band information concerning the use frequency band and mode information along with channel information and for producing the frequency division ratio information to thereby give it to the programmable frequency divider.Type: GrantFiled: March 26, 2007Date of Patent: March 3, 2009Assignees: Renesas Technology Corp., TTPOM LimitedInventors: Toshiya Uozumi, Yasuyuki Kimura, Hirotaka Osawa, Satoru Yamamoto, Robert Astel Henshaw
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Publication number: 20080287079Abstract: An internal operation of RF IC is adjusted so that the level of an RF transmitter signal is substantially stopped from rising, or made to descend in course of ramp-up of the RF transmitter signal. This adjustment is enabled by ramp-up adjustment data Last 4 symbols contained in preamble data precedent to real transmission data transmitted after completion of ramp-up. The ramp-up adjustment data and real transmission data are supplied from a baseband LSI. The RF transmitter signal contains phase and amplitude modulation components according to the EDGE system. RF IC includes phase and amplitude modulation control loops PM LP and AM LP. Ramp-up of RF power amplifiers PA1 and PA2 is performed by controlling the gain of the first variable amplifier MVGA included in the AM LP according to ramp information. Thus, unwanted radiation's level is reduced during ramp-up of the RF transmitter signal of the RF power amplifiers.Type: ApplicationFiled: April 25, 2008Publication date: November 20, 2008Inventors: Hiroaki MATSUI, Yasuo Shima, Yasuyuki Kimura, Masahiko Yamamoto