Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.

Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.

Abstract: A sheet identifying device and method for identifying the kind of sheet or checking a sheet correctly by reducing the adverse influence of the wrinkle and stain of the sheet and of the displacement of a watermark pattern from the watermark area. A transmission optical sensor (8) images a sheet. A watermark area extracting section (12) extracts image data on a watermark area. A watermark area gravity center calculating section (13) calculates the center of gravity of the watermark area. A watermark pattern displacement calculating section (14) calculates the displacement of the watermark pattern from the center of gravity. An identification object image extracting section (15) extracts identification object image data with reference to the displacement. A scratch/stain detecting section (7) calculates the difference between the identification image data and a true template to extract an image of a scratch and stain.

Abstract: There are provided a sheet paper identification device and method capable of preventing use of the device in an abnormal state by preventing erroneous identification caused by dust attached to an interior of a pickup section, detecting the abnormal state in the pickup section due to the dust, and notifying it outside. When a sheet paper is inserted from a sheet paper insert section (3), the sheet paper is fed by a sheet paper feed section (4). An image pickup section (7) images the interior of the image pickup section (7) before the sheet paper is fed to the image pickup section (7) so as to acquire image data without any sheet paper so as to acquire image data having the sheet paper. A dust detection section (8) calculates the position and the area of the image indicating dust of the image data having no sheet paper.

Abstract: A transmitter adopting a polar loop system including a phase control loop for controlling the phase of a carrier signal outputted from a transmitting oscillator and an amplitude control loop for controlling the amplitude of a transmitting output signal outputted from a power amplification circuit, and designed to be capable of performing transmission using a GMSK modulation mode and transmission using an 8-PSK modulation mode. In the transmitter, the phase control loop is shared as a phase control loop for use in the GMSK modulation mode and a phase control loop for use in the 8-PSK modulation mode. A component similar to any one of components constituting a loop filter is provided in parallel therewith so that the component can be connected or disconnected in accordance with the modulation mode, for example, by use of a switching element.

Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.

Abstract: There are provided a voltage-controlled oscillator and an RF-IC for W-CDMA, which are capable of ensuring a wide frequency range and improving oscillation stability. The voltage-controlled oscillator (RF-IC) includes: switching A and B inductors generating a magnetic interaction between resonant A and B inductors of a resonant circuit; and an A_NMOS, a B_NMOS, a C_NMOS, and D_NMOS as switch/load means having together a function of changing an inductance value by the magnetic interaction between the resonant A and B inductors and the switching A and B inductors and a function of serving as loads of the switching A and B inductors. The A_NMOS, the B_NMOS, the C_NMOS, and the D_NMOS are turned ON/OFF by a control signal so as to control the mutual induction, whereby the oscillation frequency is switched by changing the inductance value of the resonant circuit. Also, oscillation stability is improved by increasing the inductance value.

Abstract: A sheet identifying device and method for identifying the kind of sheet or checking whether a sheet is a genuine or counterfeit one correctly without influence of the state of the sheet. Data on the image of a sheet is acquired, and the image data is binarized according to a watermark region extraction threshold. Image data on the watermark region is extracted according to the sheet image data. The watermark region image data is binarized according to a watermark pattern extraction threshold. The center of gravity of the watermark region is calculated on the basis of the watermark region image data. The watermark region image data is divided into divisions using the center of gravity of the watermark region as the origin. From the watermark region image data, image data on a predetermined specific region is extracted. Values of distinctive features such as the center of gravity and area of the watermark pattern included in the specific region image data are extracted.

Abstract: A transmitter adopting a polar loop system including a phase control loop for controlling the phase of a carrier signal outputted from a transmitting oscillator and an amplitude control loop for controlling the amplitude of a transmitting output signal outputted from a power amplification circuit, and designed to be capable of performing transmission using a GMSK modulation mode and transmission using an 8-PSK modulation mode. In the transmitter, the phase control loop is shared as a phase control loop for use in the GMSK modulation mode and a phase control loop for use in the 8-PSK modulation mode. A component similar to any one of components constituting a loop filter is provided in parallel therewith so that the component can be connected or disconnected in accordance with the modulation mode, for example, by use of a switching element.

Abstract: The present invention is (1) a glass cloth composed of a group of warp yarns and a group of weft yarns wherein one of the group of the warp and weft yarns are arranged with substantially no gap between the yarns, and, in that group, a width A (?m) of a cross-section of the yarn arranged with substantially no gap, a single-fiber diameter L (?m) of the yarn, the number N of single-fibers constituting the yarn and a weaving density C (ends/25 mm) of the glass cloth composed of the yarns satisfy the following equation (1-a): C×A/(25×L×N)?1.

Abstract: A semiconductor integrated circuit having a built-in PLL circuit which has two charge pump circuits for charging and discharging capacitive elements of a loop filter in response to signals generated by a phase comparator circuit. One of the two charge pump circuits has current sources which generate current values smaller than those generated by current sources of the other charge pump circuit. The loop filter has a first capacitive element connected to a charge/discharge node, and a second capacitive element connected to the charge/discharge node through a resistive element. The first capacitive element is charged and discharged by the one charge pump circuit, while the second capacitive element is charged and discharged by the other charge pump circuit. A charging current source of the one charge pump circuit operates simultaneously with a discharging current source of the other charge pump circuit, i.e., the charge pump circuits operate in opposite phase.

Abstract: Glass cloth which is formed of a warp yarn and a weft yarn of the same glass yarn, wherein a ratio of warp yarn width to weft yarn width is not less than 0.80 and not more than 1.20 and a ratio of an elongation rate in a length direction when a load in a range of 25 N to 100 N per 25 mm width of the glass cloth is added in a warp yarn direction, to an elongation rate in a width direction when said load is added in a weft yarn direction is not less than 0.80 and not more than 1.20.

Abstract: A semiconductor integrated circuit having a built-in PLL circuit which has two charge pump circuits for charging and discharging capacitive elements of a loop filter in response to signals generated by a phase comparator circuit. One of the two charge pump circuits has current sources which generate current values smaller than those generated by current sources of the other charge pump circuit. The loop filter has a first capacitive element connected to a charge/discharge node, and a second capacitive element connected to the charge/discharge node through a resistive element. The first capacitive element is charged and discharged by the one charge pump circuit, while the second capacitive element is charged and discharged by the other charge pump circuit. A charging current source of the one charge pump circuit operates simultaneously with a discharging current source of the other charge pump circuit, i.e., the charge pump circuits operate in opposite phase.

Abstract: In a communication semiconductor integrated circuit device using offset PLL architectures and including an oscillator circuit and a frequency divider circuit generating an intermediate frequency signal, the oscillator circuit includes an oscillator, a programmable frequency divider which frequency-divides the oscillation signal in accordance with frequency division information, a phase comparator detecting a phase difference between an output signal of the programmable frequency divider and a reference signal, and a frequency control unit for outputting a signal indicative of the phase difference and controlling the oscillation frequency of the oscillator, wherein a frequency division ratio generator circuit generates an integer part I and a fraction part F/G based on band information concerning the use frequency band and mode information along with channel information and for producing the frequency division ratio information to thereby give it to the programmable frequency divider.

Abstract: This invention provides a wireless transmitter circuit for mobile communication apparatus and this circuit can be configured with fewer components and is suitable for downsizing. A single PLL synthesizer serves as both RF frequency band PLL and IF frequency band PLL among three oscillators for TX, RX and IF frequency bands, which have been required in conventional mobile communication apparatus. The number of necessary oscillators occupying a large area within a chip is reduced and the number of components is decreased. Specifically, circuitry is arranged to generate local oscillation signals for RF and IF frequency bands by frequency dividing the output of a VCO of the RF frequency band PLL.

Abstract: A semiconductor integrated circuit having a built-in PLL circuit which has two charge pump circuits for charging and discharging capacitive elements of a loop filter in response to signals generated by a phase comparator circuit. One of the two charge pump circuits has current sources which generate current values smaller than those generated by current sources of the other charge pump circuit. The loop filter has a first capacitive element connected to a charge/discharge node, and a second capacitive element connected to the charge/discharge node through a resistive element. The first capacitive element is charged and discharged by the one charge pump circuit, while the second capacitive element is charged and discharged by the other charge pump circuit. A charging current source of the one charge pump circuit operates simultaneously with a discharging current source of the other charge pump circuit, i.e., the charge pump circuits operate in opposite phase.

Abstract: A voltage controlled LC resonance oscillation circuit has a plurality of capacitive elements connected to an output node. These capacitive elements are applied with voltages at opposing terminals for selecting an oscillating frequency band, so that the oscillating frequency band can be changed step by step in accordance with the selection voltage. The capacitive elements include at least one variable capacitive element such as a MOS capacitor, the capacitance of which is varied in accordance with a voltage applied thereto. The MOS capacitor is similar in structure to a MOS transistor. The variable capacitive element can be supplied at a terminal opposite to the output node with a voltage from a variable voltage source, for example, in place of the selection voltage. The voltage controlled LC resonance oscillation circuit can measure the output amplitude and oscillating frequency without affecting the characteristics thereof, and reduce the parasitic capacitance.

Abstract: The invention provides a communication semiconductor integrated circuit (RF IC) that, when a transmission oscillator is incorporated into a semiconductor chip, secures the oscillation operation over a wide frequency range, prevents a deterioration of a transmission spectrum, and thereby enhances the accuracy of an oscillation frequency. The integrated circuit corrects a dispersion of the KV characteristic of the transmission oscillator by calibrating a current Icp of the charge pump inside the phase control loop. More in concrete, the integrated circuit measures a KV value Kv of the transmission oscillator, and calibrates the current Icp of the charge pump so that Kv·Icp falls into a predetermined value.

Abstract: A voltage controlled LC resonance oscillation circuit has a plurality of capacitive elements connected to an output node. These capacitive elements are applied with voltages at opposing terminals for selecting an oscillating frequency band, so that the oscillating frequency band can be changed step by step in accordance with the selection voltage. The capacitive elements include at least one variable capacitive element such as a MOS capacitor, the capacitance of which is varied in accordance with a voltage applied thereto. The MOS capacitor is similar in structure to a MOS transistor. The variable capacitive element can be supplied at a terminal opposite to the output node with a voltage from a variable voltage source, for example, in place of the selection voltage. The voltage controlled LC resonance oscillation circuit can measure the output amplitude and oscillating frequency without affecting the characteristics thereof, and reduce the parasitic capacitance.

Abstract: In an analog-to-digital conversion circuit, the gain of an operational amplification circuit in each of first- to third-stage circuits is two. The reference voltage range of a sub-A/D converter in each of the stages of circuits is set to one-half the reference voltage range of a D/A converter, so that the output voltage range of the D/A converter coincides with the output voltage range of the operational amplification circuit. When the voltage range of the analog input signal is VINp-p, the full-scale range of the sub-A/D converter is switched to VINp-p, and the gain of the operational amplification circuit is one. When the voltage range of the analog input signal is VINp-p/2, the full-scale range of the sub-A/D converter is switched to VINp-p/2, and the gain of the operational amplification circuit is two.