Abstract: Embodiments of EUV photomasks and methods for forming a EUV photomask are provided. The method comprises providing a substrate, a reflective layer, a capping layer, a hard mask layer, and forming an opening therein. An absorber layer is then filled in the opening and over the top surface of the hard mask layer. A removing process is provided to form an absorber with a top surface lower than a top surface of the capping layer.

Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method comprises providing a semiconductor structure including a substrate, a dielectric layer formed over the substrate, and a hard mask region formed over the dielectric layer; forming a first photoresist layer over the hard mask region; performing a first lithography exposure using a photomask to form a first latent pattern; forming a second photoresist layer over the hard mask region; and performing a second lithography exposure using the photomask to form a second latent pattern. The photomask includes a first mask feature and a second mask feature. The first latent pattern corresponds to the first mask feature, and the second latent pattern corresponds to the first mask feature and the second mask feature.

Abstract: An out-of-band (OoB) suppression layer is applied on a reflective multiplayer (ML) coating, so as to avoid the OoB reflection and to enhance the optical contrast at 13.5 nm. A material having a low reflectivity at wavelength of 193-257 nm, for example, silicon carbide (SiC), is used as the OoB suppression layer. A method of fabricating an EUV mask having the OoB suppression layer and a method of inspecting an EUV mask having the OoB suppression are also provided.

Abstract: The present disclosure provides a method that includes forming a first resist layer on a substrate; forming a second resist layer over the first resist layer; and performing an electron-beam (e-beam) lithography exposure process to the first resist layer and the second resist layer, thereby forming a first latent feature in the first resist layer and a second latent feature in the second resist layer.

Abstract: An extreme ultraviolet lithography method is disclosed. In an example, the EUVL method comprises providing at least two mask areas having a same pattern, forming a resist layer over a substrate, determining an optimized exposure dose based on an exposure dose for a pre-specified pattern on one of the at least two mask areas to achieve a pre-specified target dimension under a corresponding single exposure process, and performing a multiple exposure process for exposing a same area of the resist layer to the same pattern. The multiple exposure process comprises a plurality of exposure processes, wherein each of the plurality of exposure processes uses an exposure dose that is less than the optimized exposure dose and a sum of the exposure dose of each of the plurality of exposure processes is approximately equal to the optimized exposure dose.

Abstract: An extreme ultraviolet lithography (EUVL) system for patterning a semiconductor wafer includes an extreme ultraviolet (EUV) mask. The EUV mask includes first and second states, and further includes a polygon region and an open-spacing region. The polygon region includes a plurality of main polygons separated by a plurality of first fields. The open-spacing region is located outside the polygon region, and includes a plurality of sub-resolution polygon and second fields, and does not include any main polygons. The system also includes a nearly on-axis illumination (ONI) to expose the EUV mask and optics to direct diffracted lights reflected from the EUV mask towards the semiconductor wafer.

Abstract: A low EUV reflectivity mask includes a low thermal expansion material (LTEM) layer, a low EUV reflectivity (LEUVR) multilayer over the LTEM layer in a first region, a high EUV reflectivity (HEUVR) multilayer over the LTEM layer in a second region and a patterned absorption layer over the LEUVR multilayer and the HEUVR multilayer.

Abstract: The present disclosure provides one embodiment of an extreme ultraviolet (EUV) mask. The EUV mask includes a first state and a second state different from each other; a first main polygon and a second main polygon adjacent to the first main polygon; a plurality of sub-resolution assist polygons; and a field. Each of the first and second main polygons, the sub-resolution assist polygons, and the field has an associated state. The state assigned to the first main polygon is different from the state assigned to the second main polygon. The plurality of assist polygons are assigned a same state, which is different from a state assigned to the field.

Abstract: An extreme ultraviolet lithography (EUVL) process is performed on a target, such as a semiconductor wafer, having a photosensitive layer. The method includes providing a one-dimensional patterned mask along a first direction. The patterned mask includes a substrate including a first region and a second region, a multilayer mirror above the first and second regions, an absorption layer above the multilayer mirror in the second region, and a defect in the first region. The method further includes exposing the patterned mask by an illuminator and setting the patterned mask and the target in relative motion along the first direction while exposing the patterned mask. As a result, an accumulated exposure dose received by the target is an optimized exposure dose.

Abstract: The present disclosure provides a method for extreme ultraviolet lithography (EUVL) process. The method includes loading a binary phase mask (BPM) to a lithography system, wherein the BPM includes two phase states and defines an integrated circuit (IC) pattern thereon; setting an illuminator of the lithography system in an illumination mode according to the IC pattern; configuring a pupil filter in the lithography system according to the illumination mode; and performing a lithography exposure process to a target with the BPM and the pupil filter by the lithography system in the illumination mode.

Abstract: A system of an extreme ultraviolet lithography (EUVL) is disclosed. The system includes an extreme ultraviolet (EUV) mask with three states. A reflection coefficient is r1, r2 and r3, respectively, wherein r3 is close to (r1+r2)/2. The system also includes a nearly on-axis illumination (ONI) with partial coherence a less than 0.3 to expose the EUV mask to produce diffracted light and non-diffracted light, removing most of the non-diffracted light, and collecting and directing the diffracted light and the not removed non-diffracted light by a projection optics box (POB) to expose a target.

Abstract: A system of an extreme ultraviolet lithography (EUVL) is disclosed. an extreme ultraviolet lithography (EUVL) system includes an extreme ultraviolet (EUV) reflection-type mask having a patterned flare-suppressing-by-phase-shifting (FSbPhS) layer disposed over a patterned absorption layer. The system also includes a radiation to expose the EUV mask and a projection optics box (POB) to collect and direct the radiation that reflects from the EUV mask to expose a target.

Abstract: A method includes defining a metal pattern layer over a first dielectric layer. The first dielectric layer is disposed over an etch stop layer and the etch stop layer is disposed over a second dielectric layer. A spacer layer is grown over the metal pattern layer and the first dielectric layer. A metal trench is formed with a metal width in the first dielectric layer. A via hole is formed with a via width in the second dielectric layer.

Abstract: A system and process of an extreme ultraviolet lithography (EUVL) is disclosed. An EUVL process includes receiving a mask pair having a same pattern. The mask pair includes an extreme ultraviolet (EUV) mask and a low EUV reflectivity mask. A first exposure process is performed by using the EUV mask to expose a substrate. A second exposure process is performed by using the low EUV reflectivity mask to expose the same substrate. The first exposure process is conducted according to a first exposure dose matrix and the second exposure process is conducted according to a second exposure dose matrix.

Abstract: A method includes defining a photoresist layer over a first dielectric layer. The first dielectric layer is disposed over an etch stop layer and the etch stop layer is disposed over a second dielectric layer. A spacer layer is formed over the photoresist and the first dielectric layer. The spacer layer has an opening that has a via width. The opening is disposed directly above a via location. A metal trench with a metal width is formed in the first dielectric layer. The metal width at the via location is greater than the via width. A via hole with the via width is formed at the via location in the second dielectric layer.

Abstract: An out-of-band (OoB) suppression layer is applied on a reflective multiplayer (ML) coating, so as to avoid the OoB reflection and to enhance the optical contrast at 13.5 nm A material having a low reflectivity at wavelength of 193-257 nm, for example, silicon carbide (SiC), is used as the OoB suppression layer. A method of fabricating an EUV mask having the OoB suppression layer and a method of inspecting an EUV mask having the OoB suppression are also provided.

Abstract: Embodiments of EUV photomasks and methods for forming a EUV photomask are provided. The method comprises providing a substrate, a reflective layer, a capping layer, a hard mask layer, and forming an opening therein. An absorber layer is then filled in the opening and over the top surface of the hard mask layer. A removing process is provided to form an absorber with a top surface lower than a top surface of the capping layer.

Abstract: An EUV mask includes a low thermal expansion material (LTEM) substrate, a reflective multilayer (ML) above one surface of the LTEM substrate, and a conductive layer above an opposite surface of the LTEM substrate. A capping layer is provided above the reflective ML, a buffer layer is provided above the capping layer, and an absorption stack is provided above the buffer layer. The absorption stack comprises multiple layers. A multiple patterning process is performed on the absorption stack to form multiple reflective states.

Abstract: A mask, method of fabricating same, and method of using same are disclosed. In an example, a mask includes a substrate and a reflective multilayer coating deposited over the substrate. The reflective multilayer coating is formed by positioning the substrate such that an angle ? is formed between a normal line of the substrate and particles landing on the substrate and rotating the substrate about an axis that is parallel with a landing direction of the particles. In an example, reflective multilayer coating includes a first layer and a second layer deposited over the first layer. A phase defect region of the reflective multilayer coating includes a first deformation in the first layer at a first location, and a second deformation in the second layer at a second location, the second location laterally displaced from the first location.

Abstract: The present disclosure provides a method that includes forming a first resist layer on a substrate; forming a second resist layer over the first resist layer; and performing an electron-beam (e-beam) lithography exposure process to the first resist layer and the second resist layer, thereby forming a first latent feature in the first resist layer and a second latent feature in the second resist layer.