Patents by Inventor Yen-Cheng Lu

Yen-Cheng Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9280046
    Abstract: A method for fabricating an extreme ultraviolet (EUV) mask includes providing a low thermal expansion material (LTEM) layer. A reflective multiple-layer (ML) is deposited over the LTEM layer. A flowable-photosensitive-absorption-layer (FPhAL) is spin coated over the reflective ML. The FPhAL is patterned by a lithography process to form a patterned absorption layer.
    Type: Grant
    Filed: October 11, 2013
    Date of Patent: March 8, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Anthony Yen, Chih-Tsung Shih, Ming-Jiun Yao, Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Hsin-Chang Lee
  • Publication number: 20160048071
    Abstract: An apparatus comprises a low EUV reflectivity (LEUVR) mask. The LEUVR mask includes a low thermal expansion material (LTEM) layer; a reflective multilayer (ML) over the LTEM layer; and a patterned absorption layer over the reflective ML. The reflective ML has less than 2% EUV reflectivity.
    Type: Application
    Filed: October 26, 2015
    Publication date: February 18, 2016
    Inventors: YEN-CHENG LU, JENG-HORNG CHEN, SHINN-SHENG YU, ANTHONY YEN
  • Patent number: 9261774
    Abstract: The present disclosure provides one embodiment of an extreme ultraviolet (EUV) mask. The EUV mask includes a first state and a second state different from each other; a first main polygon and a second main polygon adjacent to the first main polygon; a plurality of sub-resolution assist polygons; and a field. Each of the first and second main polygons, the sub-resolution assist polygons, and the field has an associated state. The state assigned to the first main polygon is different from the state assigned to the second main polygon. The plurality of assist polygons are assigned a same state, which is different from a state assigned to the field.
    Type: Grant
    Filed: March 21, 2014
    Date of Patent: February 16, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Publication number: 20160033866
    Abstract: The present disclosure provides a method in accordance with some embodiments. The method includes loading a mask to a lithography system, wherein the mask includes an one-dimensional integrated circuit (1D IC) pattern; utilizing a pupil phase modulator in the lithography system to modulate phase of light diffracted from the mask; and performing a lithography exposing process to a target in the lithography system with the mask and the pupil phase modulator.
    Type: Application
    Filed: July 31, 2014
    Publication date: February 4, 2016
    Inventors: Yen-Cheng Lu, Chia-Hao Hsu, Shinn-Sheng Yu, Chia-Chen Chien, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9252048
    Abstract: A method includes defining a photoresist layer over a first dielectric layer. The first dielectric layer is disposed over an etch stop layer and the etch stop layer is disposed over a second dielectric layer. A spacer layer is formed over the photoresist and the first dielectric layer. The spacer layer has an opening that has a via width. The opening is disposed directly above a via location. A metal trench with a metal width is formed in the first dielectric layer. The metal width at the via location is greater than the via width. A via hole with the via width is formed at the via location in the second dielectric layer.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: February 2, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Chih-Tsung Shih, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9244366
    Abstract: An extreme ultraviolet lithography (EUVL) process is performed on a target, such as a semiconductor wafer, having a photosensitive layer. The method includes providing a one-dimensional patterned mask along a first direction. The patterned mask includes a substrate including a first region and a second region, a multilayer mirror above the first and second regions, an absorption layer above the multilayer mirror in the second region, and a defect in the first region. The method further includes exposing the patterned mask by an illuminator and setting the patterned mask and the target in relative motion along the first direction while exposing the patterned mask. As a result, an accumulated exposure dose received by the target is an optimized exposure dose.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: January 26, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9229326
    Abstract: Provided is a method of forming a pattern for an integrated circuit. The method includes forming a first layer over a substrate, wherein the first layer's etch rate is sensitive to a radiation, such as an extreme ultraviolet (EUV) radiation or an electron beam (e-beam). The method further includes forming a resist layer over the first layer and exposing the resist layer to the radiation for patterning. During the exposure, various portions of the first layer change their etch rate in response to an energy dose of the radiation received therein. The method further includes developing the resist layer, etching the first layer, and etching the substrate to form a pattern. The radiation-sensitivity of the first layer serves to reduce critical dimension variance of the pattern.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: January 5, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shu-Hao Chang, Shinn-Sheng Yu, Jui-Ching Wu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9223197
    Abstract: A lithography process in a lithography system includes loading a mask having multiple mask states and having a mask pattern consisting of a plurality of polygons and a field. Different mask states are assigned to adjacent polygons and the field. The lithography process further includes configuring an illuminator to generate an illumination pattern on an illumination pupil plane of the lithography system; configuring a pupil filter on a projection pupil plane of the lithography system with a filtering pattern determined according to the illumination pattern; and performing an exposure process to a target with the illuminator, the mask, and the pupil filter. The exposure process produces diffracted light and non-diffracted light behind the mask and the pupil filter removes most of the non-diffracted light.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: December 29, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shinn-Sheng Yu, Yen-Cheng Lu, Anthony Yen
  • Publication number: 20150346596
    Abstract: An extreme ultraviolet lithography (EUVL) process is disclosed. The process comprises receiving a mask. The mask includes a low thermal expansion material (LTEM) substrate, a reflective multilayer (ML)over one surface of the LTEM substrate, a first region having a phase-shifting layer over the reflective ML, and a second region having no phase-shifting layer over the reflective ML. The EUVL process also comprises exposing the mask by a nearly on-axis illumination with partial coherence less than 0.3 to produce diffracted light and non-diffracted light, removing at least a portion of the non-diffracted light, and collecting and directing the diffracted light and the not removed non-diffracted light by a projection optics box (POB) to expose a target.
    Type: Application
    Filed: August 14, 2015
    Publication date: December 3, 2015
    Inventors: Yen-Cheng Lu, JENG-HORNG CHEN, SHINN-SHENG YU, ANTHONY YEN
  • Patent number: 9195135
    Abstract: A method for repairing a phase-defect region in a patterned mask for extreme ultraviolet lithography (EUVL) is disclosed. A patterned mask for EUVL is received. The patterned mask includes an absorptive region having an absorption layer over a defect-repairing-enhancement (DRE) layer, a reflective region having the DRE layer without the absorption layer on top of it, a defect and a phase-defect region resulting from the defect and intruding the reflective region. A location and a shape of the phase-defect region is determined. A portion or portions of the DRE layer in the reflective region is removed according to the location and the shape of the phase-defect region to compensate the effect of the phase-defect region.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: November 24, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Publication number: 20150331307
    Abstract: Embodiments of EUV photomasks and methods for forming a EUV photomask are provided. The method comprises providing a substrate, a reflective layer, a capping layer, a hard mask layer, and forming an opening therein. An absorber layer is then filled in the opening and over the top surface of the hard mask layer. A removing process is provided to form an absorber with a top surface lower than a top surface of the capping layer.
    Type: Application
    Filed: July 27, 2015
    Publication date: November 19, 2015
    Inventors: Yen-Cheng Lu, Chih-Tsung Shih, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9182659
    Abstract: A system and process of an extreme ultraviolet lithography (EUVL) is disclosed. An EUVL process includes receiving a mask pair having a same pattern. The mask pair includes an extreme ultraviolet (EUV) mask and a low EUV reflectivity mask. A first exposure process is performed by using the EUV mask to expose a substrate. A second exposure process is performed by using the low EUV reflectivity mask to expose the same substrate. The first exposure process is conducted according to a first exposure dose matrix and the second exposure process is conducted according to a second exposure dose matrix.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: November 10, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Publication number: 20150287596
    Abstract: The present disclosure provides a method that includes forming a first patternable material layer on a substrate; forming a second patternable material layer over the first patternable material layer; and performing a charged particle beam lithography exposure process to the first patternable material layer and the second patternable material layer, thereby forming a first latent feature in the first patternable material layer and a second latent feature in the second patternable material layer.
    Type: Application
    Filed: June 23, 2015
    Publication date: October 8, 2015
    Inventors: Yen-Cheng Lu, Chih-Tsung Shih, Jeng-Horng Chen, Shinn-Sheng Yu, Anthony Yen
  • Publication number: 20150277234
    Abstract: A method and system for adjusting exposure intensity to reduce unwanted lithographic effects is disclosed. In some exemplary embodiments, the method of photolithography includes receiving a mask and a workpiece. An orientation of an illumination pattern relative to the mask is determined, and an intensity profile of the illumination pattern is adjusted according to the orientation. The mask is exposed to radiation according to the illumination pattern and the intensity profile. Radiation resulting from the exposing of the mask is utilized to expose the workpiece. In some such embodiments, the intensity profile includes an intensity that varies across an illuminated region of the illumination pattern.
    Type: Application
    Filed: March 31, 2014
    Publication date: October 1, 2015
    Applicant: Taiwan Semiconductor Manufacturng Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9146459
    Abstract: A low EUV reflectivity mask includes a low thermal expansion material (LTEM) layer, a low EUV reflectivity (LEUVR) multilayer over the LTEM layer in a first region, a high EUV reflectivity (HEUVR) multilayer over the LTEM layer in a second region and a patterned absorption layer over the LEUVR multilayer and the HEUVR multilayer.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: September 29, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Publication number: 20150268561
    Abstract: The present disclosure provides one embodiment of a method for extreme ultraviolet lithography (EUVL) process. The method includes loading a mask to a lithography system. The mask includes defect-repaired regions and defines an integrated circuit (IC) pattern thereon. The method also includes setting an illuminator of the lithography system in an illumination mode according to the IC pattern, configuring a pupil filter in the lithography system according to the illumination mode and performing a lithography exposure process to a target with the mask and the pupil filter by the lithography system in the illumination mode.
    Type: Application
    Filed: March 21, 2014
    Publication date: September 24, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: YEN-CHENG LU, SHINN-SHENG YU, JENG-HORNG CHEN, ANTHONY YEN
  • Publication number: 20150262836
    Abstract: Provided is a method of forming a pattern for an integrated circuit. The method includes forming a first layer over a substrate, wherein the first layer's etch rate is sensitive to a radiation, such as an extreme ultraviolet (EUV) radiation or an electron beam (e-beam). The method further includes forming a resist layer over the first layer and exposing the resist layer to the radiation for patterning. During the exposure, various portions of the first layer change their etch rate in response to an energy dose of the radiation received therein. The method further includes developing the resist layer, etching the first layer, and etching the substrate to form a pattern. The radiation-sensitivity of the first layer serves to reduce critical dimension variance of the pattern.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 17, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: YEN-CHENG LU, SHU-HAO CHANG, SHINN-SHENG YU, JUI-CHING WU, JENG-HORNG CHEN, ANTHONY YEN
  • Patent number: 9122166
    Abstract: An extreme ultraviolet lithography (EUVL) process is disclosed. The process comprises receiving a mask. The mask includes a low thermal expansion material (LTEM) substrate, a reflective multilayer (ML) over one surface of the LTEM substrate, a first region having a phase-shifting layer over the reflective ML, and a second region having no phase-shifting layer over the reflective ML. The EUVL process also comprises exposing the mask by a nearly on-axis illumination with partial coherence less than 0.3 to produce diffracted light and non-diffracted light, removing at least a portion of the non-diffracted light, and collecting and directing the diffracted light and the not removed non-diffracted light by a projection optics box (POB) to expose a target.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: September 1, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9116435
    Abstract: An EUV mask includes a low thermal expansion material (LTEM) substrate, a reflective multilayer (ML) above one surface of the LTEM substrate, and a conductive layer above an opposite surface of the LTEM substrate. A capping layer is provided above the reflective ML, a buffer layer is provided above the capping layer, and an absorption stack is provided above the buffer layer. The absorption stack comprises multiple layers. A multiple patterning process is performed on the absorption stack to form multiple reflective states.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: August 25, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shinn-Sheng Yu, Yen-Cheng Lu, Anthony Yen
  • Publication number: 20150227059
    Abstract: An extreme ultraviolet lithography (EUVL) process is performed on a target, such as a semiconductor wafer, having a photosensitive layer. The method includes providing a one-dimensional patterned mask along a first direction. The patterned mask includes a substrate including a first region and a second region, a multilayer mirror above the first and second regions, an absorption layer above the multilayer mirror in the second region, and a defect in the first region. The method further includes exposing the patterned mask by an illuminator and setting the patterned mask and the target in relative motion along the first direction while exposing the patterned mask. As a result, an accumulated exposure dose received by the target is an optimized exposure dose.
    Type: Application
    Filed: April 21, 2015
    Publication date: August 13, 2015
    Inventors: YEN-CHENG LU, SHINN-SHENG YU, JENG-HORNG CHEN, ANTHONY YEN