Patents by Inventor Yi Feng

Yi Feng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11953774
    Abstract: A display substrate includes: a base substrate (100); a plurality of sub-pixels (R, G, B) located on the base substrate (100), every two rows of sub-pixels (R, G, B) constituting a pixel group; a plurality of first gate lines (Gate1) located at first row gaps between the pixel groups, two first gate lines (Gate1) being arranged at each first row gap; and a plurality of photosensors (101), the orthographic projection of each row of photosensors (101) on the base substrate (100) completely covering a second row gap in the pixel group and partially overlapping with the orthographic projections of the sub-pixels (R, G, B), thereby avoiding the bright and dark difference between adjacent rows and ensuring the aperture ratio.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: April 9, 2024
    Assignees: Beijing BOE Display Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xinlan Yang, Wenkai Mu, Yi Liu, Jun Fan, Bo Feng, Yang Wang, Zhan Wei, Tengfei Ding, Shijun Wang, Chengfu Xu
  • Patent number: 11955460
    Abstract: In accordance with some embodiments, a package-on-package (PoP) structure includes a first semiconductor package having a first side and a second side opposing the first side, a second semiconductor package having a first side and a second side opposing the first side, and a plurality of inter-package connector coupled between the first side of the first semiconductor package and the first side of the second semiconductor package. The PoP structure further includes a first molding material on the second side of the first semiconductor package. The second side of the second semiconductor package is substantially free of the first molding material.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Da Tsai, Meng-Tse Chen, Sheng-Feng Weng, Sheng-Hsiang Chiu, Wei-Hung Lin, Ming-Da Cheng, Ching-Hua Hsieh, Chung-Shi Liu
  • Publication number: 20240113032
    Abstract: Interconnect structure packages (e.g., through silicon vias (TSV) packages, through interlayer via (TIV) packages) may be pre-manufactured as opposed to forming TIVs directly on a carrier substrate during a manufacturing process for a semiconductor die package at backend packaging facility. The interconnect structure packages may be placed onto a carrier substrate during manufacturing of a semiconductor device package, and a semiconductor die package may be placed on the carrier substrate adjacent to the interconnect structure packages. A molding compound layer may be formed around and in between the interconnect structure packages and the semiconductor die package.
    Type: Application
    Filed: April 25, 2023
    Publication date: April 4, 2024
    Inventors: Kai-Fung CHANG, Chin-Wei LIANG, Sheng-Feng WENG, Ming-Yu YEN, Cheyu LIU, Hung-Chih CHEN, Yi-Yang LEI, Ching-Hua HSIEH
  • Publication number: 20240113140
    Abstract: A ridge recognition substrate and a ridge recognition apparatus. The ridge recognition substrate includes: a base substrate including a photosensitive area, and a light-shielding area located on at least one side of the photosensitive area; a plurality of photosensitive devices, arranged in the photosensitive area in an array; each photosensitive device includes a first electrode, a photoelectric conversion structure and a second electrode arranged in layers, the photoelectric conversion structure is electrically connected with the first electrode, and the photoelectric conversion structure directly contacts with the second electrode; and dummy devices, arranged in the light-shielding area in an array, each dummy device including a third electrode, an equivalent dielectric layer and a fourth electrode, the third electrode and the first electrode is in the same layer, the fourth electrode is located at the side of the layer where the second electrode is located facing away from the base substrate.
    Type: Application
    Filed: May 26, 2021
    Publication date: April 4, 2024
    Inventors: Yajie FENG, Cheng LI, Yue GENG, Kuiyuan WANG, Zhonghuan LI, Yi DAI, Chaoyang QI, Zefei LI, Congcong XI, Xiaoguan LI
  • Publication number: 20240113044
    Abstract: A semiconductor device includes a substrate and a metallization layer. The substrate has an active region that includes opposite first and second edges. The metallization layer is disposed above the substrate, and includes a pair of metal lines and a metal plate. The metal lines extend from an outer periphery of the active region into the active region and toward the second edge of the active region. The metal plate interconnects the metal lines and at least a portion of which is disposed at the outer periphery of the active region.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 4, 2024
    Inventor: Yi-Feng Chang
  • Patent number: 11945271
    Abstract: A rigid-flexible coupling multi-degree-of-freedom walking position-adjusting leg unit and a hybrid robot platform thereof is provided and includes a vertical rigid-flexible coupling multi-degree-of-freedom walking position-adjusting leg unit and a horizontal rigid-flexible coupling multi-degree-of-freedom walking position-adjusting leg unit, which both include a moving device, a moving drive, a steering frame, a lifting frame, a spring device and a driving differential wheel set, in combination with a frame, a driver set, a battery pack and a control box, forming a multi-degree-of-freedom parallel mechanism platform. The hybrid robot platform including the rigid-flexible coupling multi-degree-of-freedom walking position-adjusting leg unit as provided by the present disclosure has functions of a rigid position adjustment, an elastic suspension and a rigid-flexible coupling position adjustment, and can automatically adapt to a working condition of the uneven ground.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: April 2, 2024
    Assignee: YANSHAN UNIVERSITY
    Inventors: Yulin Zhou, Shuyang Shi, Lihui Zhao, Xuesong Qiu, Zongqiang Feng, Yi Liu
  • Patent number: 11947634
    Abstract: An image object classification method and system are disclosed. The method is executed by a processor coupled to a memory. The method includes: providing an image file including at least one image object, performing a process of extracting multiple binary-classified characteristics on the image object to obtain a plurality of first results independent of each other in categories, combining the plurality of first results in a manner of dimensionality reduction based on concatenation, performing a process of characteristics abstraction on the combined first results to obtain a second result, and performing a process of characteristics integration on the plurality of first results and the second result in a manner of dot product of matrices to obtain a classification result.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: April 2, 2024
    Assignee: Footprintku Inc.
    Inventors: Yan-Jhih Wang, Kuan-Hsiang Tseng, Jun-Qiang Wei, Shih-Feng Huang, Tzung-Pei Hong, Yi-Ting Chen
  • Patent number: 11945282
    Abstract: A gas detection and cleaning system for a vehicle is disclosed and includes an external modular base, a gas detection module and a cleaning device. The gas detection module is connected to a first external connection port of the external modular base to detect a gas in the vehicle and output the information datum. The information datum is transmitted through the first external connection port to a driving and controlling module of the external modular base, processed and converted into an actuation information datum for being externally outputted through a second external connection port of the external modular base. The cleaning device is connected with the second external connection port through an external port to receive the actuation information datum outputted from the second external connection port to actuate or close the cleaning device.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: April 2, 2024
    Assignee: MICROJET TECHNOLOGY CO., LTD.
    Inventors: Hao-Jan Mou, Yung-Lung Han, Chi-Feng Huang, Chin-Wen Hsieh, Tsung-I Lin, Yang Ku, Yi-Ting Lu
  • Publication number: 20240104943
    Abstract: A method for detecting an interior condition of a vehicle is provided to use a camera device and a radar device to acquire images and point cloud datasets with respect to an interior space of the vehicle. A computing device generates a synthesized image based on the images and the point cloud datasets, obtains a skeleton feature dataset and a facial feature dataset with respect to a living object in the synthesized image, and determines the interior condition of the vehicle based on the skeleton feature dataset and the facial feature dataset.
    Type: Application
    Filed: December 15, 2022
    Publication date: March 28, 2024
    Applicant: Automotive Research & Testing Center
    Inventors: Yi-Feng SU, Zi-Rong DING, Meng-Jiang HE
  • Publication number: 20240107396
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive information indicating a condition for a conditional handover, and an indication to communicate on a source cell after transmitting a message on a target cell, associated with the conditional handover, and before receiving an additional message on the target cell. The UE may transmit the message on the target cell responsive to the condition for the conditional handover being satisfied. Numerous other aspects are described.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 28, 2024
    Inventors: Lianghai JI, Yi HUANG, Linhai HE, Qiang WU, Jun MA, Xiao Feng WANG, Mehmet Izzet GURELLI, Weimin DUAN, Karthik ANANTHA SWAMY
  • Patent number: 11937563
    Abstract: A greenhouse comprises a support frame and a spray pipe including pipes and pipe joints, the pipe joint comprises a connecting pipe and two rotary sleeves, the two adjacent pipes are respectively inserted into the connecting pipe, ends of a first pipe are respectively sleeved with a sealing sleeve and a locking sleeve, and each of the ends of the first pipe is further sleeved with a washer. When the rotary sleeve is thread-tightened, the connecting pipe and the locking sleeve are capable of respectively abutting and pressing against two sides of the washer, under abutting and pushing of the rotary sleeve and limiting of the washer, the locking sleeve is capable of grasping the first pipe and forming an axial positioning with the rotary sleeve. An inner edge of an end surface of the connecting pipe has a sealing tapered surface capable of acting on the sealing sleeve.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: March 26, 2024
    Inventor: Yi Feng
  • Publication number: 20240097038
    Abstract: A semiconductor device, including a substrate, a first source/drain region, a second source/drain region, and a gate structure, is provided. The substrate has an extra body portion and a fin protruding from a top surface of the substrate, wherein the fin spans the extra body portion. The first source/drain region and the second source/drain region are in the fin. The gate structure spans the fin, is located above the extra body portion, and is located between the first source/drain region and the second source/drain region.
    Type: Application
    Filed: October 13, 2022
    Publication date: March 21, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Yi Chuen Eng, Tzu-Feng Chang, Teng-Chuan Hu, Yi-Wen Chen, Yu-Hsiang Lin
  • Publication number: 20240092897
    Abstract: The present invention relates to the field of bio-pharmaceuticals and, in particular, to an anti-Siglec-15 antibody or an antigen binding fragment thereof, a nucleic acid sequence encoding the anti-Siglec-15 antibody of the present invention or an antigen binding fragment thereof, an expression vector containing the nucleic acid sequence, a host cell containing the expression vector, a composition or a bispecific antibody comprising the anti-Siglec-15 antibody of the present invention or an antigen binding fragment thereof, an immune conjugate comprising the anti-Siglec-15 antibody of the present invention or an antigen binding fragment thereof linked to a therapeutic agent, as well as use of the anti-Siglec-15 antibody of the present invention or an antigen binding fragment thereof in the preparation of a medicament for treatment of cancer.
    Type: Application
    Filed: November 4, 2021
    Publication date: March 21, 2024
    Inventors: Ke HE, Shihua LIAO, Xu FENG, Baolan REN, Yuhan DU, Yingjiao CHEN, Liping SONG, Yi FAN
  • Patent number: 11934060
    Abstract: Provided is an array substrate. The array substrate includes: a base substrate, and a plurality of gate lines, a plurality of data lines, a plurality of sub-pixels and a plurality of touch signal lines disposed on the base substrate. The data lines have a plurality of first extending parts and a plurality of second extending parts which are in an alternating arrangement. When the array substrate is used to prepare a liquid crystal display panel and the liquid crystal display panel is displaying, in each column of the sub-pixels, the voltage polarities of the two adjacent sub-pixels which respectively belong to two adjacent first pixel regions are opposite.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: March 19, 2024
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Bo Feng, Shijun Wang, Yang Wang, Zhan Wei, Wenkai Mu, Yi Liu, Li Tian
  • Publication number: 20240088824
    Abstract: Disclosed are a composite material frame profile, solar energy module frame and it's manufacturing method thereof, where the composite material frame profile includes a profile body and a plug-in cavity that is arranged on the profile body and is configured for plug-in connection with a toothed corner connector, a corner connector plug-in part is arranged on the inner surface of the side wall of the plug-in cavity in a corner connector mounting area of the frame profile, and the corner connector plug-in part can be a plurality of bumps or bosses; the side wall of the plug-in cavity is a side wall containing a fiber fabric; and the bumps or the bosses are configured for inserting and fixing the toothed corner connector. The mechanical strength of the corner connector mounting area of the frame profile can be well enhanced through fiber fabrics, so that the mechanical strength of the bumps or the bosses is enhanced, and the quick plug-in connection with the toothed corner connector is realized.
    Type: Application
    Filed: March 13, 2022
    Publication date: March 14, 2024
    Inventors: Yi FENG, Heng HOU
  • Publication number: 20240090231
    Abstract: An integrated circuit is provided. The integrated circuit includes a three-dimensional memory device, a first word line driving circuit and a second word line driving circuit. The three-dimensional memory device includes stacking structures separately extending along a column direction. Each stacking structure includes a stack of word lines. The stacking structures have first staircase structures at a first side and second staircase structures at a second side. The word lines extend to steps of the first and second staircase structures. The first and second word line driving circuits lie below the three-dimensional memory device, and extend along the first and second sides, respectively. Some of the word lines in each stacking structure are routed to the first word line driving circuit from a first staircase structure, and others of the word lines in each stacking structure are routed to the second word line driving circuit from a second staircase structure.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bo-Feng Young, Yi-Ching Liu, Sai-Hooi Yeong, Yih Wang, Yu-Ming Lin
  • Publication number: 20240088171
    Abstract: An array substrate and display device are provided. The array substrate includes a base substrate, and gate lines, data lines, compensation blocks and sub-pixels located on the base substrate. Two gate lines are arranged between two adjacent rows of sub-pixels. The data lines are provided with multiple first extensions and second extensions arranged alternately. The extending direction of the first extensions intersects with the extending direction of the second extensions.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 14, 2024
    Inventors: Wenkai MU, Shijun WANG, Yi LIU, Bo FENG, Yang WANG, Zhan WEI, Li TIAN
  • Publication number: 20240079524
    Abstract: A semiconductor device comprises a first semiconductor structure, a second semiconductor structure located on the first semiconductor structure, and an active layer located between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure has a first conductivity type, and includes a plurality of first layers and a plurality of second layers alternately stacked. The second semiconductor structure has a second conductivity type opposite to the first conductivity type. The plurality of first layers and the plurality of second layers include indium and phosphorus, and the plurality of first layers and the plurality of second layers respectively have a first indium atomic percentage and a second indium atomic percentage. The second indium atomic percentage is different from the first indium atomic percentage.
    Type: Application
    Filed: September 6, 2023
    Publication date: March 7, 2024
    Inventors: Wei-Jen HSUEH, Shih-Chang LEE, Kuo-Feng HUANG, Wen-Luh LIAO, Jiong-Chaso SU, Yi-Chieh LIN, Hsuan-Le LIN
  • Publication number: 20240079408
    Abstract: A method includes the following operations: disconnecting at least one of drain regions that are formed on a first active area, of first transistors, from a first voltage; and disconnecting at least one of drain regions that are formed on a second active area, of second transistors coupled to the first transistors from a second voltage. The at least one of drain regions of the second transistors corresponds to the at least one of drain regions of the first transistors.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Feng CHANG, Po-Lin PENG, Jam-Wem LEE
  • Publication number: 20240075732
    Abstract: In a peeling system and a peeling method for a flexible fingerprint component provided by the present invention, the flexible fingerprint component is formed on a rigid substrate, and the flexible fingerprint component comprises a flexible substrate, a photosensitive device layer and an optical film sequentially arranged on the flexible substrate, a first chip-on film bonded to the photosensitive device layer on a first side of the optical film, and a second chip-on film bonded to the photosensitive device layer on a second side of the optical film, wherein the optical film is provided with an extension portion beyond the flexible substrate, the second side of the optical film is located on a side opposite to the extension portion, and the first side of the optical film is located on a side adjacent to the extension portion.
    Type: Application
    Filed: February 23, 2021
    Publication date: March 7, 2024
    Inventors: Yi DAI, Cheng LI, Yue GENG, Kuiyuan WANG, Chaoyang QI, Zefei LI, Yajie FENG, Xiaoguan LI, Zhonghuan LI