Abstract: A memory apparatus and method of operation is provided. The apparatus includes memory cells each connected to one of a plurality of word lines. The memory cells are disposed in strings coupled to one of a plurality of bit lines and are configured to retain a threshold voltage corresponding to one of a plurality of data states. A control means is configured to read each of the memory cells in a read operation. For each one of the memory cells, the control means is also configured to offset at least one of a bit line settling time and a kick voltage during the read operation based on a probability of at least one neighboring one of the plurality of bit lines being coupled to the memory cells retaining the threshold voltage corresponding to a different one of the plurality of data states than the one of the memory cells.

Abstract: A non-volatile memory system limits the amount of programming for a first type of group of non-volatile memory cells based on a first parameter such that a maximum number of programming pulses applied to the first type of group of non-volatile memory cells to program to the last data state after the first type of group of non-volatile memory cells completed programming to the other data states is X programming pulses. The non-volatile memory system limits the amount of programming for a second type of group of the non-volatile memory cells based on a second parameter such that a maximum number of programming pulses applied to the second type of group of non-volatile memory cells to program to the last data state after the second type of group of non-volatile memory cells completed programming to the other data states is Y programming pulses.

Abstract: Discussed are a metal plate for resistance welding and a resistance welding method using the same, wherein the metal plate is for being resistance-welded to an electrode terminal of a cylindrical battery, and the metal plate includes a body; and a pair of protrusion units located spaced apart from each other by a predetermined distance, the pair of protrusion unit being provided at one side surface of the body, and a slit is formed between the pair of protrusion units.

Abstract: A memory system reads data from non-volatile memory cells using a set of read compare voltages to determine which data state the memory cells are in, where each data state is associated with predetermined data values. The read compare voltages are determined dynamically based on a difference between memory cell current at time of programming and memory cell current at time of reading.

Abstract: In order to decrease the width of threshold voltage distributions of programmed memory cells without unreasonably increasing the time needed to complete programming, a non-volatile memory uses a zone based program speed adjustment. The non-volatile memory starts programming a first set of the non-volatile memory cells until a minimum number of memory cells of the first set of non-volatile memory cells reach a first threshold voltage. In response to the minimum number of memory cells reaching the first threshold voltage, the first set of non-volatile memory cells are categorized into zones/groups based on threshold voltage. The speed of programming is then adjusted differently for each zone/group and programming is completed for the first set of non-volatile memory cells.

Abstract: A system has been described that performs differential temperature compensation based on a differential between the temperature at time of programming and temperature at time of reading for a set of data. Differential temperature compensation is useful for bulk programming/reading (e.g., many pages of data) and/or programming/reading super pages of data (multiple pages residing on different memory die).

Abstract: A memory system identifies memory cells connected to a common word line that have had their threshold voltage unintentionally drift lower than programmed by determining whether memory cells meet two criteria: (1) the memory cells have threshold voltages within an offset of a read compare voltage of a data state; and (2) adjacent memory cells (connected to word lines that are adjacent to the common word line) are in one or more low data states. For those memory cells meeting the two criteria, the memory system performs some amount of programming on the memory cells to refresh the data stored in those memory cells to be as originally intended.

Abstract: A system has been described that performs differential temperature compensation based on a differential between the temperature at time of programming and temperature at time of reading for a set of data. Differential temperature compensation is useful for bulk programming/reading (e.g., many pages of data) and/or programming/reading super pages of data (multiple pages residing on different memory die).

Abstract: A nanosheet device is provided that has high quality epitaxially grown source/drain regions and reduced parasitic capacitance which are afforded by forming an air gap between an epitaxially grown source/drain region and a semiconductor substrate. The isolation provided by the air gap does not need to extend beneath the channel region of the nanosheet device.

Abstract: A semiconductor structure comprises a plurality of gate structures alternately stacked with a plurality of channel layers, and a plurality of spacers disposed on lateral sides of the plurality gate structures. The respective ones of the plurality of spacers comprise a profile having a first portion comprising a first shape and a second portion comprising a second shape, wherein the first shape is different from the second shape.

Abstract: VFET devices having a porous bottom air spacer formed by oxidation are provided. In one aspect, a VFET device includes: at least one fin present on a substrate, wherein the at least one fin serves as a vertical fin channel of the VFET device; a bottom source/drain region at a base of the at least one fin; a bottom air-containing spacer disposed on the bottom source/drain region; a gate stack alongside the at least one fin; a top spacer above the gate stack at a top of the at least one fin; and a top source/drain region at a top of the at least one fin. A method of forming a VFET device is also provided.

Abstract: Disclosed is a generator device using potential energy, relating to the field of new technologies. The generator device using potential energy includes a ball buoy and connecting rods, the ball buoy includes a casing, flywheels, a transmission gear and generators, the flywheel, the transmission gear and the generators are located inside the casing. A generator gear is provided on a rotary shaft of each of the generators, the transmission gear is provided with external teeth and internal teeth, and the generator gear is engaged with the internal teeth, and the flywheels are engaged with the external teeth. The connecting rods are each connected with one of the flywheels inside the casing through a rotating shaft arranged on the casing, and the flywheels are driven to rotate in one direction by the connecting rods through the rotating shaft.

Abstract: Disclosed is a generator device using potential energy, relating to the field of new technologies. The generator device using potential energy includes a ball buoy and connecting rods, the ball buoy includes a casing, flywheels, a transmission gear and generators, the flywheel, the transmission gear and the generators are located inside the casing. A generator gear is provided on a rotary shaft of each of the generators, the transmission gear is provided with external teeth and internal teeth, and the generator gear is engaged with the internal teeth, and the flywheels are engaged with the external teeth. The connecting rods are each connected with one of the flywheels inside the casing through a rotating shaft arranged on the casing, and the flywheels are driven to rotate in one direction by the connecting rods through the rotating shaft.

Abstract: Semiconductor devices and methods of forming the same include forming slanted dielectric structures from a first dielectric material on a substrate, with gaps between adjacent slanted dielectric structures. A first semiconductor layer is grown from the substrate, using a first semiconductor material, including a lower portion that fills the gaps and an upper portion above the first dielectric material. The lower portion of the first semiconductor layer is replaced with additional dielectric material.

Abstract: Described herein is a system with a first network element and a second network element. The first network element contains a processor configured to synchronize with the second network element; and maintain synchronization with the second network element. The first network element is a small cell eNB and the second network element is one of the following: a macro cell enhanced node-B (eNB); or a small cell eNB.

Abstract: A system comprises an apparatus having a nozzle. An element is arranged around the apparatus. A feeder is configured to supply a powder of a material into the apparatus. A gas source is configured to supply a precursor gas into the apparatus and to supply an inert gas to circulate through a space between the element and the apparatus and to exit around the nozzle. A plasma generator is arranged in the apparatus and is configured to ionize the precursor gas and atomize the powder and to eject through the nozzle a jet of particles composed of the atomized powder and the ionized precursor gas onto a substrate arranged adjacent to the nozzle.

Abstract: In a fully dense printing method, a plurality of buffer layers of silicon are initially printed on a steel substrate, and then layers of silicon for the actual component are printed on top of the buffer layers using a double printing method. In a fully dense and crack free printing method, one or more heaters and thermal insulation are used to minimize temperature gradient during Si printing, in-situ annealing, and cooling.

Abstract: A memory apparatus and method of operation is provided. The apparatus includes a block of memory cells. Each of the memory cells is connected to one of a plurality of word lines and arranged in strings. Each of the memory cells is also configured to retain a threshold voltage corresponding to one of a plurality of data states and be erased in an erase operation. A control circuit is coupled to the word lines and the strings and is configured to identify ones of the strings having a faster relative erase speed compared to others of the strings. During the erase operation, the control circuit raises the threshold voltage of the memory cells associated with the ones of the strings having the faster relative erase speed while not raising the threshold voltage of the memory cells associated with the others of the strings.

Abstract: An image processing method includes determining, based on a coordinate position of a to-be-interpolated sample in a target image, a first coordinate position of the to-be-interpolated sample in a source image, determining m reference samples based on the first coordinate position, determining an interpolation weight of each of the m reference samples for the to-be-interpolated sample based on a spherical distance between a coordinate position of each of the m reference samples and the first coordinate position, and determining a pixel value of the to-be-interpolated sample based on a pixel value corresponding to each of the m reference samples and the interpolation weight of each of the m reference samples for the to-be-interpolated sample to obtain the target image.

Abstract: The intelligent accompaniment generating system includes an input module, an analysis module, a generation module and a musical equipment. The input module is configured to receive a musical pattern signal derived from a raw signal. The analysis module is configured to analyze the musical pattern signal to extract a set of audio features, wherein the input module is configured to transmit the musical pattern signal to the analysis module. The generation module is configured to obtain a playing assistance information having an accompaniment pattern from the analysis module, wherein the accompaniment pattern has at least two parts having different onsets therebetween, and each onsets of the at least two parts is generated by an algorithm according to the set of audio features. The musical equipment includes a digital amplifier configured to output an accompaniment signal according to the accompaniment pattern.