Patents by Inventor Yoshifumi Yoshida

Yoshifumi Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110193643
    Abstract: Provided is a method of manufacturing a package capable of providing a plurality of through-electrodes in a base substrate made of a glass material with high position precision. An electrode member having a plurality of pins erected on a base is prepared, the plurality of pins is inserted into a plurality of through-holes of a glass substrate provided with the plurality of through-holes, the resultant is heated to a temperature higher than the softening point of the glass substrate to weld the corresponding through-holes and the pins to each other, the glass substrate is ground after cooling to remove the base, and the pins are exposed from both surfaces of the glass substrate, thereby forming through-electrodes which are electrically separated from each other.
    Type: Application
    Filed: February 4, 2011
    Publication date: August 11, 2011
    Inventors: Yoshihisa Tange, Yoshifumi Yoshida
  • Publication number: 20110163638
    Abstract: A package manufacturing method capable of easily manufacturing a penetration electrode-attached base board having excellent shape accuracy with a high degree of flatness without forming cracks or the like is provided. The package manufacturing method includes an insertion hole forming step of forming insertion holes in one surface of a base board wafer so as not to penetrate through the base board wafer; a core portion insertion step of inserting conductive core portions made of a metal material into the insertion holes; a welding step of heating the base board wafer to a temperature higher than the softening point of the glass material so as to weld the base board wafer to the core portions while holding the one surface side of the base board wafer with a receiving mold and pressing the other surface of the base board wafer with a flat pressurizing mold; a cooling step of cooling the base board wafer; and a polishing step of polishing both surfaces of the base board wafer.
    Type: Application
    Filed: January 4, 2011
    Publication date: July 7, 2011
    Inventor: Yoshifumi Yoshida
  • Publication number: 20110140571
    Abstract: There is provided a package manufacturing method capable of manufacturing high-quality and high-accuracy products without requiring complicated processes. A method for manufacturing a package including a base board and a lid board bonded to each other so as to form a cavity at an inner side and penetration electrodes that electrically connect the inside of the cavity to the outside of a base board made of a glass material includes a penetration hole forming step of forming penetration holes in a base board wafer; a rivet member insertion step of inserting conductive rivet members made of a metal material into the penetration holes; a welding step of heating the base board wafer to a temperature higher than the softening point of the glass material so as to weld the base board wafer to the rivet members; and a cooling step of cooling the base board wafer.
    Type: Application
    Filed: December 8, 2010
    Publication date: June 16, 2011
    Inventors: Yoshihisa Tange, Yoshifumi Yoshida
  • Publication number: 20110127621
    Abstract: A silicon oxide film 113 is formed on the vibrating parts 102 and 103 of an MEMS-type electrostatically-actuated flexural vibrator. At least one structure where no oxide film is formed is provided near the vibrating parts 102 and 103. By employing a structure in which both ends of the structure and both ends of the vibrating parts 102 and 103 are integrally formed, a compressive stress is applied to the vibrating parts 102 and 103. As a result, the frequency temperature characteristics can be improved.
    Type: Application
    Filed: June 23, 2009
    Publication date: June 2, 2011
    Inventors: Fumio Kimura, Ryohei Kamiya, Hiroshi Takahashi, Ryuta Mitsusue, Yoshifumi Yoshida
  • Publication number: 20110074515
    Abstract: Provided is a piezoelectric resonator having a structure in which the piezoelectric resonator chip is mounted on a silicon substrate without deteriorating a characteristic. The piezoelectric resonator includes a silicon substrate (2), a metal film (3) formed on a front surface of the silicon substrate (2), a pair of mount electrodes (5, 6) formed on the metal film (3), and an AT-cut type piezoelectric resonator chip (7) that is bump-bonded to the pair of mount electrodes (5, 6) to be supported. A linear expansion coefficient of the metal film (3) is 13×10?6 per degrees centigrade or larger, and a product of the linear expansion coefficient and a Young's modulus of the metal film (3) is 1.95 MPa per degrees centigrade or larger.
    Type: Application
    Filed: September 27, 2010
    Publication date: March 31, 2011
    Inventor: Yoshifumi Yoshida
  • Patent number: 7816212
    Abstract: A high voltage operating field effect transistor has a substrate and a semiconductor channel formation region disposed in a surface of the substrate. A source region and a drain region are spaced apart from each other with the semiconductor channel formation region disposed between the source region and the drain region. A gate insulating film region is disposed on the semiconductor channel formation region. A resistive gate region is disposed on the gate insulating film region. A source side electrode is disposed on a source region side of the resistive gate region and is operative to receive a signal electric potential. A drain side electrode is disposed on a drain region side of the resistive gate region and is operative to receive a bias electric potential an absolute value of which is equal to or larger than that of a specified electric potential and which changes according to an increase or decrease in a drain electric potential.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: October 19, 2010
    Assignees: Seiko Instruments Inc.
    Inventors: Yutaka Hayashi, Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai
  • Patent number: 7671710
    Abstract: Provided is an oscillator including: a MEMS resonator for mechanically vibrating; an output oscillator circuit for oscillating at a resonance frequency of the MEMS resonator to output an oscillation signal; and a MEMS capacitor for changing a capacitance thereof caused by a change in a distance between an anode electrode and a cathode beam according to an environmental temperature.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: March 2, 2010
    Assignee: Seiko Instruments Inc.
    Inventors: Yoshifumi Yoshida, Fumio Kimura
  • Patent number: 7586160
    Abstract: A semiconductor integrated circuit is provided in which a CMOS transistor is formed on a first conductivity type semiconductor film provided on a first conductivity type supporting substrate through an embedded insulating film. Second conductivity type source and drain regions are formed in the semiconductor film. The source region has an ultra-shallow high-density second conductivity type source extension region at a boundary with a channel region, a low-density second conductivity type source extension region under the ultra-shallow high-density second conductivity type source extension region, and a high-density second conductivity type source extension region under the low-density second conductivity type source extension region.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: September 8, 2009
    Assignee: Seiko Instuments Inc.
    Inventors: Miwa Wake, Yoshifumi Yoshida
  • Patent number: 7545018
    Abstract: A high voltage operating field effect transistor has a substrate, a source region and a drain region which are spaced apart from each other in a surface of the substrate, a semiconductor channel formation region disposed in the surface of the substrate between the source region and the drain region, a gate region disposed above the channel formation region, and a gate insulating film region disposed between the channel formation region and the gate region. At least one of a signal electric potential and a signal current is supplied to the source region, and a bias electric potential having an absolute value equal to or larger than a first constant electric potential which changes according to an increase or decrease in a drain electric potential is supplied to the gate region. One end of a rectifying device is connected to the gate region, and a second constant electric potential is supplied to the other end of the rectifying device.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: June 9, 2009
    Assignees: Seiko Instruments Inc.
    Inventors: Yutaka Hayashi, Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai
  • Patent number: 7508248
    Abstract: Provided is an electronic device capable of completely interrupting a power source and an electronic circuit when the electronic circuit is not being operated, and reducing power consumed wastefully. In the electronic device including the power source, a switch, and the electronic circuit, the power source and the electronic circuit are electrically interrupted by the switch when the electronic circuit is not being operated. The electronic device further includes a power generation source for converting environmental energy into electric energy, and a switch control circuit driven by the power generation source.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: March 24, 2009
    Assignee: Seiko Instruments Inc.
    Inventor: Yoshifumi Yoshida
  • Publication number: 20090014816
    Abstract: A high voltage operating field effect transistor has a substrate and a semiconductor channel formation region disposed in a surface of the substrate. A source region and a drain region are spaced apart from each other with the semiconductor channel formation region disposed between the source region and the drain region. A gate insulating film region is disposed on the semiconductor channel formation region. A resistive gate region is disposed on the gate insulating film region. A source side electrode is disposed on a source region side of the resistive gate region and is operative to receive a signal electric potential. A drain side electrode is disposed on a drain region side of the resistive gate region and is operative to receive a bias electric potential an absolute value of which is equal to or larger than that of a specified electric potential and which changes according to an increase or decrease in a drain electric potential.
    Type: Application
    Filed: September 12, 2008
    Publication date: January 15, 2009
    Inventors: Yutaka Hayashi, Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai
  • Publication number: 20090014765
    Abstract: A high voltage operating field effect transistor has a source region and a drain region spaced apart from each other in a surface of a substrate. The source region is operative to receive at least one of a signal electric potential and a signal current. A semiconductor channel formation region is disposed in the surface of the substrate between the source region and the drain region. A gate region is disposed above the channel formation region and is operative to receive a bias electric potential having an absolute value equal to or larger than a first constant electric potential which changes according to an increase or decrease in a drain electric potential. A gate insulating film region is disposed between the channel formation region and the gate region.
    Type: Application
    Filed: September 12, 2008
    Publication date: January 15, 2009
    Inventors: Yutaka Hayashi, Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai
  • Patent number: 7456903
    Abstract: A video signal processing circuit is supplied with an analog composite video signal formed by combining at least a luminance signal with a sync signal, and processes the analog composite video signal. The video signal processing circuit has an analog filter which removes high-frequency components from the analog composite video signal, a sync separation circuit which separates a sync signal from an output signal from the analog filter, an AD converter which performs AD conversion on the analog composite video signal, and a digital video signal processing circuit which performs predetermined video signal processing on the composite video signal digitized by the AD converter, by using the sync signal obtained by the sync separation circuit.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: November 25, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Ikuo Osawa, Yoshifumi Yoshida, Hiroyuki Ebinuma, Toru Okada
  • Patent number: 7432568
    Abstract: A high voltage operating field effect transistor has a substrate, a semiconductor channel formation region disposed in a surface of the substrate, a source region and a drain region which are spaced apart from each other with the semiconductor channel formation region disposed between the source region and the drain region, a gate insulating film region disposed on the semiconductor channel formation region, a resistive gate region disposed on the gate insulating film region, a source side electrode disposed on a source region end portion side of the resistive gate region, and a drain side electrode disposed on a drain region end portion side of the resistive gate region. A signal electric potential is supplied to the source side electrode, and a bias electric potential an absolute value of which is equal to or larger than that of a specified electric potential and which changes according to an increase or decrease in a drain electric potential is supplied to the drain side electrode.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: October 7, 2008
    Assignees: Seiko Instruments Inc.
    Inventors: Yutaka Hayashi, Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai
  • Publication number: 20080204153
    Abstract: Provided is an oscillator including: a MEMS resonator for mechanically vibrating; an output oscillator circuit for oscillating at a resonance frequency of the MEMS resonator to output an oscillation signal; and a MEMS capacitor for changing a capacitance thereof caused by a change in a distance between an anode electrode and a cathode beam according to an environmental temperature.
    Type: Application
    Filed: February 26, 2008
    Publication date: August 28, 2008
    Inventors: Yoshifumi Yoshida, Fumio Kimura
  • Patent number: 7405612
    Abstract: A Provided is an electronic device in which: alternating current power from an RF coil which receives an electromagnetic wave and converts the electromagnetic wave into power is rectified by a diode and a first capacitor; the power is stepped up by a charge pump type step-up circuit; the power stepped up by the step-up circuit is stored in a second capacitor by a charging and discharging circuit; and the stored power is supplied from the charging and discharging circuit to an RF transmission circuit.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: July 29, 2008
    Assignee: Seiko Instruments Inc.
    Inventors: Yukimasa Minami, Yoshifumi Yoshida, Fumiyasu Utsunomiya
  • Patent number: 7355656
    Abstract: A video signal processing device is provided comprising an input level detecting circuit for detecting an amplitude of a video signal to be processed and an analog/digital converter for performing analog/digital conversion of the video signal using as a reference voltage a voltage in accordance with the amplitude of the video signal detected by the input level detecting circuit.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: April 8, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Yoshifumi Yoshida
  • Publication number: 20070254426
    Abstract: Conventionally, when an electric potential of a supporting substrate is fixed, there arises a problem in that impact ions are generated even in the vicinity of embedded insulating film in the proximity of a drain due to generation of a parasitic transistor using the supporting substrate as a gate so as to be likely to cause a parasitic bipolar operation.
    Type: Application
    Filed: June 26, 2007
    Publication date: November 1, 2007
    Inventors: Miwa Wake, Yoshifumi Yoshida
  • Patent number: 7253048
    Abstract: A semiconductor integrated circuit has a CMOS transistor formed on a first conductivity type semiconductor film provided on a first conductivity type supporting substrate through an embedded insulating film. Thermal oxidation is conducted to form a LOCOS for element separation between transistors in the semiconductor film. A gate oxide film of a second conductivity type transistor is formed over the insulating film. A first conductivity type impurity region is formed between the gate oxide film and the embedded insulating film in a region where the second conductivity type transistor is to be formed. A first conductivity type impurity region having a higher density than that of the first conductivity type impurity region is formed in a middle depth portion of the semiconductor film serving as the proximal region to a drain in the first conductivity type impurity region.
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: August 7, 2007
    Assignee: Seiko Instruments Inc.
    Inventors: Miwa Wake, Yoshifumi Yoshida
  • Patent number: RE42223
    Abstract: Conventionally, when an electric potential of a supporting substrate is fixed, there arises a problem in that impact ions are generated even in the vicinity of embedded insulating film in the proximity of a drain due to generation of a parasitic transistor using the supporting substrate as a gate so as to be likely to cause a parasitic bipolar operation.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: March 15, 2011
    Assignee: Seiko Instruments Inc.
    Inventors: Miwa Wake, Yoshifumi Yoshida