Patents by Inventor Yoshifumi Yoshida

Yoshifumi Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070102517
    Abstract: A Provided is an electronic device in which: alternating current power from an RF coil which receives an electromagnetic wave and converts the electromagnetic wave into power is rectified by a diode and a first capacitor; the power is stepped up by a charge pump type step-up circuit; the power stepped up by the step-up circuit is stored in a second capacitor by a charging and discharging circuit; and the stored power is supplied from the charging and discharging circuit to an RF transmission circuit.
    Type: Application
    Filed: August 3, 2006
    Publication date: May 10, 2007
    Inventors: Yukimasa Minami, Yoshifumi Yoshida, Fumiyasu Utsunomiya
  • Patent number: 7211867
    Abstract: A memory cell which is formed on a fully depleted SOI or other semiconductor thin film and which operates at low voltage without needing a conventional large capacitor is provided as well as a memory cell array. The semiconductor thin film is sandwiched between first and second semiconductor regions which face each other across the semiconductor thin film and which have a first conductivity type. A third semiconductor region having the opposite conductivity type is provided in an extended portion of the semiconductor thin film. From the third semiconductor region, carriers of the opposite conductivity type are supplied to and accumulated in the semiconductor thin film portion to change the gate threshold voltage of a first conductivity type channel that is induced by a first conductive gate voltage in the semiconductor thin film between the first and second semiconductor regions through an insulating film.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: May 1, 2007
    Assignees: Seiko Instruments Inc., Yutaka Hayashi
    Inventors: Yutaka Hayashi, Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai
  • Patent number: 7190032
    Abstract: An insulated gate transistor has a semiconductor thin film having a first main surface and a second main surface, a first gate insulating film formed on the first main surface of the semiconductor thin film, a first conductive gate formed on the first gate insulating film, first and second confronting semiconductor regions of a first conductivity type insulated from the first conductive gate and disposed in contact with the semiconductor thin film, and a third semiconductor region of a second conductivity type opposite to the first conductivity type disposed in contact with the semiconductor thin film. A gate threshold voltage of the first conductive gate is controlled by a forward bias of the third semiconductor region with respect to one of the first and second semiconductor regions.
    Type: Grant
    Filed: May 3, 2005
    Date of Patent: March 13, 2007
    Assignees: Seiko Instruments Inc.
    Inventors: Yutaka Hayashi, Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai
  • Publication number: 20070029883
    Abstract: Provided is an electronic device capable of completely interrupting a power source and an electronic circuit when the electronic circuit is not being operated, and reducing power consumed wastefully. In the electronic device including the power source, a switch, and the electronic circuit, the power source and the electronic circuit are electrically interrupted by the switch when the electronic circuit is not being operated. The electronic device further includes a power generation source for converting environmental energy into electric energy, and a switch control circuit driven by the power generation source.
    Type: Application
    Filed: July 26, 2006
    Publication date: February 8, 2007
    Inventor: Yoshifumi Yoshida
  • Publication number: 20060256592
    Abstract: Provided is an electronic device having a booster circuit, in which a booster circuit and other circuits are prevented from being damaged even when a voltage that is equal to or higher than a standard voltage is inputted. The booster circuit for boosting an input voltage and outputting the boosted voltage has an input voltage limiter circuit for regulating an upper limit of an output voltage, and a booster circuit for boosting the input voltage at a fixed magnification by using a capacitor.
    Type: Application
    Filed: April 26, 2006
    Publication date: November 16, 2006
    Inventors: Yoshifumi Yoshida, Fumiyasu Utsunomiya
  • Patent number: 7107114
    Abstract: A manufacturing system has an inspection data collecting apparatus that is capable of carrying out, upon receipt of a signal containing measurement data in different formats according to the type of inspection or a measuring instrument, processing in accordance with the signal and the format of data to create data in a certain format, and of transmitting a signal for giving an instruction to the measuring instrument in association with the format compatible with the measuring instrument. All data obtained by the inspections in all steps for manufacturing a product is accumulate as inspection data and exchanged among the steps.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: September 12, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Yoshifumi Yoshida, Koichi Kojima, Yuya Ichikawa, Atsushi Harai, Hideo Torii
  • Publication number: 20060176628
    Abstract: An ESD protection circuit with a reduced area is provided whose ESD protection device protects an internal element against ESD while ensuring sufficient. ESD strength in a power management semiconductor device having a fully depleted SOI device structure and in an analog semiconductor device. An NMOS protection transistor formed on an SOI semiconductor thin film layer is used as the ESD protection device at an output terminal of an internal element that is a fully depleted SOI CMOS formed on a semiconductor thin film layer, especially an NMOS output terminal, while an NMOS protection transistor formed on a semiconductor support substrate is used for input protection of the internal element.
    Type: Application
    Filed: February 3, 2006
    Publication date: August 10, 2006
    Inventors: Hisashi Hasegawa, Yoshifumi Yoshida
  • Publication number: 20060072040
    Abstract: A video signal processing circuit is supplied with an analog composite video signal formed by combining at least a luminance signal with a sync signal, and processes the analog composite video signal. The video signal processing circuit has an analog filter which removes high-frequency components from the analog composite video signal, a sync separation circuit which separates a sync signal from an output signal from the analog filter, an AD converter which performs AD conversion on the analog composite video signal, and a digital video signal processing circuit which performs predetermined video signal processing on the composite video signal digitized by the AD converter, by using the sync signal obtained by the sync separation circuit.
    Type: Application
    Filed: October 4, 2005
    Publication date: April 6, 2006
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Ikuo Osawa, Yoshifumi Yoshida, Hiroyuki Ebinuma, Toru Okada
  • Patent number: 6995055
    Abstract: A method of fabricating CMOS transistors of first and second conductivity types in an SOI substrate includes the steps of etching contact holes and alignment marks through the semiconductor and insulating films and into the support substrate of an SOI substrate, forming a thermal oxide film on the semiconductor layer inside the contact holes, forming back regions of the CMOS transistors in the substrate, forming a well regions of the CMOS transistors in the semiconductor film, forming a gate oxide film, gate electrodes, source regions, drain regions, and body regions, forming an interlayer insulating film, forming contacts of the source regions, drain regions, and body regions, forming openings in the interlayer insulating film over the contact holes, and forming wiring on the interlayer insulating film.
    Type: Grant
    Filed: February 7, 2003
    Date of Patent: February 7, 2006
    Assignee: Seiko Instruments Inc.
    Inventors: Yoshifumi Yoshida, Miwa Wake
  • Publication number: 20060022274
    Abstract: Provided is a structure in which a gate electrode of an MMOS transistor of a fully depleted SOT CMOS circuit formed on a semiconductor thin film has an N-type conductivity, while a gate electrode of an protection NMOS transistor as an ESD input/output protection element formed on a semiconductor support substrate has a P-type conductivity, making it possible to protect input/output terminals, especially, an output terminal of a fully depleted SOI CMOS device, which is weak against ESD noise, while ensuring a sufficient ESD breakdown strength.
    Type: Application
    Filed: July 11, 2005
    Publication date: February 2, 2006
    Inventors: Hisashi Hasegawa, Yoshifumi Yoshida
  • Patent number: 6978219
    Abstract: A measurement data collection apparatus includes at least a collection/analysis processing device having a measuring instrument interface for converting measurement data input from a measuring instrument into data of a form corresponding to measurement contents, and a measurement data collection interface for converting the data of the form corresponding to the measurement contents into measurement data of a predetermined form. The apparatus can process the results obtained from the measurement as electronic data irrespective of the measurement contents or a kind of the measuring instrument and can perform form printing or data processing such as arithmetic operations.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: December 20, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Koichi Kojima, Yoshifumi Yoshida, Yuya Ichikawa, Atsushi Hirai, Hideo Torii
  • Patent number: 6949777
    Abstract: An insulated gate transistor is comprised of a semiconductor thin film, a first gate insulating film formed on a main surface of the semiconductor thin film, a first conductive gate formed on the first gate insulating film, first and second confronting semiconductor regions of a first conductivity type insulated from the first conductive gate and disposed in contact with the semiconductor thin film, and a third semiconductor region of a second conductivity type opposite to the first conductivity type and disposed in contact with the semiconductor thin film. The insulated gate transistor is controlled by injecting carriers of the second conductivity type into the semiconductor thin film from the third semiconductor region, and thereafter applying a first electric potential to the first conductive gate to form a channel of the first conductivity type on a portion of the semiconductor thin film disposed between the first semiconductor region and the second semiconductor region.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: September 27, 2005
    Assignee: Seiko Instruments Inc.
    Inventors: Yutaka Hayashi, Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai
  • Publication number: 20050194618
    Abstract: Submitted herewith is a check in the amount of $650.00 to cover the additional fee for thirteen (13) claims in excess of twenty total. Should the check prove insufficient for any reason or should an additional fee be due, authorization is hereby given to charge any such deficiency or additional fee to our Deposit Account No. 01-0268.
    Type: Application
    Filed: May 3, 2005
    Publication date: September 8, 2005
    Inventors: Yutaka Hayashi, Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai
  • Publication number: 20050192695
    Abstract: A manufacturing system has an inspection data collecting apparatus that is capable of carrying out, upon receipt of a signal containing measurement data in different formats according to the type of inspection or a measuring instrument, processing in accordance with the signal and the format of data to create data in a certain format, and of transmitting a signal for giving an instruction to the measuring instrument in association with the format compatible with the measuring instrument. All data obtained by the inspections in all steps for manufacturing a product is accumulate as inspection data and exchanged among the steps.
    Type: Application
    Filed: April 25, 2005
    Publication date: September 1, 2005
    Inventors: Yoshifumi Yoshida, Koichi Kojima, Yuya Ichikawa, Atsushi Hirai, Hideo Torii
  • Publication number: 20050184350
    Abstract: A high voltage operating field effect transistor is formed in an IC or LSI by utilizing a constituent portion of a transistor for a standard power supply voltage of the IC or LSI or by utilizing it's process technique. In order to increase an operating voltage of a field effect transistor, a measure is taken in which a gate is provided with an electric potential distribution varying in accordance with the drain electric potential.
    Type: Application
    Filed: February 22, 2005
    Publication date: August 25, 2005
    Inventors: Yutaka Hayashi, Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai
  • Publication number: 20050184349
    Abstract: A high voltage operating field effect transistor is formed in an IC or LSI by utilizing a constituent portion of a transistor or a process technique for a standard power supply voltage of the IC or LSI. In order to increase an operating voltage of a field effect transistor, measures are taken in which a gate is divided into division gates, and electric potentials which are closer to a drain electric potential and which change according to increase or decrease in the drain electric potential are supplied to the division gates nearer a drain, respectively.
    Type: Application
    Filed: February 22, 2005
    Publication date: August 25, 2005
    Inventors: Yutaka Hayashi, Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai
  • Patent number: 6934596
    Abstract: A manufacturing system has an inspection data collecting apparatus that is capable of carrying out, upon receipt of a signal containing measurement data in different formats according to the type of inspection or a measuring instrument, processing in accordance with the signal and the format of data to create data in a certain format, and of transmitting a signal for giving an instruction to the measuring instrument in association with the format compatible with the measuring instrument. All data obtained by the inspections in all steps for manufacturing a product is accumulated as inspection data and exchanged among the steps.
    Type: Grant
    Filed: January 14, 2003
    Date of Patent: August 23, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Yoshifumi Yoshida, Koichi Kojima, Yuya Ichikawa, Atsushi Hirai, Hideo Torii
  • Publication number: 20050182580
    Abstract: A measurement data collection apparatus includes at least a collection/analysis processing device having a measuring instrument interface for converting measurement data input from a measuring instrument into data of a form corresponding to measurement contents, and a measurement data collection interface for converting the data of the form corresponding to the measurement contents into measurement data of a predetermined form. The apparatus can process the results obtained from the measurement as electronic data irrespective of the measurement contents or a kind of the measuring instrument and can perform form printing or data processing such as arithmetic operations.
    Type: Application
    Filed: April 5, 2005
    Publication date: August 18, 2005
    Inventors: Koichi Kojima, Yoshifumi Yoshida, Yuya Ichikawa, Atsushi Hirai, Hideo Torii
  • Patent number: 6892158
    Abstract: A measurement data collection apparatus includes at least a collection/analysis processing device having a measuring instrument interface for converting measurement data input from a measuring instrument into data of a form corresponding to measurement contents, and a measurement data collection interface for converting the data of the form corresponding to the measurement contents into measurement data of a predetermined form. The apparatus can process the results obtained from the measurement as electronic data irrespective of the measurement contents or a kind of the measuring instrument and can perform form printing or data processing such as arithmetic operations.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: May 10, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Koichi Kojima, Yoshifumi Yoshida, Yuya Ichikawa, Atsushi Hirai, Hideo Torii
  • Patent number: 6879502
    Abstract: A power source inverter circuit is provided which, when a feeding unit generates enough electric power, puts a load circuit into operation while storing electric power in a storage unit and, when the power feeding unit stops generating power, efficiently uses up the electric power stored in the storage unit.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: April 12, 2005
    Assignee: Seiko Instruments Inc.
    Inventors: Yoshifumi Yoshida, Fumiyasu Utsunomiya