Patents by Inventor Yoshihiro Kato

Yoshihiro Kato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11990349
    Abstract: A method for manufacturing a package substrate including an insulating layer and a wiring conductor, including: forming, on one or both sides of a core resin layer, a substrate including a peelable first metal layer that has a thickness of 1-70 ?m, a first insulating resin layer, and a second metal layer; forming a non-through hole reaching a surface of the first metal layer, performing electrolytic and/or electroless copper plating on its inner wall, and connecting the second and first metal layers; arranging a second insulating resin layer and a third metal layer and heating and pressurizing the first substrate to form a substrate; forming a non-through hole reaching a surface of the second metal layer, performing electrolytic and/or electroless copper plating on its inner wall, and connecting the second and third metal layers; peeling a third substrate; and patterning the first and third metal layers to form the wiring conductor.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: May 21, 2024
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Syunsuke Hirano, Yoshihiro Kato, Takaaki Ogashiwa
  • Publication number: 20240153773
    Abstract: A method for fabricating a semiconductor device is described that includes forming a base layer over a top layer of a substrate, the base layer includes a silicon based dielectric having a thickness less than or equal to 5 nm and greater than or equal to 0.5 nm; forming a photoresist layer over the base layer, the photoresist including a first side and an opposite second side; exposing a first portion of the photoresist layer to a pattern of extreme ultraviolet (EUV) radiation from the first side; exposing a second portion of the photoresist layer with a pattern of electron flux from the second side, the electron flux being directed into the photoresist layer from the base layer in response to the EUV radiation; developing the exposed photoresist layer to form a patterned photoresist layer; and transferring the pattern of the patterned photoresist layer to the base layer and the top layer.
    Type: Application
    Filed: January 18, 2024
    Publication date: May 9, 2024
    Inventors: Choong-Man Lee, Soo Doo Chae, Angelique Raley, Qiaowei Lou, Toshio Hasegawa, Yoshihiro Kato
  • Publication number: 20240153183
    Abstract: The present disclosure relates to an information processing device, an information processing method, and a program, by which a more realistic live stream of an event can be achieved. A display control unit displays, on a terminal, a plurality of viewpoint images captured at different viewpoints in an event, and an avatar information acquisition unit acquires avatar information about display of avatars corresponding to each of a user who is viewing the plurality of viewpoint images displayed on the terminal and other users who are viewing the plurality of viewpoint images on other terminals. The display control unit controls the display of the avatars based on the avatar information, for the viewpoint images displayed on the terminal. The present technique is applicable to, for example, smartphones.
    Type: Application
    Filed: March 26, 2021
    Publication date: May 9, 2024
    Applicant: Sony Group Corporation
    Inventors: Jiro KAWANO, Yoshihiro ASAKO, Noriyuki KATO
  • Patent number: 11970395
    Abstract: A rare earth phosphate particle containing a rare earth element A, where A is Sc, Y, La, Eu, Gd, Dy, Yb, or Lu, and a rare earth element B different from the element A, where B is Sc, Y, La, Eu, Gd, Dy, Yb, or Lu. The phosphate of the element A is preferably crystalline, with at least part of the element B dissolved in the phosphate of the element A in a solid state. The phosphate of the element A preferably has a xenotime or monazite crystal structure.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: April 30, 2024
    Assignee: Mitsui Mining & Smelting Co., Ltd.
    Inventors: Yoshihiro Yoneda, Kazuhiko Kato
  • Patent number: 11929544
    Abstract: A wireless communication device is provided for transmitting and receiving a high-frequency signal having a first frequency for communication is disclosed. The device includes a loop pattern having a first electrode and a second electrode as both ends, an antenna pattern, a third electrode capacitively coupled to the first electrode, and a fourth electrode capacitively coupled to the second electrode. The device includes an RFIC having a capacitive impedance at a second frequency higher than the first frequency, and a first current path and a second current path connected in parallel with each other between the third electrode and the fourth electrode. The RFIC is included in the first current path and the second current path has an inductive impedance at a second frequency.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: March 12, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Noboru Kato, Yoshihiro Aoyama, Mikiko Saito
  • Patent number: 11915931
    Abstract: A method for fabricating a semiconductor device is described that includes forming a base layer over a top layer of a substrate, the base layer includes a silicon based dielectric having a thickness less than or equal to 5 nm and greater than or equal to 0.5 nm; forming a photoresist layer over the base layer, the photoresist including a first side and an opposite second side; exposing a first portion of the photoresist layer to a pattern of extreme ultraviolet (EUV) radiation from the first side; exposing a second portion of the photoresist layer with a pattern of electron flux from the second side, the electron flux being directed into the photoresist layer from the base layer in response to the EUV radiation; developing the exposed photoresist layer to form a patterned photoresist layer; and transferring the pattern of the patterned photoresist layer to the base layer and the top layer.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: February 27, 2024
    Assignee: Tokyo Electron Limited
    Inventors: Choong-man Lee, Soo Doo Chae, Angelique Raley, Qiaowei Lou, Toshio Hasegawa, Yoshihiro Kato
  • Publication number: 20240052483
    Abstract: A method of forming a SiOC-based film includes: preparing a substrate; forming a SiC-based film on the substrate by using a carbon precursor made of a carbon-containing gas and a silicon precursor made of a silicon-containing gas; forming the SiOC-based film by performing oxidation process on the SiC-based film on the substrate; and performing a processing with plasma of a gas containing a H2 gas on the SiOC-based film on the substrate, wherein the forming the SiC-based film is performed before the SiC-based film has a first given film thickness, the forming the SiC-based film and the forming the SiOC-based film by the oxidation process are executed once or multiple times before the SiOC-based film has a second given film thickness, and an operation of forming the SiOC-based film to have the second given film thickness and the performing the processing with the plasma are executed once or multiple times.
    Type: Application
    Filed: August 11, 2023
    Publication date: February 15, 2024
    Inventors: Kazuki GOTO, Yoshihiro KATO, Junya SUZUKI, Yuji OTSUKI
  • Patent number: 11877396
    Abstract: Provided is a laminate containing a first resin composition layer, a heat-resistant film layer, and a second resin composition layer laminated in the presented order, wherein the first resin composition layer is in a semi-cured state (B stage), and a difference between a maximum thickness and a minimum thickness of the first resin composition layer is 0.5 to 5 ?m; and the second resin composition layer is in a semi-cured state (B stage), and a difference between a maximum thickness and a minimum thickness of the second resin composition layer is 0.5 to 5 ?m.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: January 16, 2024
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Syunsuke Hirano, Yoshihiro Kato, Takaaki Ogashiwa
  • Publication number: 20230399737
    Abstract: A film forming method according to an aspect of the present disclosure is a film forming method of embedding a film in a recess formed in a surface of a substrate, and includes a first processing including (a) adsorbing a raw material gas into the recess, (b) forming a film by reacting a reaction gas with the raw material gas, and (c) activating a plasma generation gas including a hydrogen gas and a noble gas by plasma and supplying the gas into the recess to shrink the film. A plurality of cycles each including (a) and (b) are executed, and at least a part of the plurality of cycles includes (c).
    Type: Application
    Filed: October 8, 2021
    Publication date: December 14, 2023
    Inventors: Yoshihiro KATO, Junya SUZUKI, Toshio HASEGAWA, Kouji SHIMOMURA
  • Patent number: 11822233
    Abstract: An image pickup apparatus includes a stage configured to support a sample at a plurality of support points, a bending data acquisition unit configured to acquire bending data corresponding to a bending of the sample supported on the stage, a height information detection unit configured to detect a height of the sample supported on the stage, a difference value calculation unit configured to calculate a difference value between a height indicated by height information and a height indicated by the bending data at each of a plurality of points on the sample, a correction data calculation unit configured to calculate correction data based on the difference value, and an estimation unit configured to calculate estimation data for estimating the height of the sample by correcting the bending data using the correction data.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: November 21, 2023
    Assignee: Lasertec Corporation
    Inventors: Hiroki Miyai, Yoshito Fujiwara, Yoshihiro Kato
  • Publication number: 20230357923
    Abstract: A film forming method of forming a metal-containing aluminum oxide layer on a substrate having at least a metal layer on a surface thereof includes: a first operation of forming an aluminum oxide layer on the substrate with an aluminum-containing precursor and an oxidant; and a second operation of forming a metal oxide layer on the substrate with the oxidant and a precursor including a first metal other than aluminum. Assuming that a dielectric constant of only an oxide of the first metal is ?1 and a molar ratio of the first metal to all metals in the metal-containing aluminum oxide layer is X, the formed metal-containing aluminum oxide layer satisfies a following condition (1) or (2): X>? and ?1<25×X/(3X?1) . . . (1); and X??. . . (2).
    Type: Application
    Filed: August 30, 2021
    Publication date: November 9, 2023
    Inventors: Kouji SHIMOMURA, Yoshihiro KATO, Toshio HASEGAWA, Junya SUZUKI
  • Patent number: 11664240
    Abstract: The method for producing a laminate having a patterned metal foil includes masking the whole surface of a first metal foil in a laminate having the first metal foil, a first insulating resin layer having a thickness of 1 to 200 ?m and a second metal foil laminated in this order, and patterning the second metal foil.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: May 30, 2023
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Syunsuke Hirano, Yoshihiro Kato, Takaaki Ogashiwa, Kazuaki Kawashita, Makoto Murakami
  • Publication number: 20230098357
    Abstract: [Problem] Provided is a resin composition, resin sheet, prepreg and printed wiring board capable of obtaining excellent low permittivity, low dielectric loss tangent, flexibility and peel strength. [Solution Means] A resin composition containing (A) a maleimide compound exhibiting a relative permittivity of lower than 2.7, (B) a polyphenylene ether compound represented by general formula (1) below and having a number-average molecular weight of 1000 to 7000, and (C) a block copolymer with a styrene skeleton. In general formula (1), X represents an aryl group, —(Y—O)n2- represents a polyphenylene ether portion, R1, R2 and R3 each independently represent a hydrogen atom or an alkyl, alkenyl or alkynyl group, n2 represents an integer of 1 to 100, n1 represents an integer of 1 to 6 and n3 represents an integer of 1 to 4.
    Type: Application
    Filed: January 20, 2021
    Publication date: March 30, 2023
    Applicants: Mitsubishi Gas Chemical Company, Inc., MGC Electrotechno Co., Ltd.
    Inventors: Shunsuke Hirano, Yoshihiro Kato, Meguru Ito, Takeshi Nobukuni, Noriaki Sugimoto, Takashi Kubo, Shouta Koga, Yoshitaka Ueno
  • Publication number: 20230054125
    Abstract: A method for fabricating a semiconductor device is described that includes forming a base layer over a top layer of a substrate, the base layer includes a silicon based dielectric having a thickness less than or equal to 5 nm and greater than or equal to 0.5 nm; forming a photoresist layer over the base layer, the photoresist including a first side and an opposite second side; exposing a first portion of the photoresist layer to a pattern of extreme ultraviolet (EUV) radiation from the first side; exposing a second portion of the photoresist layer with a pattern of electron flux from the second side, the electron flux being directed into the photoresist layer from the base layer in response to the EUV radiation; developing the exposed photoresist layer to form a patterned photoresist layer; and transferring the pattern of the patterned photoresist layer to the base layer and the top layer.
    Type: Application
    Filed: August 19, 2021
    Publication date: February 23, 2023
    Inventors: Choong-man Lee, Soo Doo Chae, Angelique Raley, Qiaowei Lou, Toshio Hasegawa, Yoshihiro Kato
  • Publication number: 20220276292
    Abstract: Devices and methods to allow a source of noise generated by modulation with a signal inside a device to be easily measured. A measurement device according to an embodiment includes: a transmission unit that applies a first signal formed by a high frequency signal to an object to be measured; a reception unit that receives a second signal formed by a high frequency signal generated from the object to be measured; and a measurement unit that measures the second signal received by the reception unit. The reception unit receives the second signal while the transmission unit applies the first signal.
    Type: Application
    Filed: July 21, 2020
    Publication date: September 1, 2022
    Applicant: SONY GROUP CORPORATION
    Inventors: Junji MAESHIMA, Seigo FUKUNAGA, Yoshihiro KATO, Kotaro FUJIMORI
  • Publication number: 20220222804
    Abstract: An inspection device according to one aspect of the present disclosure includes an image capturing unit configured to capture an image of an EUV mask provided with a pattern, a storage unit configured to store a database intermediate file including a gray image obtained by pixelating a binarized image rasterized from design data of the pattern, and a processing unit configured to inspect the EUV mask on the basis of a captured image obtained by the image capturing unit capturing an image of the EUV mask. The processing unit includes a conversion model generated by a learning machine configured to perform learning by deep learning, a reference image generation unit configured to generate a reference image from the gray image by using the conversion model, and a comparison unit configured to compare the reference image with the captured image.
    Type: Application
    Filed: January 6, 2022
    Publication date: July 14, 2022
    Inventors: Yoshihiro KATO, Hirokazu SEKI
  • Publication number: 20220051958
    Abstract: A method for producing a package substrate for mounting a semiconductor device includes: forming a first substrate by forming a laminate in which a first metal layer that has a thickness of 1 ?m to 70 ?m and that is peelable from a core resin layer, a first insulating resin layer, and a second metal layer are arranged on both sides of the core resin layer having a thickness of 1 ?m to 80 ?m, and heating and pressurizing the laminate simultaneously; forming a pattern on the second metal layer; forming a second substrate by heating and pressurizing a laminate formed by arranging a second insulating resin layer and a third metal layer on a surface of the second metal layer; and peeling, from the core resin layer, a third substrate including the first metal and insulating resin layers, the second metal and insulating layers, and the third metal layer.
    Type: Application
    Filed: October 21, 2019
    Publication date: February 17, 2022
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Syunsuke HIRANO, Yoshihiro KATO, Takaaki OGASHIWA
  • Publication number: 20220020602
    Abstract: A method for manufacturing a package substrate including an insulating layer and a wiring conductor, including: forming, on one or both sides of a core resin layer, a substrate including a peelable first metal layer that has a thickness of 1-70 ?m, a first insulating resin layer, and a second metal layer; forming a non-through hole reaching a surface of the first metal layer, performing electrolytic and/or electroless copper plating on its inner wall, and connecting the second and first metal layers; arranging a second insulating resin layer and a third metal layer and heating and pressurizing the first substrate to form a substrate; forming a non-through hole reaching a surface of the second metal layer, performing electrolytic and/or electroless copper plating on its inner wall, and connecting the second and third metal layers; peeling a third substrate; and patterning the first and third metal layers to form the wiring conductor.
    Type: Application
    Filed: October 21, 2019
    Publication date: January 20, 2022
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Syunsuke HIRANO, Yoshihiro KATO, Takaaki OGASHIWA
  • Patent number: 11217445
    Abstract: A method for manufacturing a package substrate for mounting a semiconductor device including: a first laminate preparing step of preparing a first laminate including a resin layer, a bonding layer that is provided on at least one surface side of the resin layer and includes peeling means, and a first metal layer provided on the bonding layer; a first wiring forming step of forming a first wiring conductor in the first laminate by etching the first metal layer; a second laminate forming step of forming a second laminate by laminating an insulating resin layer and a second metal layer in this order on a surface of the first laminate, the surface being provided with the first wiring conductor; a second wiring forming step of forming a second wiring conductor on the insulating resin layer by forming a non-through hole in the insulating resin layer.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: January 4, 2022
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Syunsuke Hirano, Yoshihiro Kato, Takaaki Ogashiwa, Kazuaki Kawashita, Youichi Nakajima
  • Patent number: D1016104
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: February 27, 2024
    Assignee: KUBOTA CORPORATION
    Inventors: Yoshihiro Kushita, Shunichiro Mori, Takashi Kato