Abstract: An active matrix substrate includes: first to third lines formed in first to third line layers, respectively, a signal different from a signal supplied to the first lines and the second lines being supplied to the third lines; first connection lines 21a, 21b that connect the first lines or the second lines with the first terminals; and second connection lines 24c that connect the third lines with the second terminals. One of two adjacent ones of the first connection lines is at least partially formed in one of the first line layer and the second line layer, and the other is at least partially formed in the other line layer. In areas that are in the sealing area and where the first connection lines and the second connection lines are superposed, the two of the first connection lines are at least partially superposed when viewed in a plan view.

Abstract: A display panel displaying an image includes a first substrate, a second substrate disposed opposite the first substrate, electric optical substance sealed between the first substrate and the second substrate, a transistor disposed on the first substrate and supplying an electric signal to the electric optical substance and including an oxide semiconductor film as an activating layer, and a light blocking film disposed on the second substrate and blocking visible light from transmitting therethrough, the light blocking film having a hole in a position overlapping the transistor in a plan view.

Abstract: The present invention provides a method for manufacturing a liquid crystal display device in which a decrease in the aperture ratio is prevented while the load capacity is maintained. The method for manufacturing a liquid crystal display device of the present invention includes a step (A-1) of applying a negative photoresist to a surface of a first substrate including a thin-film transistor element to form a first film, a step (A-2) of exposing the first film in an exposure pattern including a first exposure region and a second exposure region in which an exposure dose is lower than an exposure dose in the first exposure region, and a step (A-3) of developing the first film to form a first spacer in the first exposure region and a second spacer with a height less than a height of the first spacer in the second exposure region.

Abstract: A touch-panel-equipped display device includes an active matrix substrate 1, TFTs 4; a first insulating film 44 formed on a liquid crystal layer side with respect to the TFT 4; pixel electrodes 31 provided on a liquid crystal layer side with respect to the first insulating film; a second insulating film 46 provided on a liquid crystal layer side with respect to the pixel electrodes; counter electrodes 21 that are formed on a liquid crystal layer side with respect to the second insulating film, the counter electrodes and the pixel electrodes having electrostatic capacitances therebetween; a control unit that detects a touch position by supplying a touch driving signal to the counter electrodes; and signal lines 22 for supplying the touch driving signal from the control unit to the counter electrodes. The signal lines are formed between the first insulating film and the second insulating film.

Abstract: Provided is an active matrix substrate (1001) that includes multiple inspection TFTs (10Q) that are arranged in a non-display area (900), and an inspection circuit (200) that includes multiple inspection TFTs (10Q). At least one or more of the multiple inspection TFTs (10Q) are arranged within a semiconductor chip mounting area (R) in which a semiconductor chip is mounted. Each of the multiple inspection TFTs (10Q) includes a semiconductor layer, a lower gate electrode (FG) that is positioned on a side of the substrate of the semiconductor layer with a gate insulation layer in between, an upper gate electrode (BG) that is positioned on a side opposite to the side of the substrate of the semiconductor layer with an insulation layer including a first insulation layer in between, and a source electrode and a drain electrode that are connected to the semiconductor layer.

Abstract: The present invention provides a circuit board having excellent productivity, particularly a circuit board having excellent productivity with respect to a semiconductor layer and source layer forming step, a display device, and a process for producing a circuit board. The circuit board of the present invention is a circuit board including an oxide semiconductor layer and an electrode connected to the oxide semiconductor layer, wherein the electrode is formed by essentially laminating a layer made of a metal other than copper and a layer containing copper.

Abstract: A touch-panel-equipped display device includes an active matrix substrate 1, TFTs 4; a first insulating film 44 formed on a liquid crystal layer side with respect to the TFT 4; pixel electrodes 31 provided on a liquid crystal layer side with respect to the first insulating film; a second insulating film 46 provided on a liquid crystal layer side with respect to the pixel electrodes; counter electrodes 21 that are formed on a liquid crystal layer side with respect to the second insulating film, the counter electrodes and the pixel electrodes having electrostatic capacitances therebetween; a control unit that detects a touch position by supplying a touch driving signal to the counter electrodes; and signal lines 22 for supplying the touch driving signal from the control unit to the counter electrodes. The signal lines are formed between the first insulating film and the second insulating film.

Abstract: A liquid crystal panel includes boards, a sealing member, an insulating film, an alignment film, and a film forming area control recess. The sealing member is disposed between the boards. The insulating film is formed on an array board. The alignment film is formed to overlap the insulating film on the array board at least in the display area. The film forming area control recess is formed by recessing a section of the insulating film at a position closer to the display area AA relative to the sealing member on the array board. The film forming area control recess is configured such that at least a section of a first side surface on a sealing member side is angled relative to a normal direction to a plate surface of the array board with a smaller angle in comparison to a second side surface on an opposite side.

Abstract: An active matrix substrate includes: first to third lines formed in first to third line layers, respectively a signal different from a signal supplied to the first lines and the second lines being supplied to the third lines; first connection lines 21a, 21b that connect the first lines or the second lines with the first terminals; and second connection lines 24c that connect the third lines with the second terminals. One of two adjacent ones of the first connection lines is at least partially formed in one of the first line layer and the second line layer, and the other is at least partially formed in the other line layer. In areas that are in the sealing area and where the first connection lines and the second connection lines are superposed, the two of the first connection lines are at least partially superposed when viewed in a plan view.

Abstract: The present invention provides a circuit board having excellent productivity, particularly a circuit board having excellent productivity with respect to a semiconductor layer and source layer forming step, a display device, and a process for producing a circuit board. The circuit board of the present invention is a circuit board including an oxide semiconductor layer and an electrode connected to the oxide semiconductor layer, wherein the electrode is formed by essentially laminating a layer made of a metal other than copper and a layer containing copper.

Abstract: The present invention provides a thin film transistor substrate and a display device that prevent peeling. The thin film transistor substrate includes: an insulating substrate; a thin film transistor; a first inorganic insulating layer; an organic insulating layer stacked on the first inorganic insulating layer; and a second inorganic insulating layer stacked on the organic insulating layer. The organic insulating layer includes a side covered with the second inorganic insulating layer. The first inorganic insulating layer may contain silicon oxide. The organic insulating layer may contain photosensitive resin. The second inorganic insulating layer may contain silicon nitride.

Abstract: A thin film forming apparatus includes a substrate holding portion and a target portion. The target portion has a plurality of targets arranged at predetermined intervals and parallel to a substrate held by the substrate holding portion. The substrate holding portion is configured to move the substrate parallel to the target portion. A shield portion configured to block sputtered particles flying from the target portion is placed on the target portion side of the substrate so as to face a gap between adjoining ones of the targets.

Abstract: An active matrix substrate includes a plurality of pixels arranged in a matrix, a plurality of capacitor lines (11b) extending in one of directions in which the pixels are aligned and in parallel to each other, a plurality of TFTs (5), one for each of the pixels, a protective film (16a) covering the TFTs (5), a plurality of pixel electrodes (18a) arranged in a matrix on the protective film (16a) and connected to the respective corresponding TFTs (5), and a plurality of auxiliary capacitors (6), one for each of the pixels. Each of the auxiliary capacitors (6) includes the corresponding capacitor line (11b), the corresponding pixel electrode (18a), and the protective film (16a) between the corresponding capacitor line (11b) and the corresponding pixel electrode (18a).

Abstract: Each of the auxiliary capacitors (6a) includes a capacitor line (11b) comprised of the same material as the gate electrode (11a) and provided in the same layer as the gate electrode (11a), the gate insulating film (12) provided so as to cover the capacitor line (11a), a capacitor intermediate layer (13c) provided using the oxide semiconductor and provided on the gate insulating film (12) so as to overlap the capacitor line (11b), and a capacitor electrode (15b) provided on the capacitor intermediate layer (13c), and the capacitor intermediate layer (13c) is conductive.

Abstract: The present invention provides a thin film transistor substrate and a display device that prevent peeling. The thin film transistor substrate includes: an insulating substrate; a thin film transistor; a first inorganic insulating layer; an organic insulating layer stacked on the first inorganic insulating layer; and a second inorganic insulating layer stacked on the organic insulating layer. The organic insulating layer includes a side covered with the second inorganic insulating layer. The first inorganic insulating layer may contain silicon oxide. The organic insulating layer may contain photosensitive resin. The second inorganic insulating layer may contain silicon nitride.

Abstract: The present invention provides an oxide semiconductor capable of achieving a thin film transistor having stable transistor characteristics, a thin film transistor having a channel layer formed of the oxide semiconductor and a production method thereof, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor. The oxide semiconductor includes indium, gallium, zinc, and oxygen as constituent atoms, and the oxygen content of the oxide semiconductor is 87% to 95% of the stoichiometric condition set as 100%, in terms of atomic units.

Abstract: A drain electrode (17) includes (i) a lower drain electrode (17a) stacked on a semiconductor layer (14) so as to partially cover an upper surface of the semiconductor layer (14) and (ii) an upper drain electrode (17b). The semiconductor layer (14), the lower drain electrode (17a), and the upper drain electrode (17b) form steps. In a step part where the steps are formed, a distance between a periphery of the lower drain electrode (17a) and a periphery of the upper drain electrode (17b) is more than 0.4 ?m but less than 1.5 ?m.

Abstract: A semiconductor device (100A) according to the present invention includes an oxide semiconductor layer (31a), first and second source electrodes (52a1 and 52a2), and first and second drain electrodes (53a1 and 53a2). The second source electrode (52a2) is formed to be in contact with a top surface of the first source electrode and inner to the first source electrode (52a1). The second drain electrode (53a2) is formed to be in contact with a top surface of the first drain electrode (53a1) and inner to the first drain electrode (53a1). The oxide semiconductor layer (31a) is formed to be in contact with the top surface of the first source electrode (52a1) and the top surface of the first drain electrode (53a1).

Abstract: The present invention provides a thin film transistor including an oxide semiconductor layer (4) for electrically connecting a signal electrode (6a) and a drain electrode (7a), the an oxide semiconductor layer being made from an oxide semiconductor; and a barrier layer (6b) made from at least one selected from the group consisting of Ti, Mo, W, Nb, Ta, Cr, nitrides thereof, and alloys thereof, the barrier layer (6b) being in touch with the signal electrode (6a) and the oxide semiconductor layer (4) and separating the signal electrode (6a) from the oxide semiconductor layer (4). Because of this configuration, the thin film transistor can form and maintain an ohmic contact between the first electrode and the channel layer, thereby being a thin film transistor with good properties.

Abstract: The semiconductor device (100) according to the present invention includes a gate electrode (102) of a TFT, a gate insulating layer (103) formed on the gate electrode (102), an oxide semiconductor layer (107) disposed on the gate insulating layer (103), a protecting layer (108) formed on the oxide semiconductor layer (107) by a spin-on-glass technique, and a source electrode (105) and a drain electrode (106) disposed on the protecting layer (108). Via a first contact hole (131) formed in the protecting layer (108), the source electrode (105) is electrically connected to the oxide semiconductor layer (104), and via a second contact hole (132), the drain electrode (106) is electrically connected to the oxide semiconductor layer (104).