Patents by Inventor Yoshimasa Chikama
Yoshimasa Chikama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140367683Abstract: The present invention provides an oxide semiconductor capable of achieving a thin film transistor having stable transistor characteristics, a thin film transistor having a channel layer formed of the oxide semiconductor and a production method thereof, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor. The oxide semiconductor includes indium, gallium, zinc, and oxygen as constituent atoms, and the oxygen content of the oxide semiconductor is 87% to 95% of the stoichiometric condition set as 100%, in terms of atomic units.Type: ApplicationFiled: September 5, 2014Publication date: December 18, 2014Inventors: Yoshifumi OHTA, Go MORI, Hirohiko NISHIKI, Yoshimasa CHIKAMA, Tetsuya AITA, Masahiko SUZUKI, Okifumi NAKAGAWA, Michiko TAKEI, Yoshiyuki HARUMOTO, Takeshi HARA
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Patent number: 8906739Abstract: A method includes: a step of forming a gate electrode (14) on a substrate (10a); a step of forming a gate insulating film (15) to cover the gate electrode (14), and then forming an In-Ga-Zn-O-based oxide semiconductor layer (16) in which a ratio of In:Ga:Zn in atomic % is 1:1:1 or 4:5:1 on the gate insulating film (15) to overlap the gate electrode (14); a step of forming a source electrode (19a) and a drain electrode (19b) on the oxide semiconductor layer (16) to overlap the gate electrode (14) and to face each other; and a step of performing an annealing process in an atmosphere containing steam (S) on the substrate (10a) provided with the source electrode (19a) and the drain electrode (19b).Type: GrantFiled: February 9, 2011Date of Patent: December 9, 2014Assignee: Sharp Kabushiki KaishaInventors: Yoshifumi Ohta, Yoshimasa Chikama, Masahiko Suzuki, Okifumi Nakagawa, Yoshiyuki Harumoto
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Patent number: 8865516Abstract: The present invention provides an oxide semiconductor capable of achieving a thin film transistor having stable transistor characteristics, a thin film transistor having a channel layer formed of the oxide semiconductor and a production method thereof, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor. The oxide semiconductor includes indium, gallium, zinc, and oxygen as constituent atoms, and the oxygen content of the oxide semiconductor is 87% to 95% of the stoichiometric condition set as 100%, in terms of atomic units.Type: GrantFiled: March 10, 2010Date of Patent: October 21, 2014Assignee: Sharp Kabushiki KaishaInventors: Yoshifumi Ohta, Go Mori, Hirohiko Nishiki, Yoshimasa Chikama, Tetsuya Aita, Masahiko Suzuki, Okifumi Nakagawa, Michiko Takei, Yoshiyuki Harumoto, Takeshi Hara
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Patent number: 8829513Abstract: The present invention provides an oxide semiconductor that realizes a TFT excellent in electric properties and process resistance, a TFT comprising a channel layer formed of the oxide semiconductor, and a display device equipped with the TFT. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor, wherein the oxide semiconductor contains Ga (gallium), In (indium), Zn (zinc), and O (oxygen) as constituent atoms, and the oxide semiconductor has Zn atomic composition satisfying the equation of 0.01?Zn/(In+Zn)?0.22.Type: GrantFiled: March 29, 2010Date of Patent: September 9, 2014Assignee: Sharp Kabushiki KaishaInventors: Yoshifumi Ota, Hirohiko Nishiki, Yoshimasa Chikama, Takeshi Hara, Tetsuya Aita, Masahiko Suzuki, Okifumi Nakagawa, Kazuo Nakagawa, Michiko Takei, Yoshiyuki Harumoto, Hinae Mizuno
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Publication number: 20140151682Abstract: The present invention provides a circuit board having excellent productivity, particularly a circuit board having excellent productivity with respect to a semiconductor layer and source layer forming step, a display device, and a process for producing a circuit board. The circuit board of the present invention is a circuit board including an oxide semiconductor layer and an electrode connected to the oxide semiconductor layer, wherein the electrode is formed by essentially laminating a layer made of a metal other than copper and a layer containing copper.Type: ApplicationFiled: April 13, 2011Publication date: June 5, 2014Applicant: Sharp Kabushiki KaishaInventors: Yuichi Saito, Yohsuke Kanzaki, Yudai Takanishi, Tetsuya Okamoto, Yoshiki Nakatani, Yoshimasa Chikama
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Publication number: 20140147966Abstract: The semiconductor device (100) according to the present invention includes a gate electrode (102) of a TFT, a gate insulating layer (103) formed on the gate electrode (102), an oxide semiconductor layer (107) disposed on the gate insulating layer (103), a protecting layer (108) formed on the oxide semiconductor layer (107) by a spin-on-glass technique, and a source electrode (105) and a drain electrode (106) disposed on the protecting layer (108). Via a first contact hole (131) formed in the protecting layer (108), the source electrode (105) is electrically connected to the oxide semiconductor layer (104), and via a second contact hole (132), the drain electrode (106) is electrically connected to the oxide semiconductor layer (104).Type: ApplicationFiled: November 1, 2011Publication date: May 29, 2014Applicant: SHARP KABUSHIKI KAISHAInventors: Okifumi Nakagawa, Yoshimasa Chikama, Takeshi Hara, Hiromitsu Katsui
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Patent number: 8698152Abstract: A display panel (50a) includes a TFT substrate (20a) in which a plurality of TFTs (5a) are provided, a counter substrate (30a) provided to face the TFT substrate (20a), and a display medium layer (40) provided between the TFT substrate (20a) and the counter substrate (30a), a plurality of pixels being provided so that each of the plurality of pixels is associated with a corresponding one of the TFTs (5a), wherein an oxide semiconductor layer (13) is provided in each of the TFTs (5a) as a channel, and an ultraviolet light absorbing layer (22) having a light transmitting property is provided in each of the pixels (P) so as to overlap the oxide semiconductor layer (13).Type: GrantFiled: February 14, 2011Date of Patent: April 15, 2014Assignee: Sharp Kabushiki KaishaInventors: Yoshiyuki Harumoto, Yoshifumi Ohta, Yoshimasa Chikama, Tokuo Yoshida, Masahiko Suzuki, Okifumi Nakagawa, Yoshinobu Miyamoto, Tetsuya Yamashita, Hinae Mizuno
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Patent number: 8685803Abstract: A semiconductor device includes: a thin film transistor having a gate line (3a), a first insulating film (5), an island-shaped oxide semiconductor layer (7a), a second insulating film (9), a source line (13as), a drain electrode (13ad), and a passivation film; and a terminal portion having a first connecting portion (3c) made of the same conductive film as the gate line, a second connecting portion (13c) made of the same conductive film as the source line and the drain electrode, and a third connecting portion (19c) formed on the second connecting portion.Type: GrantFiled: December 3, 2010Date of Patent: April 1, 2014Assignee: Sharp Kabushiki KaishaInventors: Yoshimasa Chikama, Hirohiko Nishiki, Yoshifumi Ohta, Takeshi Hara, Tetsuya Aita, Masahiko Suzuki, Michiko Takei, Okifumi Nakagawa, Yoshiyuki Harumoto, Hinae Mizuno
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Publication number: 20140083841Abstract: A method of forming a thin-film includes: a normal deposition step of depositing a thin-film on a substrate by performing discharge among a plurality of targets, and by providing an inert gas and a reactive gas into a processing chamber, with a magnet section being reciprocated along a target section formed by these targets; and a discharge starting step of starting a discharge at the target section prior to the normal deposition step, in a state in which a flow ratio of the reactive gas to the inert gas is larger than a flow ratio of the reactive gas to the inert gas in the normal deposition step.Type: ApplicationFiled: May 7, 2012Publication date: March 27, 2014Applicant: SHARP KABUSHIKI KAISHAInventors: Yoshifumi Ohta, Yoshimasa Chikama
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Publication number: 20140021037Abstract: A thin film forming apparatus includes a substrate holding portion and a target portion. The target portion has a plurality of targets arranged at predetermined intervals and parallel to a substrate held by the substrate holding portion. The substrate holding portion is configured to move the substrate parallel to the target portion. A shield portion configured to block sputtered particles flying from the target portion is placed on the target portion side of the substrate so as to face a gap between adjoining ones of the targets.Type: ApplicationFiled: November 29, 2011Publication date: January 23, 2014Applicant: SHARP KABUSHIKI KAISHAInventors: Yoshimasa Chikama, Iwao Suzuki
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Publication number: 20140014952Abstract: A drain electrode (17) includes (i) a lower drain electrode (17a) stacked on a semiconductor layer (14) so as to partially cover an upper surface of the semiconductor layer (14) and (ii) an upper drain electrode (17b). The semiconductor layer (14), the lower drain electrode (17a), and the upper drain electrode (17b) form steps. In a step part where the steps are formed, a distance between a periphery of the lower drain electrode (17a) and a periphery of the upper drain electrode (17b) is more than 0.4 ?m but less than 1.5 ?m.Type: ApplicationFiled: January 31, 2012Publication date: January 16, 2014Applicant: SHARP KABUSHIKI KAISHAInventors: Hiromitsu Katsui, Yoshimasa Chikama, Wataru Nakamura, Tetsunori Tanaka, Kenichi Kitoh
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Patent number: 8592811Abstract: An active matrix substrate (20a) includes a plurality of pixel electrodes (18a) arranged in a matrix, and a plurality of TFTs (5) each connected to a corresponding one of the pixel electrodes (18a), and each including a gate electrode (11a) provided on an insulating substrate (10a), a gate insulating film (12a) covering the gate electrode (11a), a semiconductor layer (16a) provided on the gate insulating film (12a) and having a channel region (C) overlapping the gate electrode (11a), and a source electrode (15aa) and a drain electrode (15b) of copper or copper alloy provided on the gate insulating film (12a) and separated from each other by the channel region (C) of the semiconductor layer (16a). The semiconductor layer (16a) is formed of an oxide semiconductor and covers the source electrode (15aa) and the drain electrode (15b).Type: GrantFiled: February 14, 2011Date of Patent: November 26, 2013Assignee: Sharp Kabushiki KaishaInventors: Masahiko Suzuki, Yoshimasa Chikama, Yoshifumi Ohta, Tokuo Yoshida, Okifumi Nakagawa, Yoshiyuki Harumoto, Yoshinobu Miyamoto, Tetsuya Yamashita, Hinae Mizuno
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Publication number: 20130207114Abstract: An active matrix substrate (20a) includes a plurality of pixel electrodes (18a) arranged in a matrix, and a plurality of TFTs (5) each connected to a corresponding one of the pixel electrodes (18a), and each including a gate electrode (11a) provided on an insulating substrate (10a), a gate insulating film (12a) covering the gate electrode (11a), a semiconductor layer (16a) provided on the gate insulating film (12a) and having a channel region (C) overlapping the gate electrode (11a), and a source electrode (15aa) and a drain electrode (15b) of copper or copper alloy provided on the gate insulating film (12a) and separated from each other by the channel region (C) of the semiconductor layer (16a). The semiconductor layer (16a) is formed of an oxide semiconductor and covers the source electrode (15aa) and the drain electrode (15b).Type: ApplicationFiled: February 14, 2011Publication date: August 15, 2013Inventors: Masahiko Suzuki, Yoshimasa Chikama, Yuuji Mizuno, Hinae Mizuno, Yoshifumi Ohta, Tokuo Yoshida, Okifumi Nakagawa, Yoshiyuki Harumoto, Yoshinobu Miyamoto, Tetsuya Yamashita
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Publication number: 20130193430Abstract: The present invention provides an oxide semiconductor that realizes a TFT excellent in electric properties and process resistance, a TFT comprising a channel layer formed of the oxide semiconductor, and a display device equipped with the TFT. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor, wherein the oxide semiconductor contains Ga (gallium), In (indium), Zn (zinc), and O (oxygen) as constituent atoms, and the oxide semiconductor has Zn atomic composition satisfying the equation of 0.01?Zn/(In+Zn)?0.22.Type: ApplicationFiled: March 29, 2010Publication date: August 1, 2013Applicant: Sharp Kabushiki KaishaInventors: Yoshifumi Ota, Hirohiko Nishiki, Yoshimasa Chikama, Takeshi Hara, Tetsuya Aita, Masahiko Suzuki, Okifumi Nakagawa, Kazuo Nakagawa, Michiko Takei, Yoshiyuki Harumoto, Hinae Mizuno
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Patent number: 8481373Abstract: A method for manufacturing a thin film transistor substrate includes a step of forming a gate electrode (11a) and a first interconnect on a substrate (10), a step of forming a gate insulating film (12a) having a contact hole at a position overlapping the first interconnect, a step of forming a source electrode (13a) and a drain electrode (13b) overlapping the gate electrode (11a) and separated apart from each other, and a second interconnect connected via the contact hole to the first interconnect, a step of successively forming an oxide semiconductor film (14) and a second insulating film (15), and thereafter, patterning the second insulating film (15) to form an interlayer insulating film (15a), and a step of reducing the resistance of the oxide semiconductor film (14) exposed through the interlayer insulating film (15a) to form a pixel electrode (14b).Type: GrantFiled: March 16, 2010Date of Patent: July 9, 2013Assignee: Sharp Kabushiki KaishaInventors: Tohru Okabe, Hirohiko Nishiki, Yoshimasa Chikama, Takeshi Hara
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Publication number: 20130140552Abstract: A semiconductor device (100) according to the present invention includes: an oxide semiconductor layer (31) formed on an insulating layer (21), the oxide semiconductor layer (31) containing at least one element selected from the group consisting of In, Zn, and Sn; first and second sacrificial layers (41a) and (41b) formed, with an interspace from each other, on the oxide semiconductor layer (31); a second electrode (52a) formed in contact with an upper face of the first sacrificial layer (41a) and an upper face of the oxide semiconductor layer (31); and a third electrode (52b) formed in contact with an upper face of the second sacrificial layer (41b) and an upper face of the oxide semiconductor layer (31). The first and second sacrificial layers (41a) and (41b) contain an oxide having at least one element selected from the group consisting of Zn, Ga, Mg, Ca, and Sr.Type: ApplicationFiled: February 22, 2011Publication date: June 6, 2013Applicant: SHARP KABUSHIKI KAISHAInventors: Hirohiko Nishiki, Yoshimasa Chikama, Tetsuya Aita, Masahiko Suzuki, Michiko Takei, Okifumi Nakagawa, Yoshiyuki Harumoto, Yoshifumi Ohta, Takeshi Hara, Hinae Mizuno
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Publication number: 20130134411Abstract: A semiconductor device (100A) according to the present invention includes an oxide semiconductor layer (31a), first and second source electrodes (52a1 and 52a2), and first and second drain electrodes (53a1 and 53a2). The second source electrode (52a2) is formed to be in contact with a top surface of the first source electrode and inner to the first source electrode (52a1). The second drain electrode (53a2) is formed to be in contact with a top surface of the first drain electrode (53a1) and inner to the first drain electrode (53a1). The oxide semiconductor layer (31a) is formed to be in contact with the top surface of the first source electrode (52a1) and the top surface of the first drain electrode (53a1).Type: ApplicationFiled: April 5, 2011Publication date: May 30, 2013Applicant: SHARP KABUSHIKI KAISHAInventors: Okifumi Nakagawa, Yoshifumi Ohta, Yoshimasa Chikama, Tsuyoshi Inoue, Masahiko Suzuki, Michiko Takei, Yoshiyuki Harumoto, Yoshinobu Miyamoto, Hinae Mizuno
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Publication number: 20130112970Abstract: A TFT substrate (30a) including a TFT (5a) having: a gate electrode (14a) provided on a substrate (10a); a gate insulating film (15) provided to cover the gate electrode (14a); a semiconductor layer (16a) made of an oxide semiconductor provided on the gate insulating film (15) with a channel region (C) arranged to lie above the gate electrode (14a): and a source electrode (19aa) and a drain electrode (19b) provided on the semiconductor layer (16a) to be spaced from each other with the channel region (C) therebetween. A recess (R) is provided on the surface of the channel region (C) of the semiconductor layer (16a) to extend in the channel width direction.Type: ApplicationFiled: June 6, 2011Publication date: May 9, 2013Inventors: Yoshinobu Miyamoto, Okifumi Nakagawa, Yoshifumi Ohta, Yuuji Mizuno, Yoshimasa Chikama, Tokuo Yoshida, Masahiko Suzuki, Yoshiyuki Harumoto, Tetsuya Yamashita
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Publication number: 20130105788Abstract: The present invention provides an oxide semiconductor capable of achieving a thin film transistor with excellent electric property and credibility, a thin film transistor having a channel layer formed of the oxide semiconductor, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor, and includes Si, In, Zn, and O as constituent atoms.Type: ApplicationFiled: May 6, 2010Publication date: May 2, 2013Applicant: SHARP KABUSHIKI KAISHAInventors: Yoshimasa Chikama, Hirohiko Nishiki, Yoshifumi Ohta, Takeshi Hara, Okifumi Nakagawa, Tetsuya Aita, Masahiko Suzuki, Michiko Takei, Yoshiyuki Harumoto, Kazuo Nakagawa, Hinae Mizuno
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Publication number: 20130099227Abstract: The present invention provides an oxide semiconductor capable of achieving a thin film transistor with excellent electric property, a thin film transistor having a channel layer formed of the oxide semiconductor, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor, and includes Al, In, Zn, and O as constituent atoms.Type: ApplicationFiled: April 22, 2010Publication date: April 25, 2013Applicant: SHARP KABUSHIKI KAISHAInventors: Okifumi Nakagawa, Hirohiko Nishiki, Yoshimasa Chikama, Yoshifumi Ohta, Takeshi Hara, Tetsuya Aita, Masahiko Suzuki, Kazuo Nakagawa, Michiko Takei, Yoshiyuki Harumoto, Hinae Mizuno