Patents by Inventor Yoshito Ikeda

Yoshito Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060289894
    Abstract: A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1?xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1?N; and a source electrode, a drain electrode and a gate electrode which are selectively formed on the element-forming layer. The source electrode is filled in a through hole provided in the buffer layer and the element-forming layer, and is thus electrically connected to the conductive substrate.
    Type: Application
    Filed: June 20, 2006
    Publication date: December 28, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Tomohiro Murata, Yutaka Hirose, Yoshito Ikeda, Tsuyoshi Tanaka, Kaoru Inoue, Daisuke Ueda, Yasuhiro Uemoto
  • Publication number: 20060262331
    Abstract: An image forming apparatus includes a writing control unit that generates a writing clock based on a plurality of pixel clocks by adjusting a width of the writing clock in units of a width of a cycle of the pixel clock. The writing clock is then used to control emission of light from light-emitting elements when forming a latent image on a photosensitive member.
    Type: Application
    Filed: May 19, 2006
    Publication date: November 23, 2006
    Inventor: Yoshito Ikeda
  • Patent number: 7122451
    Abstract: A semiconductor device has an active region composed of a group III–V nitride semiconductor and ohmic electrodes and a gate electrode each formed on the active region. The active region has an entire surface thereof exposed to a plasma such that a surface potential for electrons therein is lower than in the case where the entire surface is not exposed to the plasma.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: October 17, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Inoue, Yoshito Ikeda, Yutaka Hirose, Katsunori Nishii
  • Patent number: 7105907
    Abstract: A buffer layer, an undoped gallium nitride layer, and an n-type gallium nitride active layer are formed on a sapphire substrate. Ohmic contacts and a Schottky contact are then formed on the n-type gallium nitride active layer as a source contact, a drain contact and a gate contact, respectively. The Schottky contact is a copper alloy, such as palladium copper, in which the content by weight of copper is 5%.
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: September 12, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshito Ikeda, Kaoru Inoue, Yutaka Hirose, Katsunori Nishii
  • Patent number: 7078743
    Abstract: A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1-xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1-yN; and a source electrode, a drain electrode and a gate electrode which are selectively formed on the element-forming layer. The source electrode is filled in a through hole provided in the buffer layer and the element-forming layer, and is thus electrically connected to the conductive substrate.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: July 18, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tomohiro Murata, Yutaka Hirose, Yoshito Ikeda, Tsuyoshi Tanaka, Kaoru Inoue, Daisuke Ueda, Yasuhiro Uemoto
  • Patent number: 7037817
    Abstract: A semiconductor device has a first semiconductor layer composed of a group III–V nitride, an oxide film formed by oxidizing a second semiconductor layer composed of a group III–V nitride to be located on the gate electrode formation region of the first semiconductor layer, an insulating film formed on the oxide film to have a composition different from the composition of the oxide film, and a gate electrode formed on the insulating film.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: May 2, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Inoue, Yoshito Ikeda, Yutaka Hirose, Katsunori Nishii
  • Patent number: 6998603
    Abstract: An image forming apparatus is disclosed that is capable of making it simple to initialize a laser system thereof. The image forming apparatus includes a first photo detector that detects a part of a laser beam from each of the lasers and generates respective power adjustment signals for the lasers, a second photo detector that detects another part of the scanning laser beam of each of the lasers and generates a synchronization signal corresponding to each laser, and a power adjustment control unit that changes the output power of each of the lasers to a predetermined value. During the adjustment of output powers of the lasers, the power of a laser is monitored by using the synchronization signal. The power adjustment control unit turns on a laser for power adjustment, and turns off the laser when the scanning synchronization signal is detected twice to complete the power adjustment of the laser, and then starts power adjustment of the next laser.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: February 14, 2006
    Assignee: Ricoh Company, Ltd.
    Inventor: Yoshito Ikeda
  • Publication number: 20050189651
    Abstract: An object of the present invention is to reduce the resistance of an electrode of a Group III nitride semiconductor. A thin Si film and a thin Ti film are formed selectively in a contact formation region on a surface of an AlGaN layer as a Group III nitride semiconductor layer formed on a substrate, and the resulting substrate is heat-treated at a high temperature. By the heat treatment, Si is diffused into the AlGaN layer in the ohmic contact formation region at a concentration of about 1020 cm3. Further, an electron density sufficiently high to provide an ohmic characteristic through a reaction between Si and Ti is provided. Thus, a low resistance TiSi2 portion resulting from the reaction between Si and Ti, a TiN portion resulting from a reaction between Ti and AlGaN and a Group III metal portion of Ga and Al devoid of nitrogen are formed in the contact formation region thereby to provide a low resistance electrode film mainly comprising TiSi2.
    Type: Application
    Filed: July 24, 2003
    Publication date: September 1, 2005
    Applicant: MATSUSHITA ELEC. IND. CO. LTD.
    Inventors: Yutaka Hirose, Yoshito Ikeda, Kaoru Inoue
  • Patent number: 6933181
    Abstract: In a method for fabricating a semiconductor device, a first semiconductor layer of aluminum gallium nitride is first formed on a substrate, and a protection film containing silicon is then formed on the first semiconductor layer in such a manner that a device-isolation region is uncovered. Thereafter, the method further includes the step of heat-treating the first semiconductor layer in an oxidizing atmosphere whose temperature is adjusted to be within a range of 950° C. or more and 1050° C. or less.
    Type: Grant
    Filed: July 17, 2003
    Date of Patent: August 23, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Inoue, Yoshito Ikeda, Katsunori Nishii, Yutaka Hirose
  • Patent number: 6879334
    Abstract: An image forming apparatus shifts a scanning position on a surface scanned of each of a plurality of optical beams in a main scanning direction and a sub-scanning direction, and scans a plurality of lines simultaneously in the main scanning direction by a deflecting part. A synchronization detecting sensor detects the plurality of optical beams. A counting part counts a clock having a higher frequency than a dot clock in an interval between a synchronization detection point of a first beam and a synchronization detection point of a second beam, the first and second beams being included in the optical beams detected by the synchronization detecting sensor. A determining part determines a starting position of writing for each of the plurality of optical beams based on a counted value counted by the counting part.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: April 12, 2005
    Assignee: Ricoh Company, Ltd.
    Inventor: Yoshito Ikeda
  • Patent number: 6852612
    Abstract: The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: February 8, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsunori Nishii, Yoshito Ikeda, Hiroyuki Masato, Kaoru Inoue
  • Publication number: 20050024483
    Abstract: An image forming apparatus and an image forming method. The image forming apparatus includes a scanner mechanism for reading out image data from an original document, and a printer mechanism for printing an image based on the image data. The printer mechanism includes a first memory for writing in the image data in synchronization with a predetermined first clock signal, a first image processor for processing the image data in synchronization with a second clock signal, a second memory for writing in the image data in synchronization with the second clock signal, a second image processor for processing the image data in synchronization with a third clock signal, and a light controller for generating a light control signal from the image data in synchronization with the third clock signal.
    Type: Application
    Filed: May 20, 2004
    Publication date: February 3, 2005
    Inventor: Yoshito Ikeda
  • Publication number: 20050006664
    Abstract: A semiconductor device includes an AlGaN film formed on a GaN film on a substrate, a gate electrode formed on the AlGaN film, and source and drain electrodes formed on either side of the gate electrode on the AlGaN film. An n-type InxGayAl1-x-yN film is interposed between the source and drain electrodes and the AlGaN film. Alternatively, the semiconductor device includes an n-type InxGayAl1-x-yN film formed on a GaN film on a substrate, a gate electrode formed on the InxGayAl1-x-yN film, and source and drain electrodes formed on either side of the gate electrode on the InxGayAl1-x-yN film.
    Type: Application
    Filed: August 3, 2004
    Publication date: January 13, 2005
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kaoru Inoue, Yoshito Ikeda, Hiroyuki Masato
  • Patent number: 6842589
    Abstract: An image forming apparatus includes a data processing device to process image information. A latent image forming device forms an electrostatic first latent image on a surface of a photoconductive element based on image data processed by the data processing device and forms an electrostatic second latent image on the photoconductive element. A developing device develops the first and second electrostatic latent with toner. The first latent image is transferred from the surface of the photoconductive element to a transfer sheet, and the transfer sheet is separated from the surface of the photoconductive element by a separation pick. And, the second latent image has a pattern not produced in a portion of the surface of the photoconductive element that corresponds to the separation pick.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: January 11, 2005
    Assignee: Ricoh Company, Ltd.
    Inventor: Yoshito Ikeda
  • Publication number: 20050001235
    Abstract: A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1-xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1-yN; and a source electrode, a drain electrode and a gate electrode which are selectively formed on the element-forming layer. The source electrode is filled in a through hole provided in the buffer layer and the element-forming layer, and is thus electrically connected to the conductive substrate.
    Type: Application
    Filed: April 29, 2004
    Publication date: January 6, 2005
    Inventors: Tomohiro Murata, Yutaka Hirose, Yoshito Ikeda, Tsuyoshi Tanaka, Kaoru Inoue, Daisuke Ueda, Yasuhiro Uemoto
  • Publication number: 20040238860
    Abstract: A semiconductor device has a first semiconductor layer composed of a group III-V nitride, an oxide film formed by oxidizing a second semiconductor layer composed of a group III-V nitride to be located on the gate electrode formation region of the first semiconductor layer, an insulating film formed on the oxide film to have a composition different from the composition of the oxide film, and a gate electrode formed on the insulating film.
    Type: Application
    Filed: July 13, 2004
    Publication date: December 2, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO.,LTD.
    Inventors: Kaoru Inoue, Yoshito Ikeda, Yutaka Hirose, Katsunori Nishii
  • Publication number: 20040227153
    Abstract: A semiconductor device has a Group III nitride semiconductor layer and a gate electrode formed on the Group III nitride semiconductor layer. The gate electrode contains an adhesion enhancing element. A thermally oxidized insulating film is interposed between the Group III nitride semiconductor layer and the gate electrode.
    Type: Application
    Filed: December 17, 2003
    Publication date: November 18, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yutaka Hirose, Yoshito Ikeda, Kaoru Inoue
  • Patent number: 6809352
    Abstract: The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: October 26, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsunori Nishii, Yoshito Ikeda, Hiroyuki Masato, Kaoru Inoue
  • Publication number: 20040175853
    Abstract: A semiconductor device has an active region composed of a group III-V nitride semiconductor and ohmic electrodes and a gate electrode each formed on the active region. The active region has an entire surface thereof exposed to a plasma such that a surface potential for electrons therein is lower than in the case where the entire surface is not exposed to the plasma.
    Type: Application
    Filed: February 26, 2004
    Publication date: September 9, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kaoru Inoue, Yoshito Ikeda, Yutaka Hirose, Katsunori Nishii
  • Patent number: 6787820
    Abstract: A semiconductor device includes an AlGaN film formed on a GaN film on a substrate, a gate electrode formed on the AlGaN film, and source and drain electrodes formed on either side of the gate electrode on the AlGaN film. An n-type InxGayAl1-x-yN film is interposed between the source and drain electrodes and the AlGaN film. Alternatively, the semiconductor device includes an n-type InxGayAl1-x-yN film formed on a GaN film on a substrate, a gate electrode formed on the InxGayAl1-x-yN film, and source and drain electrodes formed on either side of the gate electrode on the InxGayAl1-x-yN film.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: September 7, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Inoue, Yoshito Ikeda, Hiroyuki Masato