Patents by Inventor Yuan Yu

Yuan Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240054352
    Abstract: A multi-layer federated learning method based on distributed clustering is provided, which comprises the following steps. Computing a feature distribution similarity for each of participating nodes with non-(non-independent and identically distributed) data sets, and grouping these nodes into plural clusters by the feature distribution similarity. Updating local model of nodes of each cluster by a federated learning algorithm, and inputting these nodes into a multi-layer aggregation mechanism. Terminating the operation of the multi-layer aggregation mechanism until the clustering result meets a required demand. Furthermore, we implement a blockchain-based multi-layer federated learning system, including model aggregation module, API module, time-series synchronization module, and IPFS, based on distributed clustering architecture. The learning performance is proven to effectively improved.
    Type: Application
    Filed: July 30, 2023
    Publication date: February 15, 2024
    Applicant: ASIA UNIVERSITY
    Inventors: ZON-YIN SHAE, KUN-YI CHEN, JING-PHA TSAI, CHI-YU CHANG, YUAN-YU TSAI
  • Publication number: 20240055361
    Abstract: A method for forming alignment keys of a semiconductor structure includes: forming an oxide pad layer and a passivation layer on a substrate; forming a patterned photoresist layer on the passivation layer, and using the patterned photoresist layer as a mask to remove part of the oxide pad layer and passivation layer and expose the substrate surface in the medium voltage and alignment mark regions; forming oxide portions on the exposed substrate surface, and the oxide portions extending into the first depth of the substrate; forming deep doped wells in the low voltage and medium voltage regions; thinning the oxide portions; forming high-voltage doped wells in the high voltage and alignment mark regions; performing an etching process on the high voltage and alignment mark regions to form a second trench, as an alignment key, having a second depth greater than the first depth in the alignment mark region.
    Type: Application
    Filed: September 26, 2022
    Publication date: February 15, 2024
    Inventors: TSUNG-YU YANG, Shin-Hung Li, Shan-shi Huang, Ruei Jhe Tsao, Che-Hua Chang, YUAN YU CHUNG
  • Publication number: 20240043349
    Abstract: Disclosed are a silicon nitride ceramic sintered body and a-preparation method thereof. The silicon nitride ceramic sintered body includes a sintered bulk and a hard surface layer having a thickness of 10-1000 ?m, formed on a surface of the sintered bulk, wherein the sintered bulk comprises a first silicon nitride crystalline phase and a first grain boundary phase; the hard surface layer comprises a second silicon nitride crystalline phase and a second grain boundary phase; the first grain boundary phase comprises a metal tungsten phase being tungsten elementary substance and/or a tungsten alloy; the second grain boundary phase comprises tungsten carbide particles; tungsten element in the metal tungsten phase accounts for 80-100 wt % of total tungsten element in the first grain boundary phase; and tungsten element in the tungsten carbide particles accounts for 60-100 wt % of total tungsten element in the second grain boundary phase.
    Type: Application
    Filed: May 19, 2023
    Publication date: February 8, 2024
    Inventors: Zhuhui QIAO, Lujie WANG, Tongyang LI, Ziyue WANG, Yuan YU, Huaguo TANG
  • Publication number: 20240047332
    Abstract: A semiconductor package includes a first tier and a second tier underlying the first tier and including TIVs and third dies. The first tier includes a first redistribution structure and first and second dies disposed side-by-side and separated by a first insulating encapsulation. A surface of the first insulating encapsulation, surfaces of first die connectors of the first die, and truncated spherical surfaces of second die connectors of the second die are level. The first redistribution structure underlies the surfaces of the first insulating encapsulation and the first die connectors and the truncated spherical surfaces of the second die connectors. The third dies disposed below the first redistribution structure are electrically coupled to the first die through the first redistribution structure and laterally covered by a second insulating encapsulation. The TIVs penetrate through the second insulating encapsulation and are electrically coupled to the second die through the first redistribution structure.
    Type: Application
    Filed: August 4, 2022
    Publication date: February 8, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzuan-Horng Liu, Hao-Yi Tsai, Kuo-Lung Pan, Tsung-Yuan Yu
  • Publication number: 20240033521
    Abstract: A nerve stimulation system includes an electrode, an electrode controlling device coupled to the electrode and configured to control the electrode to electrically stimulate a peripheral nerve according to a nerve stimulation signal, and a signal generating device coupled to the electrode controlling device and configured to generate the nerve stimulation signal. The nerve stimulation signal is a signal with a square envelope. The square envelope periodically includes an on-time period with a pulse amplitude and an off-time period without the pulse amplitude, and a ratio of the on-time period and the off-time period is not less than 1, and a length of the off-time period is not longer than 5 seconds.
    Type: Application
    Filed: July 28, 2023
    Publication date: February 1, 2024
    Inventors: Yuan-Yu Hsueh, Wentai Liu, Szu Han Chen, Wan-Ling Tseng, CHUN-WEI LIN
  • Publication number: 20240012213
    Abstract: A photonic integrated circuit has a central region and a peripheral region surrounding the central region. The photonic integrated circuit includes a semiconductor layer, a seal ring structure, and a plurality of silicon waveguides. The seal ring structure is disposed on the semiconductor layer. The seal ring structure is located in the peripheral region and has at least one recess recessing towards the central region from a top view. The seal ring structure is a continuous structure from the top view. The silicon waveguides are embedded in the semiconductor layer.
    Type: Application
    Filed: September 21, 2023
    Publication date: January 11, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Yuan Yu, Hung-Yi Kuo, Cheng-Chieh Hsieh, Hao-Yi Tsai, Chung-Ming Weng, Hua-Kuei Lin, Che-Hsiang Hsu
  • Publication number: 20240006525
    Abstract: A method for manufacturing a high electron mobility transistor device includes providing a substrate. A channel material, a barrier material, a polarization adjustment material and a conductive material are formed on the substrate. A hard mask layer is formed on the conductive material. The conductive material is patterned to form a conductive layer by using the hard mask layer as a mask. A plurality of protection layers is formed on sidewalls of the hard mask layer and the conductive layer. The polarization adjustment material is patterned to form a polarization adjustment layer by using the plurality of protection layers and the hard mask as masks. The plurality of protection layers is removed. A portion of the conductive layer is laterally removed to form a first gate conductive layer.
    Type: Application
    Filed: July 21, 2022
    Publication date: January 4, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Yuan Yu Chung, Bo-Yu Chen, You-Jia Chang, Lung-En Kuo, Kun-Yuan Liao, Chun-Lung Chen
  • Patent number: 11864329
    Abstract: A method for manufacturing a fan-out chip packaging structure with decreased use of a crack-inducing hot-soldering process includes a first carrier plate with first and a second outer wiring layers. Two first conductive posts are formed on the first outer wiring layer, one end of each post is electrically connected to the first outer wiring layer. A receiving groove is formed between first conductive posts, and a sidewall of each post is surrounded by a first insulating layer. An embedded component is laid in the receiving groove and a second carrier plate is formed on the first insulating layer, wherein the second carrier plate carries third and fourth outer wiring layers. A first outer component is connected to the second outer wiring layer, and a second outer component is connected to the fourth outer wiring layer.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: January 2, 2024
    Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.
    Inventors: Chih-Chieh Fu, Yuan-Yu Lin, Ze-Jie Li
  • Publication number: 20230418912
    Abstract: A medical data ownership management method comprises: Granting a first authority to a medical unit where the first authority allows the medical unit to generate a first medical object with its corresponding first non-fungible token (NFT) storing on a blockchain. Granting a second authority to a research unit, where the second authority allows the research unit to access the first medical object, and the research unit processes the first medical object to generate the second medical object with its corresponding second NFT storing on the blockchain. Finally, granting a third authority to a user unit, where the third authority allows the user unit to access the second medical object. The access control and ownership transfer of each medial object in the blockchain are achieved by trading the corresponding NFT and modifying its subordinate list. With the management method, the security and the privacy of the medical data will be enhanced.
    Type: Application
    Filed: October 14, 2022
    Publication date: December 28, 2023
    Inventors: ZON-YIN SHAE, JING-PHA TSAI, CHI-YU CHANG, YUAN-YU TSAI, KUN-YI CHEN
  • Publication number: 20230419166
    Abstract: Some disclosed embodiments are directed to computing systems having different accelerators such that a first set of accelerators has a greater memory capability than a second set accelerators, while the second set of accelerators has a greater processing capability than the first set of accelerators. A machine learning model having different dense layers and sparse layers is distributed on the different accelerators such that the dense layers are distributed on one or more accelerators selected from the first set of accelerators and the sparse layers are distributed on one or more accelerators in the second set of accelerators.
    Type: Application
    Filed: June 24, 2022
    Publication date: December 28, 2023
    Inventors: Devangkumar Rameshbhai PATEL, Wei ZUO, Yuan YU
  • Publication number: 20230404346
    Abstract: A device for conducting motor recognition and protection is disclosed. The device comprises a current detection circuit and a microprocessor, of which the current detection circuit is used for detecting an operation current from a roller brush driving motor that is integrated in a suction head of a vacuum cleaner. Moreover, the microprocessor is configured for determining a product model of the roller brush driving motor based on the operation current, deciding a protection parameter set according to the product model, and conducting a motor protection for the roller brush driving motor after loading at least one motor protection parameter contained by the protection parameter set.
    Type: Application
    Filed: May 24, 2023
    Publication date: December 21, 2023
    Applicant: PROLIFIC TECHNOLOGY INC.
    Inventors: CHIA-CHANG HSU, REN-YUAN YU
  • Publication number: 20230384537
    Abstract: A method of making a semiconductor device includes defining an opening extending from a first side of a substrate to a second side of the substrate, wherein the first side of the substrate is opposite the second side of the substrate. The method further includes depositing a dielectric material into the opening, wherein the dielectric material has a first refractive index. The method further includes etching the dielectric material to define a core opening extending from the first side of the substrate to the second side of the substrate. The method further includes depositing a core material into the core opening, wherein the core material has a second refractive index different from the first refractive index, and the core material is optically transparent. The method further includes removing excess core material from a surface of the substrate.
    Type: Application
    Filed: July 25, 2023
    Publication date: November 30, 2023
    Inventors: Yu-Hao CHEN, Chung-Ming WENG, Tsung-Yuan YU, Hui Yu LEE, Hung-Yi KUO, Jui-Feng KUAN, Chien-Te WU
  • Publication number: 20230371696
    Abstract: A seat apparatus having a simulated force feedback and a method for simulating a force sensation of driving are provided. The seat apparatus includes a seating unit, a rotary platform, and a realistic seat pallet. The seating unit includes a seat pan. The rotary platform includes a chassis and a rotary motive module. The seat pan is disposed on the chassis along a rotation axis in an inclinable manner. The rotary motive module can control the seat pan to have a forward or rearward inclined angle. The realistic seat pallet is disposed on the seat pan, and includes a movable contact cushion and a pallet motive module. Through the pallet motive module, the movable contact cushion is slidable relative to the seat pan. The pallet motive module can control the movable contact cushion to have left and right displacements, front and rear displacements, angular displacements, or yaw rotations.
    Type: Application
    Filed: May 9, 2023
    Publication date: November 23, 2023
    Inventors: SHIANG-FONG CHEN, Bo-Ting Lin, CHI PAN, TZU-YUAN YU
  • Publication number: 20230378140
    Abstract: A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through substrate via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through substrate via.
    Type: Application
    Filed: August 1, 2023
    Publication date: November 23, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Yi Tsai, Cheng-Chieh Hsieh, Tsung-Hsien Chiang, Hui-Chun Chiang, Tzu-Sung Huang, Ming-Hung Tseng, Kris Lipu Chuang, Chung-Ming Weng, Tsung-Yuan Yu, Tzuan-Horng Liu
  • Patent number: 11825009
    Abstract: An in-vehicle entertainment system having functionality of operation interface switchable is disclosed. The system comprises an in-vehicle host electronic device and a hub having a host-to-host transmission function. After at least two mobile electronic devices are coupled to the hub, the in-vehicle host electronic device firstly prioritizes a communication order between the two mobile electronic devices, and then lets a display unit show an operation interface (like CarPlay operation interface) corresponding to the mobile electronic device that is prioritized with a first ranked communication order. Moreover, in case of a peripheral electronic device being coupled to the hub as well as the display unit being showing the operation interface, the in-vehicle host electronic device is allowed to access a peripheral electronic device through the hub.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: November 21, 2023
    Assignee: PROLIFIC TECHNOLOGY INC.
    Inventors: Hsing-Yun Hsieh, Ting-Ta Chien, Ren-Yuan Yu
  • Publication number: 20230367062
    Abstract: Disclosed are semiconductor packages and manufacturing method of the semiconductor packages. In one embodiment, a semiconductor package includes a substrate, a first waveguide, a semiconductor die, and an adhesive layer. The first waveguide is disposed on the substrate. The semiconductor die is disposed on the substrate and includes a second waveguide aligned with the first waveguide. The adhesive layer is disposed between the first waveguide and the second waveguide.
    Type: Application
    Filed: July 25, 2023
    Publication date: November 16, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Hua-Kuei Lin, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Che-Hsiang Hsu, Chewn-Pu Jou, Cheng-Tse Tang
  • Patent number: 11809000
    Abstract: A photonic integrated circuit includes a substrate, an interconnection layer, and a plurality of silicon waveguides. The interconnection layer is over the substrate. The interconnection layer includes a seal ring structure and an interconnection structure surrounded by the seal ring structure. The seal ring structure has at least one recess from a top view. The recess concaves towards the interconnection structure. The silicon waveguides are embedded in the substrate.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: November 7, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Yuan Yu, Hung-Yi Kuo, Cheng-Chieh Hsieh, Hao-Yi Tsai, Chung-Ming Weng, Hua-Kuei Lin, Che-Hsiang Hsu
  • Patent number: 11807582
    Abstract: Disclosed are a silicon nitride ceramic sintered body and a preparation method thereof. The silicon nitride ceramic sintered body has a content of a silicon nitride crystalline phase of not less than 98 wt %, a relative density of not less than 99%, a porosity of not larger than 1%, a grain boundary phase including Li, O, N, and Si elements, and a total content of C, F, Al, Mg, K, Ca, Na and rare-earth metals elements of less than 0.1 wt %.
    Type: Grant
    Filed: July 7, 2023
    Date of Patent: November 7, 2023
    Assignees: Lanzhou Institute of Chemical Physics, CAS, Yantai Zhongke Research Institute of Advanced Materials and Green Chemical Engineering, Shandong Laboratory of Yantai Advanced Materials and Green Manufacturing
    Inventors: Lujie Wang, Zhuhui Qiao, Tongyang Li, Ziyue Wang, Yuan Yu, Huaguo Tang
  • Publication number: 20230352327
    Abstract: A method of cleaning a nozzle of a gas supply system includes loading an apparatus including a carrier and an automated nozzle cleaning system in the carrier onto a load port containing a gas supply system. The automated nozzle cleaning system includes a first nozzle cleaning device, a second nozzle cleaning device and a monitoring device, and the carrier is positioned to enable a gas inlet of the carrier to be connected to a nozzle of the gas supply system. The method also includes vacuuming contaminant particles from the nozzle using the first nozzle cleaning device, mechanically removing the contaminant particles adhering to the nozzle off the nozzle using the second nozzle cleaning device, and measuring a level of the contaminant particles using the monitoring device.
    Type: Application
    Filed: July 6, 2023
    Publication date: November 2, 2023
    Inventors: Guan Jung CHEN, Shi-Ming WANG, Chia-Hung TSAI, Yuan-Yu FENG
  • Publication number: 20230354534
    Abstract: A PCI-E expansion card module is configured to insert in a slot with a rotation switch. The PCI-E expansion card module includes a PCI-E expansion card body and an unlock mechanism. The PCI-E expansion card body includes an inserting portion and a positioning hook. The unlock mechanism is disposed beside the PCI-E expansion card body, and the unlock mechanism includes a pushing member. When the PCI-E expansion card body is inserted into the slot, the rotation switch is on a moving path of the pushing member. The pushing member moves and pushes the rotation switch to release a limitation of the PCI-E expansion card body.
    Type: Application
    Filed: October 26, 2022
    Publication date: November 2, 2023
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Xu Wang, Hui He, Wei Tang, Jung-Kai Chang, Yuan-Yu Lin