Abstract: A displaying base plate and a manufacturing method thereof, and a displaying device. The displaying base plate includes a substrate, and a first electrode layer disposed on one side of the substrate, wherein the first electrode layer includes a first electrode pattern; a first planarization layer disposed on one side of the first electrode layer that is away from the substrate, wherein the first planarization layer is provided with a through hole, and the through hole penetrates the first planarization layer, to expose the first electrode pattern; and a second electrode layer, a second planarization layer and a third electrode layer that are disposed in stack on one side of the first planarization layer that is away from the substrate, wherein the second electrode layer is disposed closer to the substrate, the second electrode layer is connected to the first electrode pattern and the third electrode layer.

Abstract: A communication system, including a first carrier and a first antenna mounted on the first carrier; a second carrier and a second antenna mounted on the second carrier, wherein the first antenna and the second antenna are arranged relative to each other that the first antenna and the second antenna can establish wireless link; a third carrier and a third antenna mounted on the third carrier; a fourth carrier and a fourth antenna mounted on the fourth carrier, wherein the third antenna and the fourth antenna are arranged relative to each other that the third antenna and the fourth antenna can establish wireless link; and a transmission structure, within which the signal propagate through, connects the second antenna and the third antenna.

Abstract: A power converter comprises a chassis and an AC connector, a low-voltage DC connector and a high-voltage DC connector at an exterior surface of the chassis. An AC-DC converter circuit is positioned at least partially within the chassis and is coupled to the AC connector. A first converter circuit is positioned at least partially within the chassis and is coupled to the AC-DC converter circuit and to a high-voltage DC bus. The high-voltage DC bus is connected to the high-voltage DC connector. A second converter circuit is positioned at least partially within the chassis and is coupled to the high-voltage DC bus to a low-voltage DC bus. The low-voltage DC bus is connected to the low-voltage DC connector.

Abstract: Described herein is a method for preparing acesulfame potassium, comprising: pressing an acetoacetamide-N-sulfonic acid triethylamine salt solution and a cyclizing agent solution into a Venturireactor via different inlets, mixing same at a mixing section and a diffusion section of the Venturireactor, and then injecting the obtained mixture into a flow reactor, wherein the cyclizing agent solution is formed by dissolving sulfur trioxide in a first organic solvent; subjecting the mixture passing through the flow reactor to a sulfonation cyclization reaction under the action of a supported solid base heterogeneous catalyst preset in the flow reactor, and entering the obtained sulfonated cyclized product into a hydrolysis reactor; subjecting the sulfonated cyclized product and a hydrolysis agent preset in the hydrolysis reactor to a hydrolysis reaction to obtain a hydrolysis product solution; and adding potassium hydroxide into an organic phase of the hydrolysate solution for a salt-forming reaction to obtain the

Abstract: Described herein is a method for preparing acesulfame potassium, comprising: adding triethylamine to a sulfamic acid solution, and carrying out an amination reaction to produce a sulfamic acid ammonium salt solution; adding diketene to the obtained sulfamic acid ammonium salt solution, and under the action of a solid superacid catalyst, carrying out an acylation reaction to obtain an intermediate solution; dissolving sulfur trioxide in a solvent to form a cyclizing agent solution; adding the cyclizing agent solution to the intermediate solution, and carrying out a sulfonation cyclization reaction to obtain a cyclized product solution; adding a hydrolysis agent to the cyclized product solution, and carrying out a hydrolysis reaction to obtain a hydrolysis product solution; and adding a potassium hydroxide solution to the organic phase of the hydrolysis product solution to obtain acesulfame potassium.

Abstract: A device for removing iron from a nickel-cobalt-manganese sulfuric acid solution and a method for continuously removing iron ions from a nickel-cobalt-manganese sulfuric acid solution. The device has an iron removal reactor (2) having a stirrer (3) and an iron removal reactor inner cylinder (5) and an aging reactor (9) having an aging reactor stirrer (7) and an automatic stone powder feeder (8), a mixing feed pipe (12) and a carbonate solution feed pipe (4) are arranged in an interlayer between the iron removal reactor (2) and the iron removal reactor inner cylinder (5), a mixer (1) for a preheating the device is arranged at a top of the mixing feed pipe (12), a compressed air inlet (11) and a feed inlet (10) of a solution to be subjected to iron removal are arranged in the mixer (1). Further disclosed is a method for removing iron of the device.

Abstract: The present invention therefore pertains to a process for desulfurizing a sulfur compound-containing liquid fossil fuel. By continuously adding a solution comprising an oxidant to the sulfur compound-containing liquid fossil fuel, it is possible to improve oxidant utilization and achieve higher sulfur removal rate.

Abstract: A method for forming an active region array and a semiconductor structure are provided. The method for forming the active region array includes the steps of: providing a substrate; forming a first mask layer on a surface of the substrate, a first etched pattern being provided in the first mask layer; forming a second mask layer covering a surface of the first mask layer; forming a third mask layer having a second etched pattern on a surface of the second mask layer; forming a flank covering a sidewall of the second etched pattern; removing the third mask layer to form a third etched pattern between adjacent flanks; etching the first mask layer along the third etched pattern to form a fourth etched pattern in the first mask layer; and etching the substrate along the first etched pattern and the fourth etched pattern, to form multiple active regions in the substrate.

Abstract: A method for forming a storage node contact structure and semiconductor structure are provided. The method includes providing a substrate having a surface on which bit line structures are formed; forming a groove at a part, corresponding to an active region, of bottom of the contact hole; and growing a silicon crystal from the groove in the contact hole by using an epitaxial growth process, and controlling growth rates of the silicon crystal in a first and second directions in a growth process to enable the growth rate of the silicon crystal in the first direction to be greater than the growth rate of the silicon crystal in the second direction at beginning of growth and enable the growth rate of the silicon crystal in the first direction to be equal to the growth rate of the silicon crystal in the second direction at end of the growth.

Abstract: In various aspects, a device-to-device communication system is provided including a first device and a second device. Each of the first device and the second device includes an antenna, a radio frequency frond-end circuit, and a baseband circuit. Each of the first device and the second device are at least one of a chiplet or a package. The device-to-device communication system further includes a cover structure housing the first device and the second device. Each of the first device and the second device are at least one of a chiplet or a package. The device-to-device communication system further includes a radio frequency signal interface wirelessly communicatively coupling the first device and the second device. The radio frequency signal interface includes the first antenna and the second antenna.

Abstract: A method for manufacturing a memory includes: providing a substrate and multiple discrete pseudo bit line contact layers, a plurality of active areas being provided in the substrate, and each bit line contact layer being electrically connected to the active areas; forming pseudo bit line structures at tops of the pseudo bit line contact layers; forming sacrificial layers that fill regions between the adjacent pseudo bit line structures and are located on side walls of the pseudo bit line structures and the pseudo bit line contact layers; after forming the sacrificial layers, removing the pseudo bit line structures to form through holes exposing the pseudo bit line contact layers; removing the pseudo bit line contact layers to form through holes in the substrate; and forming bit line contact layers that fill the through holes in the substrate and are electrically connected to the active areas.

Abstract: Embodiments of a microelectronic assembly comprise a package substrate, a first integrated circuit (IC) die, a second IC die between the first IC die and the package substrate, a dielectric material between the first IC die and the package substrate, and a plurality of vias through the dielectric material, the vias coupling the first IC die and the package substrate. The microelectronic assembly is in a space defined by three mutually orthogonal axes, a first axis, a second axis and a third axis; the package substrate, the first IC die and the second IC die are mutually parallel in first planes defined by the first axis and the third axis; the vias are in one or more second planes defined by the second axis and the third axis; and the vias are inclined at an angle not equal to ninety degrees around the first axis.

Abstract: The present disclosure provides antibodies or antigen-binding fragments thereof that specifically bind to the cis conformation of phosphorylated-Threonine231-Proline (pThr231-Pro) of tau protein. This disclosure also provides methods for treating a subject having or at risk of developing a neurological disorder. This disclosure includes related pharmaceutical compositions, polynucleotides, vectors, host cells, methods of production, methods of treatment, diagnostic methods, and kits.

Abstract: A system and a method of testing a specimen. The system includes an endcap, a plurality of bars, a plurality of strain gauges, and a gas gun. The endcap includes a first surface and a second surface opposite to the first surface. The first surface is curved. Each bar is disposed in contact with the second surface of the endcap and extends along a longitudinal axis. Each strain gauge is disposed on a surface of a corresponding bar from the plurality of bars. At least one strain gauge is disposed on the surface of each bar. The gas gun is configured to fire a specimen towards the first surface of the endcap such that the specimen impacts the first surface at an oblique angle relative to the longitudinal axis.

Abstract: Methods, apparatus, systems and articles of manufacture to deduplicate duplicate memory in a cloud-computing environment are disclosed herein. An example apparatus to deduplicate duplicate memory comprises a parser to parse process information corresponding to instances of an application, a group generator to group process information into application groups based on the process information indicating instances corresponding to the same directory paths and application names, a data structure generator to generate a pair of binary search trees for an application group, and a merge controller to deduplicate duplicate memory contents detected in the application group.

Abstract: A power converter comprises a chassis and an AC connector, a low-voltage DC connector and a high-voltage DC connector at an exterior surface of the chassis. An AC-DC converter circuit is positioned at least partially within the chassis and is coupled to the AC connector. A first converter circuit is positioned at least partially within the chassis and is coupled to the AC-DC converter circuit and to a high-voltage DC bus. The high-voltage DC bus is connected to the high-voltage DC connector. A second converter circuit is positioned at least partially within the chassis and is coupled to the high-voltage DC bus to a low-voltage DC bus. The low-voltage DC bus is connected to the low-voltage DC connector.

Abstract: A disk-drive suspension includes a load beam, a flexure laid on top of the load beam, a first terminal provided on the flexure, and a first bump arranged on a top surface of the first terminal. The first terminal includes a narrow part having a first width in a first direction and including a center of the first terminal, and a wide part having a second width in the first direction greater than the first width. The wide part and the narrow part are arranged in a second direction intersecting the first direction. The first bump has, at the center, a first height from a bottom surface of the first terminal. The first height is greater than the first width.

Abstract: Systems, apparatuses and methods may be associated with a first computing device and provide for identifying performance metrics. The performance metrics are associated with execution of a first function on at least one second computing device. The systems, apparatuses and methods aggregate the performance metrics to generate aggregated performance metrics, determine that the aggregated performance metrics meet a threshold and compile code associated with the first function in response to the aggregated performance metrics being determined to meet the threshold.

Abstract: An integrated voltage regulator comprises a plurality of semiconductor devices and a circuit board including a plurality of thermally conductive inlays. At least one of the plurality of electronic devices is thermally coupled to at least one of the plurality of thermally conductive inlays. A substrate is thermally coupled to the circuit board and to the plurality of thermally conductive inlays.

Abstract: A medical image processing apparatus according to an embodiment includes processing circuitry. The processing circuitry detects, for each of target points corresponding to feature points, a reference point having a spatial correlation with the target point in a medical image. The processing circuitry generates candidate points corresponding to the target point for each of the target points by using a detection model. The processing circuitry selects, for each of the target points, a candidate point based on a position feature indicating a spatial position relationship between the target point and the reference point. The processing circuitry selects, for each of a plurality of candidate point combinations, a candidate point combination based on a structural feature indicating a spatial structural relationship between the target points. The processing circuitry outputs feature points in the medical image based on the selected candidate point and candidate point combination.