Wafer aligner

- Hiwin Technologies Corp.
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Description

FIG. 1 is a perspective view of a wafer aligner showing our new design;

FIG. 2 is a front view thereof;

FIG. 3 is a rear view thereof;

FIG. 4 is a left side view thereof;

FIG. 5 is a right side view thereof;

FIG. 6 is a top plan view thereof; and,

FIG. 7 is a bottom plan view thereof.

The broken lines show portions of a wafer aligner that form no part of claimed design.

Claims

The ornamental design for a wafer aligner, as shown and described.

Referenced Cited
U.S. Patent Documents
D323173 January 14, 1992 Ishii
D580061 November 4, 2008 Adams
D583059 December 16, 2008 Adams
D612879 March 30, 2010 Nagasaka
D776290 January 10, 2017 Wan
D783692 April 11, 2017 Strothmann
D798349 September 26, 2017 Li
D843006 March 12, 2019 Huang
D914884 March 30, 2021 Glassett
D917585 April 27, 2021 Okuma
D927565 August 10, 2021 Yao
D976971 January 31, 2023 Chen
Patent History
Patent number: D1003327
Type: Grant
Filed: Dec 13, 2021
Date of Patent: Oct 31, 2023
Assignee: Hiwin Technologies Corp. (Taichung)
Inventors: Jonus Liu (Taichung), Jheng-Fu Huang (Taichung), Yi-Chan Tseng (Taichung), Shou-Yang Huang (Taichung)
Primary Examiner: Omeed Agilee
Assistant Examiner: Fritzgerald L Butac
Application Number: 29/790,740