Gas diffusion plate for electrode of semiconductor wafer processing apparatus

- Tokyo Electron Limited
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Description

FIG. 1 is a bottom view of a gas diffusion plate for electrode of semiconductor wafer processing apparatus showing our new design;

FIG. 2 is a top view thereof;

FIG. 3 is a right elevational view thereof, the left elevational view thereof being a mirror image and, therefore, not shown;

FIG. 4 is a front elevational thereof, the rear elevational view thereof being a mirror image and, therefore, not shown;

FIG. 5 an enlarged sectional view of on section 5--5 in FIG. 1;

FIG. 6 an enlarged sectional view of on section 6--6 in FIG. 1; and,

FIG. 7 is a bottom/rear perspective view thereof.

Referenced Cited
U.S. Patent Documents
D363464 October 24, 1995 Fukasawa
Foreign Patent Documents
952210 April 1996 JPX
952210 May 1996 JPX
Patent History
Patent number: D411516
Type: Grant
Filed: Sep 10, 1996
Date of Patent: Jun 29, 1999
Assignee: Tokyo Electron Limited (Tokyo-To)
Inventors: Kosuke Imafuku (Kofu), Shosuke Endo (Nirasaki), Kazuo Fukasawa (Kofu)
Primary Examiner: Brian N. Vinson
Law Firm: Ladas & Parry
Application Number: 0/59,398
Classifications
Current U.S. Class: Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;