Abstract: A mechanical actuating device for moving an aerodynamic or hydrodynamic surface includes plural flexure members confined in an elastically deformed condition. The flexure members are movable against the force generated by their elastic deformation to move the device into one of at least three stable positions, in which the device, and therefore the aerodynamic or hydrodynamic surface, are held by the force generated by elastic deformation of the flexure members. Since the flexure members are always elastically deformed, the device “snaps” between discrete, stable positions and is held firmly in each. In another embodiment more flexure members can be used to provide additional stable positions. In one application, the actuating device is used as a trailing edge tab for a helicopter or tiltrotor blade to reduce 1/rev vibrations. The device can be actuated manually or electrically using shape-memory alloy wires to snap the flexure members into their various stable positions.

Abstract: A holder can hold a flat cable without forming a through opening in the flat cable and without breaking it during an attaching work. A holder (12) comprises a substantially flat plate-like main body member (13), a band member (15) for clamping a flat cable (11) in cooperation with the main body member (13) so that a surface of the main body member (13) presses the flat cable (11), and a self-locking member (17) provided on a rear side of the main body member (13) and adapted to engage with a vehicle panel (18). The main body member (13) is provided on its surface with an elongated rib (20) that contacts the flat cable (11) in cooperation with the band member (15).

Abstract: The device according to the present invention for connection between a roller shaft support and at least one slideway for laterally holding a shade body of a closure or solar protection installation, comprises at least one connection tab adapted to engage, on the one hand, with the slideway and, on the other hand, with the support. It is characterized in that it comprises an elastic member for locking the tab with the support by cooperation of shapes, this member comprising at least an elastically deformable first tongue equipped with a first beak adapted to clip against a surface of the tab and at least an elastically deformable second tongue equipped with a second beak adapted to clip against a surface of the support. This elastic member is adapted to form a stop against the displacement of the connection tab with respect to the support in a sense of separation of the tab with respect to the support.

Abstract: A device for holding reading or writing material or a laptop in a laying or seated position includes two board-like, trapezoidal side panels [112, 114] made of wood product, a cross-beam [16, 115] made of wood product holding the side panels together and preventing one panel moving with respect to the other, a support plate [20, 120] made of plywood, the position of which can be adjusted in relation to the side panels, and a device [22, 24; 122, 124] for setting the different positions of the support plate in relation to the side panels one of which contains a row of holes [24, 124] into which a pin [22, 122] can be inserted to hold the support plate in the desired position whereby insertion of the pin (122) in a hole [124a] and the stopper [127] allow for the support plate to be horizontally positioned.

Abstract: The invention provides a two-dimensional image detector having superior uniformity in thickness and composition of a photoconductive layer with respect to the entire substrate, and a method of productively (efficiently) and inexpensively manufacturing such a two-dimensional image detector. The two-dimensional image detector includes at least an active matrix substrate 1 having a plurality of pixel electrodes 10, and a photoconductive layer 2 stacked on the pixel electrodes 10, wherein the photoconductive layer 2 is transferred to the active matrix substrate 1 after being formed in a predetermined thickness on a transfer substrate. That is, a fabrication method of the two-dimensional image detector is the method in which the photoconductive layer 2 is formed in advance in a predetermined thickness on the transfer substrate and then transferred on the active matrix substrate 1. The photoconductive layer 2 includes a mixture of particulate photoconductors and a binder.

Abstract: An active pixel sensor including low threshold voltage transistors advantageously provides an increased output swing over an active pixel sensor of the prior art. The low threshold voltage transistor can be achieved using either a native transistor or a depletion mode transistor. In a process in which a threshold adjustment implant step is separately masked, the active pixel sensor of the present invention can be manufactured with no additional masking requirements. In one embodiment, a low threshold voltage (VTN) allows a transistor acting as a reset switch to operate in the linear region, and allowing the reset switch transistor to share a common supply voltage source with a readout amplifier transistor.

Abstract: A plasma mass spectrometer comprises a plasma torch (1) for generating ions from a sample introduced into a plasma (2), a nozzle-skimmer interface (3, 5) for transmitting said ions into a first evacuated chamber (11), ion guiding means (12), an apertured diaphragm (18) dividing said first evacuated chamber (11) from a second evacuated chamber, and an ion mass-to-charge ratio analyzer in the second chamber for producing a mass spectrum. The ion guiding means comprises a multipole rod-set (13, 14, 15), means for applying an AC voltage between rods in the set, and means (22) for introducing into said ion guiding means an inert gas selected from the group comprising helium, neon, argon, krypton, xenon and nitrogen so that the partial pressure of said inert gas inside said rod-set is at least 10−3 torr.

Abstract: A method of producing a broad-band signal including a plurality of component frequencies of regular or irregular intervals, where the broad-band signal is used to apply an alternating voltage to the end cap electrodes of an ion trap mass spectrometer. The method includes the following steps: (S3) a sinusoidal signal having one of the component frequencies with 0° initial phase angle is generated; (S4) the sinusoidal signal is added to a current temporary superposed signal to produce an addition signal; (S5) the sinusoidal signal is subtracted from the current temporary superposed signal to produce a subtraction signal; (S6-S12) either of the addition signal or the subtraction signal is selected that has a smaller amplitude as a next temporary superposed signal; and (S13) the steps are repeated for all the component frequencies.

Abstract: Methods are provided for exposing a selected feature of an IC device, such as a selected conductor, from the back side of the substrate without disturbing adjacent features of the device, such as active regions. One such method comprises: (a) determining a region of the IC device in which the selected feature is located; (b) acquiring from the back side of the substrate an IR optical microscope image of the region; (c) aligning the IR optical microscope image with a coordinate system of a milling system; and (d) using structures visible in the IR optical microscope image as a guide, operating the milling system to expose the selected feature from the back side of the IC device without disturbing adjacent features.

Abstract: The present invention is intended to prevent the deterioration of resolution due to increase in off-axis aberration resulting from the deviation of a primary electron bean from the optical axis of a scanning electron microscope. A scanning electron microscope is provided with an image shifting deflector system including two deflectors disposed respectively at upper and lower stages. The deflector disposed at the lower stage is a multipole electrostatic deflecting electrode and is disposed in an objective. Even if the distance of image shifting is great, an image of a high resolution can be formed and dimensions can be measured in a high accuracy. The SEM is able to achieving precision inspection at a high throughput when applied to inspection in semiconductor device fabricating processes that process a wafer having a large area and provided with very minute circuit elements.

Abstract: A transmission electron microscope (TEM) equipped with an energy filter which functions, the microscope being characterized in that rotation of the created image or diffraction pattern is prevented. The microscope has 6 lens systems, i.e., objective lens system, four intermediate lens systems, and projector lens system. If the mode of operation is varied, the total sum of the products of the numbers of turns of wire on the coils of the lenses of the various lens systems including the objective lens system, the four intermediate lens systems, and the projector lens system, and their respective excitation currents is kept constant.

Abstract: Methods and apparatus are provided which improve the performance of electron imaging detectors by reducing the total interaction volume of the detector and/or reducing the energy converting volume of the detector. In one embodiment, a method for improving resolution and reducing noise in an imaging electron detector for an electron microscope is provided and includes the step of decelerating the energetic electrons either before the electrons interact with, or as the electrons interact with, the energy converting volume of an imaging electron detector. In other embodiments, the lateral spatial travel of energetic electrons is limited as they traverse the imaging electron detector, or, the extent of electron back scatter from the energetic electrons is limited.

Abstract: An infrared photosensitive area is constituted by an infrared ray absorbing part that is heated by infrared rays, a thermal detector that detects the temperature change of the infrared ray absorbing part, and electrodes that are electrically connected to the thermal detector. The infrared photosensitive area is held up above one surface of a substrate by supports. The electrodes of the infrared photosensitive area are electrically connected to contact pads on the substrate by wiring material that constitutes the support. A shield projects from portions of the infrared ray absorbing part other than portions that correspond to the electrodes. The contact pads of the substrate and the surfaces of the electrodes and the supports that are directed away from the substrate are covered by the shield with an interposed space. This configuration enables an increase in the fill factor of the picture elements of the thermal infrared detector and enables greater absorption of infrared light.

Abstract: A two-dimensional image detector that allows charges generated by each photoconductor particle to be smoothly transmitted through a photoconductive layer and thereby ensures effective transmission of charges generated in the photoconductive layer to an active matrix substrate. A two-dimensional image detector of the present invention includes at least an active matrix substrate 1 having a plurality of pixel electrodes 10, and a photoconductive layer 2 laminated on the pixel electrodes 10. The photoconductive layer 2 is composed of a particulate photoconductor, and a binder containing a resin that renders volumetric shrinkage upon reaction. In other words, the foregoing binder contains either (i) a resin that undergoes volumetric shrinkage when it reacts per se (polymerization, cross-linking, or decomposition), (ii) a polymerizable monomer to form a resin, or (iii) a solvent along with the foregoing resin or polymerizable monomer.

Abstract: Methods and devices are disclosed for aligning a beam-propagation axis with the center of an aperture, especially an aperture configured to limit the aperture angle of the charged particle beam. In an exemplary method, an alignment-measurement aperture is provided at an imaging plane of a charged-particle-beam (CPB) optical system, and a beam detector is downstream of the alignment-measurement aperture. A scanning deflector is energized to cause the beam to be scanned in two dimensions, transverse to an optical axis, over the aperture. Meanwhile, the beam detector obtains an image of beam intensity in the two dimensions. In the image a maximum-intensity point is identified, corresponding to the propagation axis. Based on the two-dimensional image, the beam is deflected as required to align the propagation axis with the aperture center.

Abstract: A surface inspection device irradiates a laser beam onto the surface of a sample, scans the surface two-dimensionally, and detects the intensities of the s-polarized light component and p-polarized light component of the reflected laser beam. RR (reflectance ratio), which is the ratio of the reflective intensities of the s- and p-polarized light components, is calculated for each position of the surface of the sample, and the two-dimensional distribution of RR on the surface of the sample is detected. The distribution width of this measured RR is compared with the natural width for a clean sample, and the surface of the sample is determined to be contaminated when, as the result of comparison, the RR distribution width diverges from the natural width. The absence or presence of contamination on the microscopically rough surface of a sample can therefore be quickly and easily determined based on the RR of the reflective intensities of the s- and p-polarized light components.

Abstract: Disclosed is a system for and method of reading out a storage phosphor screen (or a storage phosphor sheet or an imaging plate) sensitive to radiation in which, in performing a radiography by using the storage phosphor screen, the storage phosphor screen is stimulated optically to induce luminescence according to a response to radiation to acquire a digital image of a subject from the storage phosphor screen by using a semiconductor light source array as a stimulating light source to which an optical fiber array consisting of a bundle of optical fibers having a diverse forms is connected; a starting of the semiconductor light source array is controlled with an electric pulse; and a semiconductor light source array starting pulse for generating a stimulating light is interlocked with a photomultiplier tube for collecting a luminescence light signal induced from the storage phosphor screen by the stimulating light to represent the collected luminescence light as distribution of a two-dimensional position to acq

Abstract: A valve has a valve body having a passage including a hole in which gas flows. A valve disc is provided for closing the hole, and an actuator is provided for operating the valve disc. An emergency cutoff device is provided so that the valve disc closes the hole in an emergency when electric power supply is cut off.

Abstract: The invention relates to a liquid-crystalline medium based on a mixture of polar compounds having negative dielectric anisotropy, characterized in that it comprises one or more compounds of the general formula I 1

Abstract: Luminescent polymers are prepared from thermosetting unsaturated polyesters, suspending fillers and phosphorescent pigments and utilized to make gel coated articles and molded, cast and fiberglass reinforced plastic (FRP) articles. The luminescent polymers show bright and long-lasting photoluminescent afterglow, strong thermostimulation of afterglow by heat and electroluminescent properties. The preferred thermosetting unsaturated polyester resins are prepared by condensing mixtures of ethylenically unsaturated and aromatic dicarboxylic acids and anhydrides with dihydric alcohols and a polymerizable vinylidene monomer. Phthalic (orthophthalic) and isophthalic aromatic modified polyesters and their substituted derivatives are preferred, particularly those formed from maleate or fumarate unsaturated dicarboxylic acids and anhydrides and a glycol or mixtures of glycols. The preferred monomer is styrene.

Abstract: A ZnO phosphor of a red luminous color capable of being increased in luminous efficiency. A the Zn3.5Y0.92Eu0.08O5 phosphor which is an example of the present invention is manufactured by immersing 117 mmol of ZnO:Zn in an aqueous solution in which 1.84 mmol of YCl3 and 0.16 mmol of EuCl3 are dissolved. Excessive water is vaporized by heating the solution to a temperature of 300° C. This results in pink porous blocks being obtained, which are then placed in a crucible. The crucible is heated at 100° C. for two hours, so that a white powder of a red luminous color is obtained. The powder has main peaks at 612 nm and 702 nm. A luminous spectra of the phosphor indicates that it exhibits enhanced luminous efficiency.

Abstract: This invention provides a safety mechanism for a winch assembly when storing a load, such as a tire under a vehicle or a boat on a trailer, in a raised or stored position. The invention finds particular application to a spare tire, but those skilled in the art will appreciate the broader benefits of such a structure when used with a winch assembly for other uses such as a boat winch for a trailer or any analogous use wherein it is desirable to secure a load in the raised or stored position.

Abstract: An active matrix substrate plate having superior properties is manufactured at high yield using four photolithographic fabrication steps. In step 1, the scanning line and the gate electrode extending from the scanning line are formed in the glass plate. In step 2, the gate insulation layer and the semiconductor layer comprised by amorphous silicon layer and n+ amorphous silicon layer is laminated to provide the semiconductor layer for the TFT section. In step 3, the transparent conductive layer and the metallic layer are laminated, and the signal line, the drain electrode extending from the signal line, the pixel electrode and the source electrode extending from the pixel electrode are formed, and the n+ amorphous silicon layer of the channel gap is removed by etching. In step 4, the protective insulation layer is formed, and the protective insulation layer and the metal layer above the pixel electrode are removed by etching.

Abstract: An LED component is provided, with light emission in the green-to-near UV wavelength range. The light-emitting semiconductor die is encapsulated with one or more silicone compounds, including a hard outer shell, an interior gel or resilient layer, or both. The silicone material is stable over temperature and humidity ranges, and over exposure to ambient UV radiation. As a consequence, the LED component has an advantageously long lifetime, in which it is free of “yellowing” attenuation which would reduce the green-to-near UV light output.

Abstract: An optical semiconductor device having a plurality of GaN-based semiconductor layers containing a strained quantum well layer in which the strained quantum well layer has a piezoelectric field that depends on the orientation of the strained quantum well layer when the quantum layer is grown. In the present invention, the strained quantum well layer is grown with an orientation at which the piezoelectric field is less than the maximum value of the piezoelectric field strength as a function of the orientation. In devices having GaN-based semiconductor layers with a wurtzite crystal structure, the growth orientation of the strained quantum well layer is tilted at least 1° from the {0001} direction of the wurtzite crystal structure. In devices having GaN-based semiconductor layers with a zincblende crystal structure, the growth orientation of the strained quantum well layer is tilted at least 1° from the {111} direction of the zincblende crystal structure.

Abstract: A semiconductor light emitting device includes a cladding layer having a first conductive type, an active layer, and a semiconductor layer including at least a cladding layer and having a second conductive type reversed to the first conductive type, which layers are sequentially stacked on a substrate; wherein a ridge is formed on part of an upper portion of the semiconductor layer; each of the cladding layer having the first conductive type, the active layer, and the semiconductor layer having the second conductive type is made from a nitride based group III-V compound semiconductor; and the width of the ridge is in a range of 1.9 to 2.6 &mgr;m. The semiconductor light emitting device is stably operable with an output of about 30 mW by setting a threshold current to 100 mA or less and also setting a horizontal angle to 6° or more.

Abstract: The invention provides a thin-film display system comprising, on the same substrate 1, a thin-film display device 9 driven at a current for each pixel to emit light and a silicon thin-film layer 2 on which a circuit for driving the thin-film display device 9 is formed. The display system further comprises a region where at least the thin-film display device 9 and the silicon thin-film layer overlap each other in a film thickness direction, so that a part of light emitted from the thin-film display device is taken out of that region.

Abstract: A semiconductor configuration has a substrate made of GaP and an epitaxial layer on the substrate. The expitaxial layer has an n-doped partial layer and a p-doped partial layer. A pn junction is formed at the boundary between the two partial layers. The epitaxial layer contains an impurity which is an element from the 3rd main group and/or from the 5th main group which is not identical to N. The impurity is present at a maximum concentration in the GaP epitaxial layer of between 1017 and 1018 cm−3.

Abstract: A SRAM memory cell including an access device formed on a storage device is described. The storage device has at least two stable states that may be used to store information. In operation, the access device is switched ON to allow a signal representing data to be coupled to the storage device. The storage device switches to a state representative of the signal and maintains this state after the access device is switched OFF. When the access device is switched ON, the state of the storage device may be sensed to read the data stored in the storage device. The memory cell may be formed to be unusually compact and has a reduced power supply requirements compared to conventional SRAM memory cells. As a result, a compact and robust SRAM having reduced standby power requirements is realized.

Abstract: A hydrogen barrier layer is formed above a ferroelectric thin film in an integrated circuit. The hydrogen barrier layer is directly over a protected segment of the ferroelectric thin film, while a sacrificial segment of the ferroelectric thin film extends laterally beyond the edges of the hydrogen barrier layer. The sacrificial segment absorbs hydrogen so that it cannot diffuse laterally into the protected segment of the ferroelectric thin film. After it absorbs hydrogen, the sacrificial segment is etched away to allow electrical connection to circuit layers below it. The ferroelectric thin film preferably comprises a layered superlattice compound. Excess bismuth or niobium added to the standard precursor solution of a strontium bismuth tantalum niobate compound helps to reduce hydrogen degradation of the ferroelectric properties.

Abstract: A highly reliable semiconductor device having an underlying film with a trench and a conducting material film formed in the trench, a method of manufacturing the same and a method of forming a resist pattern used therein are obtained The underlying film having an upper surface and the trench is formed. The conducting material film is formed on the upper surface and in the trench. A photo resist film is formed on the conducting material film located on the upper surface of the underlying film and in the trench. The photo resist film is left in the trench whereas the photo resist film is developed and removed outside the trench. The conducting material film located on the upper surface of the underlying film is etched and removed with the photo resist film left in the trench used as a mask.

Abstract: A MOS type semiconductor apparatus is provided which includes a main MOS type semiconductor device, an internal control circuit connected between a control input terminal (G) and a control input port (g) of the main MOS type semiconductor device, and a protecting device connected between the control input terminal (G) and one of output terminals (S) of the apparatus, for protecting the semiconductor device or internal control circuit against overvoltage. The protecting device includes a first branch including a Zener diode (Z1p) consisting of a polysilicon layer deposited on an insulating film over the semiconductor substrate, and a second branch including a Zener diode (Z21) formed in a surface layer of the semiconductor substrate, and a diode (Z3pr) that consists of a polysilicon layer deposited on an insulating film over the semiconductor substrate, and is connected in series with the Zener diode (Z21) in a reverse direction. The first and second branches are connected in parallel with each other.

Abstract: A source and a drain of a field-effect transistor are formed so as to fulfill a specified physical relationship to upper and lower gates thereof and thereby parasitic capacitance that hampers its high-speed operation is minimized. The filed-effect transistor includes a second support substrate, a lower gate that is embedded in an insulator formed on the second support substrate, an insulating layer formed on the lower gate, a semiconductor layer formed on the insulating layer, an insulating layer formed on the semiconductor layer, an upper gate formed on the insulating layer, as well as a source electrode, a drain electrode, an upper gate electrode, and a lower gate electrode all of which are isolated from one another by the insulating layer.

Abstract: The claimed invention relates to a semiconductor device and a method of fabricating the semiconductor device. More particularly, the claimed invention relates to a method of fabricating the semiconductor device in which parts of a gate electrode at the ends of a channel are lightly doped compared to the center part of the gate electrode, thereby eliminating a hump on a subthreshold current slope. To achieve the objects of the claimed invention, there is provided a semiconductor device that includes a semiconductor substrate divided into an isolation region and an active region. A gate oxide film is formed on a first upper surface of the active region. A gate electrode is formed on a second upper surface of the gate oxide film, the gate electrode having a first part and a second part. The first part is more lightly doped with impurities than the second part. A channel is formed in an upper end of the active region proximate the gate electrode.

Abstract: A bipolar transistor compatible with CMOS processes utilizes only a single layer of polysilicon while maintaining the low base resistance associated with conventional double-polysilicon bipolar designs. Dopant is implanted to form the intrinsic base through the same dielectric window in which the polysilicon emitter contact component is later created. Following poly deposition within the window and etch to create the polysilicon emitter contact component, large-angle tilt ion implantation is employed to form a link base between the intrinsic base and a subsequently-formed base contact region. Tilted implantation enables the link base region to extend underneath the edges of the polysilicon emitter contact component, creating a low resistance path between the intrinsic base and the extrinsic base. Fabrication of the device is much simplified over a conventional double-poly transistor, particularly if tilted implantation is already employed in the process flow to form an associated structure such as an LDMOS.

Abstract: The present invention provides a semiconductor device that has reduced a short-channel effect by preventing the effective channel length at the sides of a channel of a transistor from decreasing by forming the length of a gate electrode to be different according to the parts. The semiconductor device according to the present invention includes a semiconductor substrate including active regions where a semiconductor device is to be fabricated and isolation regions for electrically isolating the active regions. A gate electrode is formed to go across the active region. A source and a drain are formed in the active region at both sides of the gate electrode, wherein the length of the gate electrode on the upper surface of the sides of the active region is longer than the length of the gate electrode of the center of the active region.

Abstract: A semiconductor device has: a gate insulator film of a transistor formed in a predetermined region on a region of a first conductivity type; a gate electrode of the transistor formed on the gate insulator film; a diffusion layer of a second conductivity type formed on both sides of the gate insulator film on the region of the first conductivity type; and a diffusion layer of the first conductivity type formed on the region of the first conductivity type so as to surround the gate insulator film and the diffusion layer of the second conductivity type. The diffusion layer of the first conductivity type has a higher impurity concentration than the region of the first conductivity type. In such a semiconductor device, the diffusion layer of the first conductivity type is formed so as to be separated from the gate insulator film.

Abstract: Inner trenches (11) of a trenched Schottky rectifier (1a; 1b; 1c; 1d) bound a plurality of rectifier areas (43a) where the Schottky electrode (3) forms a Schottky barrier 43 with a drift region (4). A perimeter trench (18) extends around the outer perimeter of the plurality of rectifier areas (43a). These trenches (11, 18) accommodate respective inner field-electrodes (31) and a perimeter field-electrode (38) that are connected to the Schottky electrode (3). The inner field-electrodes (11) are capacitively coupled to the drift region (4) via dielectric material (21) that lines the inner trenches (11). The perimeter field-electrode (38) is capacitively coupled across dielectric material (28) on the inside wall (18a) of the perimeter trench 18, without acting on any outside wall (18b). Furthermore, the inner and perimeter trenches (11, 18) are closely spaced and the intermediate areas (4a, 4b) of the drift region (4) are lowly doped.

Abstract: Disclosed is a manufacturing method capable of easily manufacturing a semiconductor device exhibiting a high reliability but no decrease in a field isolation voltage due to an influence by overetching. Field oxide is formed on a silicon substrate by a LOCOS method. Polysilicon is deposited on the surface of the field oxide and on the surface of a silicon nitride layer formed on the silicon substrate when forming the field oxide layer. The polysilicon layer is deposited thicker than a thickness of the silicon nitride layer. The polysilicon layer deposited on the silicon nitride layer and on the field oxide is removed by polishing like a CMP method, whereby the surface of the silicon nitride layer is exposed. A structure having the polysilicon layer existing on only the surface of the field oxide is obtained by removing the silicon nitride layer. The polysilicon layer functions as a protective layer for the field oxide, thereby preventing the field oxide layer 34 from being etched when in overetching.

Abstract: An integrated circuit device is fabricated by forming at least one isolation region in an area of a semiconductor substrate, such as a monolithic semiconductor substrate or a silicon on insulator (SOI) substrate. The at least one isolation region defines at least one active region. A plurality of dummy conductive regions is distributed in the area of the semiconductor substrate, with the dummy conductive regions being constrained to overlie the at least one isolation region. The dummy conductive regions may be formed from a conductive layer that is also used to form, for example, a gate electrode, a capacitor electrode or a wiring pattern. The dummy conductive regions may be formed on an insulation layer, e.g., a gate insulation layer or an interlayer dielectric layer. Preferably, the dummy conductive regions are noncontiguous. In one embodiment, a lattice-shaped isolation region is formed including an array of node regions linked by interconnecting regions and defining an array of dummy active regions.

Abstract: The invention provides a bipolar transistor attaining large MSG and a method of fabricating the same. The bipolar transistor of this invention includes a collector layer; abase layer deposited on the collector layer; and a semiconductor layer deposited on the base layer in the shape of a ring along the outer circumference of the base layer, the semiconductor layer includes a ring-shaped emitter region functioning as an emitter, and the outer edge of the emitter region and the outer edge of the base layer are disposed in substantially the same plane position.

Abstract: A homojunction bipolar transistor with performance characteristics similar to more costly heterojunction or retrograde base transistors. The high emitter resistivity found in prior homojunction devices is circumvented using a low work function material layer in forming the emitter. This produces an economically viable high performance alternative to SiGe HBTs or SiGe retrograde base transistors.

Abstract: In a MOS transistor of an LDD structure, a cobalt silicide film is formed in a region where adjacent gates are formed widely apart from each other, but is not formed in a region where adjacent gates are formed close to each other. The particular construction permits suppressing the leak current through the PN junction that is generated under the influence of the metal silicide compound in the region where adjacent gates are formed close to each other, and also permits ensuring the signal processing at a high speed in the region where adjacent gates are formed widely apart from each other.

Abstract: Protrusions called ridges are formed on the surface of a crystalline semiconductor film formed by a laser crystallization method or the like. A heat absorbing layer are formed below a semiconductor film. When the semiconductor film is crystallized by laser, a temperature difference is produced between a semiconductor film 1010 positioned above a heat absorbing layer 1011 and a semiconductor film 1013 of the other region to produce a difference in thermal expansion at the boundary of the outside end 1015 of the heat absorbing layer. This difference produces a strain to form a surface wave. The surface wave starting at the outer periphery of the heat absorbing layer is formed in the vicinity of the heat absorbing layer. When the semiconductor layer is solidified after it is melted, the protrusions of the surface wave remain as protrusions after the semiconductor film is solidified.

Abstract: A laser marking apparatus and method for marking the surface of a semiconductor chip are described herein. A laser beam is directed to a location on the surface of the chip where a laser reactive material, such as a pigment containing epoxy, is present. The heat associated with the laser beam causes the laser reactive material to fuse to the surface of the chip, creating a visibly distinct mark in contrast to the rest of the surface of the chip. Only reactive material contacted by the laser fuses to the chip surface, and the remaining residue on the non-irradiated portion can be readily removed.

Abstract: On an inner side of a mounting pad on a circuit substrate, a plurality of solder resist zones are disposed to project from the substrate. Sealing resin is applied by one-point coating onto a central position of the solder resist zones. A semiconductor device is place on the substrate. While heating the resin under pressure, the semiconductor device is mounted on the substrate. Therefore, the sealing resin is supplied to each vertices of the projecting solder resist zones disposed in circumferential areas on the substrate, and hence a filet is uniformly formed on the substrate. In the LSI semiconductor device mounting process using pressure welding, highly reliable connection can be achieved by one-point coating using a dispenser at a low cost with high productivity.

Abstract: A resin encapsulated semiconductor package, which uses leads (lead frame), and enhances heat conducting properties and prevents breaking of lengths of bonding wire, reduction in service life of solder joints and crack of a resin while ensuring reliability on strength. A lead material uses a material containing as a main constituent material a composite alloy of Cu2O and Cu, which has a thermal conductivity as high as that of copper alloys having been conventionally used, and which is sintered to have a small linear expansion coefficient as compared with such copper alloys.

Abstract: A multi-layer electronic device package includes first and second outer layers and at least one signal layer disposed between the outer layers. The signal layer includes signal traces and ground traces interleaved with the signal traces.

Abstract: A semiconductor device of the present invention is made up of a semiconductor chip and a single wiring tape resembling a film carrier and including a wiring layer that has a preselected pattern. The wiring tape is adhered to at least the top, bottom and one side of a semiconductor chip. The semiconductor device has outer connecting portions arranged on the above surfaces of the chip. The semiconductor device is comparable in package size with a bare chip. A semiconductor module having a plurality of such semiconductor devices arranged bidimensionally or tridimensionally achieves desirable electric characteristics while obviating the dense arrangement of a number of wirings.

Abstract: Two memory chips mounted over a base substrate have the same external size and have a flush memory of the same memory capacity formed thereon. These memory chips are mounted over the base substrate with one of them being overlapped with the upper portion of the other one and at the same time, they are stacked with their faces being turned in the same direction. The bonding pads BP of one of the memory chips are disposed in the vicinity of the bonding pads BP of the other memory chip. In addition, the upper memory chip is stacked over the lower memory chip in such a way that the upper memory chip is slid in a direction (X direction) parallel to the one side of the lower memory chip and in a direction (Y direction) perpendicular thereto in order to prevent partial overlapping of it with the bonding pads BP of the lower memory chip.