Including Change In A Growth-influencing Parameter (e.g., Composition, Temperature, Concentration, Flow Rate) During Growth (e.g., Multilayer Or Junction Or Superlattice Growing) Patents (Class 117/105)
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Patent number: 9691856Abstract: A CMOS device includes a PMOS transistor with a first quantum well structure and an NMOS device with a second quantum well structure. The PMOS and NMOS transistors are formed on a substrate.Type: GrantFiled: December 21, 2015Date of Patent: June 27, 2017Assignee: Intel CorporationInventors: Suman Datta, Mantu K. Hudait, Mark L. Doczy, Jack T. Kavalieros, Amlan Majumdar, Justin K. Brask, Been-Yih Jin, Matthew V. Metz, Robert S. Chau
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Patent number: 9663367Abstract: Systems and a method for forming carbon allotropes are described. An exemplary reactor system for the production of carbon allotropes includes a hybrid reactor configured to form carbon allotropes from a reactant gas mixture in a Bosch reaction. The hybrid reactor includes at least two distinct zones that perform different functions including reaction, attrition, catalyst separation, or gas separation.Type: GrantFiled: September 13, 2013Date of Patent: May 30, 2017Assignees: EXXON MOBIL UPSTREAM RESEARCH COMPANY, SOLID CARBON PRODUCTS, LLCInventors: Russell J. Koveal, Jr., Terry A. Ring
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Patent number: 9657409Abstract: Organosilicon chemistry, polymer derived ceramic materials, and methods. Such materials and methods for making polysilocarb (SiOC) and Silicon Carbide (SiC) materials having 3-nines, 4-nines, 6-nines and greater purity. Processes and articles utilizing such high purity SiOC and SiC.Type: GrantFiled: September 24, 2015Date of Patent: May 23, 2017Assignee: Melior Innovations, Inc.Inventors: Glen Sandgren, Ashish P. Diwanji, Andrew R. Hopkins, Walter J. Sherwood, Douglas M. Dukes, Mark S. Land, Brian L. Benac
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Patent number: 9630160Abstract: Disclosed are an apparatus and method for continuously producing carbon nanotubes. More specifically, disclosed are an apparatus for continuously producing carbon nanotubes including i) a reactor to synthesize carbon nanotubes, ii) a separator to separate a mixed gas from the carbon nanotubes transferred from the reactor, iii) a filter to remove all or part of one or more component gases from the separated mixed gas, and iv) a recirculation pipe to recirculate the filtered mixed gas to the reactor for carbon nanotubes. Advantageously, the apparatus and method for continuously producing carbon nanotubes enable rapid processing, exhibit superior productivity and excellent conversion rate of a carbon source, significantly reduce production costs, reduce energy consumption due to decrease in reactor size relative to capacity, and generate little or no waste gas and are thus environmentally friendly.Type: GrantFiled: January 10, 2014Date of Patent: April 25, 2017Assignee: LG Chem, Ltd.Inventors: Kwang-Hyun Chang, Jin-Do Kim, Kwang-Woo Yoon
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Patent number: 9580837Abstract: In a method for growing bulk SiC single crystals using chemical vapor transport, wherein silicon acts as a chemical transport agent for carbon, a growth crucible is charged with a solid carbon source material and a SiC single crystal seed disposed therein in spaced relationship. A halosilane gas, such as SiCl4 and a reducing gas, such as H2, are introduced into the crucible via separate inlets and mix in the crucible interior. The crucible is heated in a manner that encourages chemical reaction between the halosilane gas and the reducing gas leading to the chemical reduction of the halosilane gas to elemental silicon (Si) vapor. The produced Si vapor is transported to the solid carbon source material where it reacts with the solid carbon source material yielding volatile Si-bearing and C-bearing molecules.Type: GrantFiled: September 3, 2014Date of Patent: February 28, 2017Assignee: II-VI IncorporatedInventors: Ilya Zwieback, Varatharajan Rengarajan, Bryan K. Brouhard, Michael C. Nolan, Thomas E. Anderson
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Patent number: 9576793Abstract: An embodiment of a method for manufacturing a semiconductor wafer includes providing a monocrystalline silicon wafer, epitaxially growing a first layer of a first material on the silicon wafer, and epitaxially growing a second layer of a second material on the first layer. For example, said first material may be monocrystalline silicon carbide, and said second material may be monocrystalline silicon.Type: GrantFiled: June 30, 2015Date of Patent: February 21, 2017Assignee: STMICROELECTRONICS S.R.L.Inventor: Giuseppe Abbondanza
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Patent number: 9551086Abstract: A method of preparing silicon carbide powder is provided, which includes mixing first silicon carbide powder with a liquid silicon carbide precursor, annealing the mixture at a first temperature and converting the silicon carbide precursor to a ?-phase silicon carbide particulate material, and annealing the material at a second temperature and grain-growing the first silicon carbide powder to second silicon carbide powder using the ?-phase silicon carbide particulate material.Type: GrantFiled: May 28, 2013Date of Patent: January 24, 2017Assignee: LG INNOTEK CO., LTD.Inventor: Kyoung Seok Min
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Patent number: 9523157Abstract: The invention relates to the technology for producing three-dimensional monocrystals and can preferably be used in optoelectronics for manufacturing substrates for various optoelectronic devices, including light-emitting diodes that emit light in the ultraviolet region. The method for growing an AlN monocrystal by gas-phase epitaxy from a mixture containing a source of Al and NH3 comprises arranging the Al source and a substrate, with the growth surface of said substrate turned towards said Al source, opposite one another in a growth chamber, said source and substrate forming a growth zone, producing a flow of NH3 in the growth zone; and heating the Al source and the substrate to temperatures that ensure the growth of the AlN monocrystal on the substrate. The Al source used is only free Al, the substrate is pretreated with Ga and/or In, whereupon the Al source is cooled to a temperature of 800-900° C. and the substrate is annealed by being heated to a temperature of 1300-1400° C.Type: GrantFiled: May 17, 2012Date of Patent: December 20, 2016Inventors: Mikhail Yurievich Pogorelsky, Alexei Petrovich Shkurko, Alexei Nikolaevich Alexeev, Viktor Petrovich Chaly
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Patent number: 9508531Abstract: The method of the present invention is related to a technique of efficiently purging source gases remaining on a substrate and improving in-plane uniformity of a substrate. The method of the present invention includes forming a thin film on a substrate accommodated in a process chamber by (a) supplying a source gas into the process chamber, and (b) supplying an inert gas into the process chamber while alternately increasing and decreasing a flow rate of the inert gas supplied into the process chamber and exhausting the source gas and the inert gas from the process chamber.Type: GrantFiled: September 24, 2014Date of Patent: November 29, 2016Assignee: HITACHI KOKUSAI ELECTRIC INC.Inventors: Koei Kuribayashi, Shinya Ebata
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Patent number: 9440859Abstract: A silicon carbide powder includes at least one group selected from a first group comprising an alpha phase silicon carbide pulverulent body of which a granule size (D50) is greater than 0 ?m and less than 45 ?m with impurities less than 10 ppm, a second group comprising an alpha phase silicon carbide pulverulent body of which a granule size is greater than 45 ?m and less than 75 ?m with impurities less than 10 ppm, and a third group comprising an alpha phase silicon carbide pulverulent body of which a granule size is greater than 75 ?m and less than 110 ?m with impurities less than 10 ppm. In addition, a method for preparing a silicon carbide powder includes adding seeds to a beta silicon carbide powder, and forming an alpha silicon carbide powder by heat treating the beta silicon carbide powder.Type: GrantFiled: July 10, 2013Date of Patent: September 13, 2016Assignees: LG INNOTEK CO., LTD, RESEARCH BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITYInventors: Byung Sook Kim, Dong Geun Shin, Jung Eun Han, Kyoung Seok Min
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Patent number: 9437776Abstract: A light emitting diode comprising an epitaxial layer structure, a first electrode, and a second electrode. The first and second electrodes are separately disposed on the epitaxial layer structure, and the epitaxial layer structure has a root-means-square (RMS) roughness less than about 3 at a surface whereon the first electrode is formed.Type: GrantFiled: November 20, 2013Date of Patent: September 6, 2016Assignee: Toshiba CorporationInventors: Chao-Kun Lin, Heng Liu
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Patent number: 9431536Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor substrate and a source/drain structure adjacent to the gate stack. The semiconductor device structure also includes a cap element over the source/drain structure. The cap element has a top surface and a side surface. A width ratio of the top surface to the side surface of the cap element is in a range from about 0.125 to about 1.Type: GrantFiled: March 16, 2015Date of Patent: August 30, 2016Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shing-Huang Wu, Jian-Shian Chen
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Patent number: 9337164Abstract: A coating layer for use in copper integrated circuit interconnect and other conductive structures hinders and decreases oxide growth on surfaces of such conductive structures. The coating layer includes an amorphous copper containing layer deposited on a crystalline copper substrate, such as utilized for a lead frame and a bonding wire. Additional amorphous layers may be interposed between the amorphous copper containing layer and the copper substrate, such as an amorphous tantalum nitride layer and an amorphous titanium nitride layer.Type: GrantFiled: October 28, 2014Date of Patent: May 10, 2016Assignee: Freescale Semiconductors, Inc.Inventor: Rama I. Hegde
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Patent number: 9328431Abstract: An apparatus for manufacturing a silicon carbide single crystal grows the silicon carbide single crystal on a surface of a seed crystal made from a silicon carbide single crystal substrate by supplying a material gas for silicon carbide from below the seed crystal. The apparatus includes a base having a first side and a second side opposite to the first side. The seed crystal is mounted on the first side of the base. The apparatus further includes a purge gas introduction mechanism for supporting the base and for supplying a purge gas to the base from the second side of the base. The base has a purge gas introduction path for discharging the supplied purge gas from the base toward an outer edge of the seed crystal.Type: GrantFiled: December 14, 2011Date of Patent: May 3, 2016Assignee: DENSO CORPORATIONInventors: Kazukuni Hara, Yuuichirou Tokuda
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Patent number: 9331233Abstract: A method of manufacturing at least one semiconducting micro- or nano-wire used for formation of an optoelectric structure, optoelectronic structures including the micro- or nano-wires, and a method enabling manufacture of the photoelectronic structures. The method includes providing a semiconducting substrate, forming a crystalline buffer layer on the substrate, the buffer layer having a first zone over at least part of its thickness composed mainly of magnesium nitride in a form MgxNy, and forming at least one semiconducting micro- or nano-wire on the buffer layer.Type: GrantFiled: December 19, 2012Date of Patent: May 3, 2016Assignee: Commissariat a l'energie atomique et aux energies alternativesInventors: Amelie Dussaigne, Philippe Gilet, Francois Martin
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Patent number: 9324559Abstract: A multi chamber thin film deposition apparatus and a method for depositing films, is provided. Each chamber includes a three dimensional gas delivery system including process gases being delivered downwardly toward the substrate and laterally toward the substrate. A pumping system includes an exhaust port in each chamber that is centrally positioned underneath the substrate being processed and therefore the gas flow around all portions of the edge of the substrate are equally spaced from the exhaust port thereby creating a uniform gas flow profile which results in film thickness uniformity of films deposited on both the front and back surfaces of the substrate. The deposited films demonstrate uniform thickness on the front and back of the substrate and extend inwardly to a uniform distance on the periphery of the backside of the substrate.Type: GrantFiled: June 21, 2013Date of Patent: April 26, 2016Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Lan Hai Wang, Ding-I Liu, Si-Wen Liao, Po-Hsiung Leu, Yong-Hung Yang, Chia-Ming Tai
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Patent number: 9284682Abstract: A method for treating a fabric for ultraviolet radiation protection is disclosed which comprises the steps of adding zinc oxide nanoparticles to a solution of 3-glycidyloxypropyl-trimethoxysilane, adding silicon dioxide to the mixture of zinc oxide nanoparticles and 3-glycidyloxypropyl-trimethoxysilane, placing a fabric in the mixture of zinc oxide nanoparticles, 3-glycidyloxypropyl-trimethoxysilane, and silicon dioxide, curing the fabric, and washing the fabric.Type: GrantFiled: November 21, 2014Date of Patent: March 15, 2016Assignee: THE SWEET LIVING GROUP, LLCInventors: Robert B Kramer, Ronald Kramer, Nicholas Marshall, Jason Rosenberg, Ram B Gupta
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Patent number: 9252206Abstract: The cost of liquid phase epitaxial growth of a monocrystalline silicon carbide is reduced. A feed material 11 is such that when a surface layer thereof containing a polycrystalline silicon carbide with a 3C crystal polymorph is subjected to X-ray diffraction, a diffraction peak corresponding to a (111) crystal plane and a diffraction peak other than the diffraction peak corresponding to the (111) crystal plane are observed as diffraction peaks corresponding to the polycrystalline silicon carbide with a 3C crystal polymorph.Type: GrantFiled: June 29, 2011Date of Patent: February 2, 2016Assignee: TOYO TANSO CO., LTD.Inventors: Satoshi Torimi, Satoru Nogami, Tsuyoshi Matsumoto
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Patent number: 9246049Abstract: A nitride-based semiconductor substrate has a diameter of 25 mm or more, a thickness of 250 micrometers or more, a n-type carrier concentration of 1.2×1018 cm?3 or more and 3×1019 cm?3 or less, and a thermal conductivity of 1.2 W/cmK or more and 3.5 W/cmK or less. Alternatively, the substrate has an electron mobility ? [cm2/Vs] of more than a value represented by loge?=17.7?0.288 logen and less than a value represented by loge?=18.5?0.288 logen, where the substrate has a n-type carrier concentration n [cm?3] that is 1.2×1018 cm?3 or more and 3×1019 cm?3 or less.Type: GrantFiled: August 19, 2008Date of Patent: January 26, 2016Assignee: SCIOCS COMPANY LIMITEDInventor: Yuichi Oshima
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Patent number: 9222166Abstract: It is an objective of the invention to provide a slide part in which a seal member formed of an elastic body is in sliding contact with a hard member. There is provided a slide part comprising: a hard member having an amorphous carbon coating containing nitrogen formed on an outermost surface of a substrate; and a seal member formed of an elastic body, the seal member being in sliding contact with the hard member, wherein: content of the nitrogen in the coating is 3 at. % or more and 25 at. % or less, taking a total content of the carbon and the nitrogen in the coating as 100 at. %; the seal member contains fluorine at least in a sliding contact surface region thereof; and content of the fluorine in the surface region of the seal member is equal to or more than the nitrogen content in the coating.Type: GrantFiled: November 1, 2011Date of Patent: December 29, 2015Assignee: Hitachi, Ltd.Inventor: Itto Sugimoto
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Patent number: 9200381Abstract: A method is disclosed for producing a high quality bulk single crystal of silicon carbide in a seeded growth system by reducing the separation between a silicon carbide seed crystal and a seed holder until the conductive heat transfer between the seed crystal and the seed holder dominates the radiative heat transfer between the seed crystal and the seed holder over substantially the entire seed crystal surface that is adjacent the seed holder.Type: GrantFiled: October 12, 2005Date of Patent: December 1, 2015Assignee: Cree, Inc.Inventors: Robert Tyler Leonard, Adrian Powell, Valeri F. Tsvetkov
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Patent number: 9127349Abstract: The present invention refers to a method as well as an apparatus for depositing a layer at a substrate, the layer containing at least two components co-deposited by at least two evaporation sources, wherein the mixture of the components regarding the content of the components is set by tilting the evaporation sources to predetermined angle and/or by positioning the evaporation sources at a predetermined distance with respect to the substrate and/or wherein evaporation plumes of the evaporation sources are arranged such that the maxima of the evaporation plumes are separated locally with respect to the substrate.Type: GrantFiled: December 23, 2008Date of Patent: September 8, 2015Assignee: APPLIED MATERIALS, INC.Inventors: Juergen Bruch, Elisabeth Sommer, Uwe Hoffmann, Manuel Dieguez-Campo
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Patent number: 9099377Abstract: Micropipe-free, single crystal, silicon carbide (SiC) and related methods of manufacture are disclosed. The SiC is grown by placing a source material and seed material on a seed holder in a reaction crucible of the sublimation system, wherein constituent components of the sublimation system including the source material, reaction crucible, and seed holder are substantially free from unintentional impurities. By controlling growth temperature, growth pressure, SiC sublimation flux and composition, and a temperature gradient between the source material and the seed material or the SiC crystal growing on the seed material during the PVT process, micropipe-inducing process instabilities are eliminated and micropipe-free SiC crystal is grown on the seed material.Type: GrantFiled: September 13, 2007Date of Patent: August 4, 2015Assignee: Cree, Inc.Inventors: Cem Basceri, Yuri Khlebnikov, Igor Khlebnikov, Cengiz Balkas, Murat N. Silan, Hudson McD. Hobgood, Calvin H. Carter, Jr., Vijay Balakrishna, Robert T. Leonard, Adrian R. Powell, Valeri T. Tsvetkov, Jason R. Jenny
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Patent number: 9078942Abstract: The present invention provides titanium dioxide/single-walled carbon nanotube composites (TiO2/SWCNTs), articles of manufacture, and methods of making and using such composites. In certain embodiments, the present invention provides membrane filters and ceramic articles that are coated with TiO2/SWCNT composite material. In other embodiments, the present invention provides methods of using TiO2/SWCNT composite material to purify a sample, such as a water or air sample.Type: GrantFiled: May 14, 2008Date of Patent: July 14, 2015Assignee: NORTHWESTERN UNIVERSITYInventors: Yuan Yao, Gonghu Li, Kimberly Gray, Richard M Lueptow
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Patent number: 9074282Abstract: The invention relates to a method for depositing a material for a target onto a surface of a sample, which method comprises the steps of: irradiating a surface of the target with a laser or electron beam to generate a plume of target material particles; positioning the sample near the plume, such that the target material particles are deposited onto the surface of the sample; rotating the sample around a rotation axis being perpendicular to the surface of the sample onto which the particles are deposited; moving the laser beam along the surface of the target, such that the plume moves in a radial direction in relation to the rotation axis; pulsing the laser beam at a variable frequency.Type: GrantFiled: August 24, 2009Date of Patent: July 7, 2015Assignee: Solmates B.V.Inventors: Jan Arnaud Janssens, Gerard Cornelis Van Den Eijkel, Jan Matthijn Dekkers, Joska Johannes Broekmaat, Paul Te Riele
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Patent number: 9059077Abstract: Provided is a crystal layered structure having a low dislocation density on the upper surface of a nitride semiconductor layer on a Ga2O3 substrate, and a method for manufacturing the same. In one embodiment, there is provided a crystal layered structure including: a Ga2O3 substrate; a buffer layer comprising an AlxGayInzN (0?x?1, 0?y?1, 0?z?1, x+y+z=1) crystal on the Ga2O3 substrate; and a nitride semiconductor layer comprising an AlxGayInzN (0?x?1, 0?y?1, 0?z?1, x+y +z=1) crystal including oxygen as an impurity on the buffer layer. The oxygen concentration in a region having a thickness of no less than 200 nm on the nitride semiconductor layer on the side towards the Ga2O3 substrate is no less than 1.0×1018/cm3.Type: GrantFiled: October 12, 2012Date of Patent: June 16, 2015Assignees: TAMURA CORPORATION, KOHA CO., LTDInventors: Kazuyuki Iizuka, Yoshikatsu Morishima, Shinkuro Sato
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Patent number: 9039834Abstract: Non-polar (11 20) a-plane gallium nitride (GaN) films with planar surfaces are grown on (1 102) r-plane sapphire substrates by employing a low temperature nucleation layer as a buffer layer prior to a high temperature growth of the non-polar (11 20) a-plane GaN thin films.Type: GrantFiled: June 2, 2011Date of Patent: May 26, 2015Assignee: The Regents of the University of CaliforniaInventors: Michael D. Craven, James Stephen Speck
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Patent number: 9034104Abstract: A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A single-component oxide semiconductor layer is formed over a substrate; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a single-component oxide semiconductor layer including single crystal regions is formed; and a multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.Type: GrantFiled: December 15, 2010Date of Patent: May 19, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Takuya Hirohashi, Masahiro Takahashi, Takashi Shimazu
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Publication number: 20150115771Abstract: An elastic wave device includes a piezoelectric substrate including a primary surface and a first electrode which is provided on the primary surface of the piezoelectric substrate, which includes a first multilayer metal film including at least three metal films laminated in a bottom-to-top direction, and which includes at least an IDT film. The first multilayer metal film includes a Ti film as the topmost film and has a crystal orientation oriented in a predetermined direction so that the normal line direction of the plane of a Ti crystal of the Ti film coincides with the Z axis of a crystal of a piezoelectric body defining the piezoelectric substrate.Type: ApplicationFiled: October 9, 2014Publication date: April 30, 2015Inventor: Chihiro KONOMA
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Patent number: 9017629Abstract: In method of crystal growth, an interior of a crystal growth chamber (2) is heated to a first temperature in the presence of a first vacuum pressure whereupon at least one gas absorbed in a material (4) disposed inside the chamber is degassed therefrom. The interior of the chamber is then exposed to an inert gas at a second, higher temperature in the presence of a second vacuum pressure that is at a higher pressure than the first vacuum pressure. The inert gas pressure in the chamber is then reduced to a third vacuum pressure that is between the first and second vacuum pressures and the temperature inside the chamber is lowered to a third temperature that is between the first and second temperatures, whereupon source material (10) inside the chamber vaporizes and deposits on a seed crystal (12) inside the chamber.Type: GrantFiled: September 27, 2006Date of Patent: April 28, 2015Assignee: II-VI IncorporatedInventors: Ilya Zwieback, Donovan L. Barrett, Avinash K. Gupta
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Publication number: 20150090180Abstract: A method of epitaxially growing a final film using a crystalline substrate wherein the final film cannot be grown directly on the substrate surface is disclosed. The method includes forming a transition layer on the upper surface of the substrate. The transition layer has a lattice spacing that varies between its lower and upper surfaces. The lattice spacing at the lower surface matches the lattice spacing of the substrate to within a first lattice mismatch of 7%. The lattice spacing at the upper surface matches the lattice spacing of the final film to within a second lattice mismatch of 7%. The method also includes forming the final film on the upper surface of the transition layer.Type: ApplicationFiled: September 27, 2013Publication date: April 2, 2015Applicant: Ultratech, Inc.Inventors: Andrew M. Hawryluk, Daniel Stearns
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Publication number: 20150083037Abstract: A method of disordering a layer of an optoelectronic device including; growing a plurality of lower layers; introducing an isoelectronic surfactant; growing a layer; allowing the surfactant to desorb; and growing subsequent layers all performed at a low pressure of 25 torr.Type: ApplicationFiled: September 29, 2014Publication date: March 26, 2015Inventors: Christopher M. Fetzer, James H. Ermer, Richard R. King, Peter C. Colter
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Patent number: 8987069Abstract: A substrate with two SiGe regions having different Germanium concentrations and a method for making the same. The method includes: providing a substrate with at least two active regions; epitaxially depositing a first SiGe layer over each active regions; epitaxially depositing a Silicon layer over each SiGe layer; epitaxially depositing a second SiGe layer over each Silicon layer; forming a hard mask over the second SiGe layer of one of the active regions; removing the epitaxially deposited second SiGe layer of the unmasked active region, removing the hard mask, and thermally mixing the remaining Silicon and SiGe layers of the active regions to form a new SiGe layer with uniform Germanium concentration for each of the active regions, where the new SiGe layer with uniform Germanium concentration of one of the at least two active regions has a different concentration of Germanium than the new SiGe layer with uniform Germanium concentration of the other SiGe layer.Type: GrantFiled: December 4, 2013Date of Patent: March 24, 2015Assignee: International Business Machines CorporationInventors: Thomas N. Adam, Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek
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Patent number: 8945302Abstract: Method for crystal growth from a surfactant of a metal-nonmetal (MN) compound, including the procedures of providing a seed crystal, introducing atoms of a first metal to the seed crystal thus forming a thin liquid metal wetting layer on a surface of the seed crystal, setting a temperature of the seed crystal below a minimal temperature required for dissolving MN molecules in the wetting layer and above a melting point of the first metal, each one of the MN molecules being formed from an atom of a second metal and an atom of a first nonmetal, introducing the MN molecules which form an MN surfactant monolayer, thereby facilitating a formation of the wetting layer between the MN surfactant monolayer and the surface of the seed crystal, and regulating a thickness of the wetting layer, thereby growing an epitaxial layer of the MN compound on the seed crystal.Type: GrantFiled: March 4, 2012Date of Patent: February 3, 2015Assignee: Mosaic Crystals Ltd.Inventor: Moshe Einav
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Patent number: 8936681Abstract: A method for making an epitaxial structure is provided. The method includes the following steps. A substrate is provided. The substrate has an epitaxial growth surface for growing epitaxial layer. A carbon nanotube layer is placed on the epitaxial growth surface. An epitaxial layer is epitaxially grown on the epitaxial growth surface. The carbon nanotube layer is removed. The carbon nanotube layer can be removed by heating.Type: GrantFiled: October 18, 2011Date of Patent: January 20, 2015Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.Inventors: Yang Wei, Shou-Shan Fan
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Publication number: 20150017466Abstract: A self-aligned tunable metamaterial is formed as a wire mesh. Self-aligned channel grids are formed in layers in a silicon substrate using deep trench formation and a high-temperature anneal. Vertical wells at the channels may also be etched. This may result in a three-dimensional mesh grid of metal and other material. In another embodiment, metallic beads are deposited at each intersection of the mesh grid, the grid is encased in a rigid medium, and the mesh grid is removed to form an artificial nanocrystal.Type: ApplicationFiled: March 11, 2013Publication date: January 15, 2015Inventors: Arturo A. Ayon, Ramakrishna Kotha, Diana Strickland
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Publication number: 20140363607Abstract: Provided are a method for manufacturing a SiC single crystal having high crystal quality and, in particular, extremely low screw dislocation density and a SiC single crystal ingot obtained by the method. In particular, provided is a silicon carbide single crystal substrate that is a substrate cut from a bulk silicon carbide single crystal grown by the Physical Vapior Transport (PVT) method, in which the screw dislocation density is smaller in the peripheral region than in the center region, so that screw dislocations are partially reduced. The method is a method for manufacturing a SiC single crystal by the PVT method using a seed crystal and the ingot is a SiC single crystal ingot obtained by the method. Particularly, the silicon carbide single crystal substrate is a silicon carbide single crystal substrate in which when, by representing the diameter of the substrate as R, a center circle region having a diameter of 0.Type: ApplicationFiled: August 29, 2012Publication date: December 11, 2014Applicant: NIPPON STEEL & SUMITOMO METAL CORPORATIONInventors: Shinya Sato, Tatsuo Fujimoto, Hiroshi Tsuge, Masakazu Katsuno
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Patent number: 8900362Abstract: A method of growing a single crystal of gallium oxide at a lower temperature than the melting point (1900° C.) of gallium oxide is provided. A compound film (hereinafter referred to as “gallium oxide compound film”) containing Ga atoms, O atoms, and atoms or molecules that easily sublimate, is heated to sublimate the atoms or molecules that easily sublimate from inside the gallium oxide compound film, thereby growing a single crystal of gallium oxide with a heat energy that is lower than a binding energy of gallium oxide.Type: GrantFiled: March 8, 2011Date of Patent: December 2, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Akiharu Miyanaga, Tatsuya Honda, Takatsugu Omata, Yusuke Nonaka
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Patent number: 8882911Abstract: An apparatus for manufacturing a silicon carbide single crystal grows the silicon carbide single crystal on a seed crystal by supplying a material gas from below the seed crystal. The apparatus includes a heating container and a base located in the heating container. The seed crystal is mounded on the base. The apparatus further includes a first inlet for causing a purge gas to flow along an inner wall surface of the heating container, a purge gas source for supplying the purge gas to the first inlet, a second inlet for causing the purge gas to flow along an outer wall surface of the base, and a mechanism for supporting the base and for supplying the purge gas to the base from below the base.Type: GrantFiled: December 14, 2011Date of Patent: November 11, 2014Assignee: DENSO CORPORATIONInventors: Yuuichirou Tokuda, Kazukuni Hara, Jun Kojima
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Patent number: 8876973Abstract: There is provided an n type (100) oriented single crystal diamond semiconductor film into which phosphorous atoms have been doped and a method of producing the same. The n type (100) oriented single crystal diamond semiconductor film, characterized in that (100) oriented diamond is epitaxially grown on a substrate under such conditions that; the diamond substrate is (100) oriented diamond, a means for chemical vapor deposition provides hydrogen, hydrocarbon and a phosphorous compound in the plasma vapor phase, the ratio of phosphorous atoms to carbon atoms in the plasma vapor phase is no less than 0.1%, and the ratio of carbon atoms to hydrogen atoms is no less than 0.05%, and the method of producing the same.Type: GrantFiled: January 5, 2012Date of Patent: November 4, 2014Assignee: National Institute of Advanced Industrial Science and TechnologyInventors: Hiromitsu Kato, Satoshi Yamasaki, Hideyo Ookushi, Shinichi Shikata
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Publication number: 20140318592Abstract: A method for enhancement of thermoelectric properties through polarization engineering. Internal electric fields created within a material are used to spatially confine electrons for the purpose of enhancing thermoelectric properties. Electric fields can be induced within a material by the presence of bound charges at interfaces. A combination of spontaneous and piezoelectric polarization can induce this interfacial charge. The fields created by these bound charges have the effect of confining charge carriers near these interfaces. By confining charge carriers to a channel where scattering centers can be deliberately excluded the electron mobility can be enhanced, thus enhancing thermoelectric power factor. Simultaneously, phonons will not be affected by the fields and thus will be subject to the many scattering centers present in the majority of the structure. This allows for simultaneous enhancement of power factor and reduction of thermal conductivity, thus improving the thermoelectric figure of merit, ZT.Type: ApplicationFiled: December 14, 2012Publication date: October 30, 2014Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Alexander Sztein, John E. Bowers, Steven P. DenBaars
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Patent number: 8871025Abstract: In a crystal growth method, a seed crystal 8 and a source material 4 are provided in spaced relation inside of a growth crucible 6. Starting conditions for the growth of a crystal 14 in the growth crucible 6 are then established therein. The starting conditions include: a suitable gas inside the growth crucible 6, a suitable pressure of the gas inside the growth crucible 6, and a suitable temperature in the growth crucible 6 that causes the source material 4 to sublimate and be transported via a temperature gradient in the growth crucible 6 to the seed crystal 8 where the sublimated source material precipitates. During growth of the crystal 14 inside the growth crucible 6, at least one of the following growth conditions are intermittently changed inside the growth crucible 6 a plurality of times: the gas in the growth crucible 6, the pressure of the gas in the growth crucible 6, and the temperature in the growth crucible 6.Type: GrantFiled: September 27, 2007Date of Patent: October 28, 2014Assignee: II-VI IncorporatedInventors: Avinash Gupta, Utpal K. Chakrabarti, Jihong Chen, Edward Semenas, Ping Wu
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Patent number: 8858709Abstract: A physical vapor deposition method of growing a crystal includes providing a seed crystal and a source material in spaced relation inside of a growth crucible that is at least in-part gas permeable to an unwanted gas. The growth chamber is heated whereupon the source material sublimates and is transported via a temperature gradient in the growth chamber to the seed crystal where the sublimated source material precipitates. Concurrent with heating the growth chamber, a purging gas is caused to flow inside or outside of the growth crucible in a manner whereupon the unwanted gas flows from the inside to the outside of the growth crucible via the gas permeable part thereof.Type: GrantFiled: April 10, 2007Date of Patent: October 14, 2014Assignee: II-VI IncorporatedInventors: Ilya Zwieback, Avinash K. Gupta
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Patent number: 8858708Abstract: This invention provides a process for producing high-purity dense polycrystalline III-nitride slabs. A vessel which contains a group III-metal such as gallium or an alloy of group III-metals of shallow depth is placed in a reactor. The group III-metal or alloy is heated until a molten state is reached after which a halide-containing source mixed with a carrier gas and a nitrogen-containing source is flowed through the reactor vessel. An initial porous crust of III-nitride forms on the surface of the molten III-metal or alloy which reacts with the nitrogen-containing source and the halide-containing source. The flow rate of the nitrogen-containing source is then increased and flowed into contact with the molten metal to produce a dense polycrystalline III-nitride. The products produced from the inventive process can be used as source material for III-nitride single crystal growth which material is not available naturally.Type: GrantFiled: June 17, 2010Date of Patent: October 14, 2014Assignee: The United States of America As represented by the Secretary of the Air ForceInventors: Michael J. Callahan, Buguo Wang, John S. Bailey
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Patent number: 8821635Abstract: Si—Ge materials are grown on Si(100) with Ge-rich contents (Ge>50 at. %) and precise stoichiometries SiGe, SiGe2, SiGe3 and SiGe4. New hydrides with direct Si—Ge bonds derived from the family of compounds (H3Ge)xSiH4-x (x=1-4) are used to grow uniform, relaxed, and highly planar films with low defect densities at unprecedented low temperatures between about 300-450° C. At about 500-700° C., SiGex quantum dots are grown with narrow size distribution, defect-free microstructures and highly homogeneous elemental content at the atomic level. The method provides for precise control of morphology, composition, structure and strain. The grown materials possess the required characteristics for high frequency electronic and optical applications, and for templates and buffer layers for high mobility Si and Ge channel devices.Type: GrantFiled: April 8, 2005Date of Patent: September 2, 2014Assignee: Arizona Board of Regents on Behalf of Arizona State UniversityInventors: John Kouvetakis, Ignatius S. T. Tsong, Changwu Hu, John Tolle
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Patent number: 8822263Abstract: It is provided a hetero epitaxial growth method, a hetero epitaxial crystal structure, a hetero epitaxial growth apparatus and a semiconductor device, the method includes forming a buffer layer formed with the orienting film of an oxide, or the orienting film of nitride on a heterogeneous substrate; and performing crystal growth of a zinc oxide based semiconductor layer on the buffer layer using a halogenated group II metal and an oxygen material. It is provided a homo epitaxial growth method, a homo epitaxial crystal structure, a homo epitaxial growth apparatus and a semiconductor device, the homo epitaxial growth method includes introducing reactant gas mixing zinc containing gas and oxygen containing gas on a zinc oxide substrate; and performing crystal growth of a zinc oxide based semiconductor layer on the zinc oxide substrate.Type: GrantFiled: June 29, 2009Date of Patent: September 2, 2014Assignees: National University Corporation Tokyo University of Agriculture and Technology, Rohm Co., Ltd., Tokyo Electron LimitedInventors: Akinori Koukitu, Yoshinao Kumagai, Tetsuo Fujii, Naoki Yoshii
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Publication number: 20140220325Abstract: A method of forming an SiC crystal including placing a seed crystal of SiC in an insulated graphite container; placing a source of Si and C atoms in the insulated graphite container, where the source of Si and C atoms is for transport to the seed crystal to grow the SiC crystal; placing the container into the furnace; heating a furnace to a temperature from about 2,000° C. to about 2,500° C.; evacuating the furnace to a pressure from about 0.1 Torr and about 100 Torr; filling the furnace with an inert gas; and introducing dopant gas into the furnace with a controlled flow so as to form a plurality of stratified layers wherein each layer has dopant concentration different from a layer directly below and a layer directly above it. A 4H-SiC crystal made by the method. A 4H-SiC substrate cut from the SiC crystal made from the method.Type: ApplicationFiled: July 8, 2013Publication date: August 7, 2014Inventor: Mark Loboda
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Patent number: 8796121Abstract: A method of forming a REO dielectric layer and a layer of a-Si between a III-N layer and a silicon substrate. The method includes depositing single crystal REO on the substrate. The single crystal REO has a lattice constant adjacent the substrate matching the lattice constant of the substrate and a lattice constant matching a selected III-N material adjacent an upper surface. A uniform layer of a-Si is formed on the REO. A second layer of REO is deposited on the layer of a-Si with the temperature required for epitaxial growth crystallizing the layer of a-Si and the crystallized silicon being transformed to amorphous silicon after transferring the lattice constant of the selected III-N material of the first layer of REO to the second layer of REO, and a single crystal layer of the selected III-N material deposited on the second layer of REO.Type: GrantFiled: November 19, 2013Date of Patent: August 5, 2014Assignee: Translucent, Inc.Inventors: Rytis Dargis, Andrew Clark, Erdem Arkun
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Patent number: 8790461Abstract: The invention provides a method for manufacturing the silicon carbide single crystal wafer capable of improving the utilization ratio of the bulk silicon carbide single crystal, capable of improving characteristics of the element and capable of improving cleavability, and the silicon carbide single crystal wafer obtained by the manufacturing method. An ?(hexagonal)-silicon carbide single crystal wafer which has a flat homoepitaxial growth surface with a surface roughness of 2 nm or less and which has an off-angle from the (0001)c plane of 0.4° or less.Type: GrantFiled: August 24, 2005Date of Patent: July 29, 2014Assignee: Showa Denko K.K.Inventors: Takayuki Maruyama, Toshimi Chiba
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Publication number: 20140190401Abstract: A doping and multi-chamber method and apparatus for the growth of material, directed toward Solid Phase Epitaxy (SPE) process, is disclosed. Different variations and features of this method and process are examined. The advantages of this method are the high throughput and the reduced operational cost of the production for semiconductor material and devices, such as III-V material (e.g. GaAs) and solar cell devices. It can be applied to many systems and devices/materials.Type: ApplicationFiled: January 8, 2014Publication date: July 10, 2014Inventor: Fareed SEPEHRY-FARD