Including Change In A Growth-influencing Parameter (e.g., Composition, Temperature, Concentration, Flow Rate) During Growth (e.g., Multilayer Or Junction Or Superlattice Growing) Patents (Class 117/105)
  • Patent number: 7601215
    Abstract: A method of producing epitaxial silicon films on a c-Si wafer substrate using hot wire chemical vapor deposition by controlling the rate of silicon deposition in a temperature range that spans the transition from a monohydride to a hydrogen free silicon surface in a vacuum, to obtain phase-pure epitaxial silicon film of increased thickness is disclosed. The method includes placing a c-Si substrate in a HWCVD reactor chamber. The method also includes supplying a gas containing silicon at a sufficient rate into the reaction chamber to interact with the substrate to deposit a layer containing silicon thereon at a predefined growth rate to obtain phase-pure epitaxial silicon film of increased thickness.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: October 13, 2009
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Qi Wang, Paul Stradins, Charles Teplin, Howard M. Branz
  • Patent number: 7582161
    Abstract: An apparatus and methods of forming the apparatus include a film of transparent conductive titanium-doped indium oxide for use in a variety of configurations and systems. The film of transparent conductive titanium-doped indium oxide may be structured as one or more monolayers. The film of transparent conductive titanium-doped indium oxide may be formed using atomic layer deposition.
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: September 1, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Publication number: 20090169459
    Abstract: In method of crystal growth, an interior of a crystal growth chamber (2) is heated to a first temperature in the presence of a first vacuum pressure whereupon at least one gas absorbed in a material (4) disposed inside the chamber is degassed therefrom. The interior of the chamber is then exposed to an inert gas at a second, higher temperature in the presence of a second vacuum pressure that is at a higher pressure than the first vacuum pressure. The inert gas pressure in the chamber is then reduced to a third vacuum pressure that is between the first and second vacuum pressures and the temperature inside the chamber is lowered to a third temperature that is between the first and second temperatures, whereupon source material (10) inside the chamber vaporizes and deposits on a seed crystal (12) inside the chamber.
    Type: Application
    Filed: September 27, 2006
    Publication date: July 2, 2009
    Applicant: II-VI INCORPORATED
    Inventors: Ilya Zwieback, Donovan L. Barrett, Avinash K. Gupta
  • Patent number: 7553373
    Abstract: A method of producing a silicon carbide single crystal, having: fixing a seed crystal, including setting a seed crystal on a seed crystal fixing part with interposition of an adhesive; applying a uniform pressure on the entire surface of the seed crystal by contacting a flexible bag which is inflatable and deflatable to the seed crystal by charging a gas into the to flexible bag; hardening the adhesive; and sublimating a silicon carbide powder obtained by calcinating a mixture containing at least a silicon source and a resol xylene resin, having a nitrogen content of 100 mass ppm or less and having a content of each impurity elements of 0.1 mass ppm or less, and re-crystallizing for growing a silicon carbide single crystal.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: June 30, 2009
    Assignee: Bridgestone Corporation
    Inventors: Masashi Otsuki, Takayuki Maruyama, Shigeki Endo, Daisuke Kondo, Takuya Monbara
  • Patent number: 7553370
    Abstract: Methods of crystal growth for semiconductor materials, such as nitride semiconductors, and methods of manufacturing semiconductor devices are provided. The method of crystal growth includes forming a number of island crystal regions during a first crystal growth phase and continuing growth of the island crystal regions during a second crystal growth phase while bonding of boundaries of the island crystal regions occurs. The second crystal growth phase can include a crystal growth rate that is higher than the crystal growth rate of the first crystal growth phase and/or a temperature that is lower than the first crystal growth phase. This can reduce the density of dislocations, thereby improving the performance and service life of a semiconductor device which is formed on a nitride semiconductor made in accordance with an embodiment of the present invention.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: June 30, 2009
    Assignee: Sony Corporation
    Inventors: Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Patent number: 7547359
    Abstract: An aerosol of a powder composed of helium carrier gas and particles of a hexagonal aluminum nitride is charged through a transfer pipe 3 into a film deposition chamber 4 whose interior is depressurized by gas evacuation using a vacuum pump 5 to maintain a degree of vacuum of 200-8000 Pa during supply of the carrier gas and the aerosol is blown from a nozzle 6 provided on the end of the transfer pipe 3 inside the film deposition chamber 4 to impinge on a substrate fastened to a substrate holder 7 to make the impact force of the particles at collision with the substrate 4 GPa or greater, thereby transforming the crystal structure of the aluminum nitride from hexagonal to cubic to deposit cubic aluminum nitride on the substrate.
    Type: Grant
    Filed: March 19, 2004
    Date of Patent: June 16, 2009
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Atsushi Iwata, Jun Akedo
  • Patent number: 7540920
    Abstract: Embodiments of the invention generally provide a composition of silicon compounds and methods for using the silicon compounds to deposit a silicon-containing film. The processes employ introducing the silicon compound to a substrate surface and depositing a portion of the silicon compound, the silicon motif, as the silicon-containing film. The ligands are another portion of the silicon compound and are liberated as an in-situ etchant. The in-situ etchants supports the growth of selective silicon epitaxy. Silicon compounds include SiRX6, Si2RX6, Si2RX8, wherein X is independently hydrogen or halogen and R is carbon, silicon or germanium. Silicon compound also include compounds comprising three silicon atoms, fourth atom of carbon, silicon or germanium and atoms of hydrogen or halogen with at least one halogen, as well as, comprising four silicon atoms, fifth atom of carbon, silicon or germanium and atoms of hydrogen or halogen with at least one halogen.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: June 2, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Kaushal K. Singh, Paul B. Comita, Lance A. Scudder, David K. Carlson
  • Patent number: 7537660
    Abstract: A crystallization method includes wavefront-dividing an incident light beam into a plurality of light beams, condensing the wavefront-divided light beams in a corresponding phase shift portion of a phase shift mask or in the vicinity of the phase shift portion to form a light beam having an light intensity distribution of an inverse peak pattern in which a light intensity is minimum in a point corresponding to the phase shift portion of the phase shift mask, and irradiating a polycrystalline semiconductor film or an amorphous semiconductor film with the light beam having the light intensity distribution to produce a crystallized semiconductor film.
    Type: Grant
    Filed: May 30, 2006
    Date of Patent: May 26, 2009
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Yukio Taniguchi, Masakiyo Matsumura, Hirotaka Yamaguchi, Mikihiko Nishitani, Susumu Tsujikawa, Yoshinobu Kimura, Masayuki Jyumonji
  • Patent number: 7534412
    Abstract: Single crystals with low scattering, small refractive index differences and few small angle grain boundaries have a bi-directional scattering distribution function value (BSDF) of less than 1.5*10?6 or 5*10?7.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: May 19, 2009
    Assignee: Schott AG
    Inventors: Lars Ortmann, Joerg Kandler, Andreas Menzel, Matthias Mueller, Lutz Parthier, Gordon Von Der Goenna
  • Publication number: 20090114887
    Abstract: A method of forming a bulk, free-standing cubic III-N substrate including a) growing epitaxial III-N material on a cubic III-V substrate using molecular beam epitaxy (MBE); and b) removing the III-V substrate to leave the III-N material as a bulk, free-standing cubic III-N substrate. A bulk, free-standing cubic III-N substrate for fabrication of III-N devices.
    Type: Application
    Filed: May 5, 2006
    Publication date: May 7, 2009
    Inventors: A. J. Kent, S. V. Novikov, N. M. Stanton, R. P. Campion, C. T. Foxon
  • Patent number: 7524372
    Abstract: A method for manufacturing a diamond single crystal substrate, in which a single crystal is grown from a diamond single crystal serving as a seed substrate by vapor phase synthesis, said method comprising: preparing a diamond single crystal seed substrate which has a main surface whose planar orientation falls within an inclination range of not more than 8 degrees relative to a {100} plane or a {111} plane, as a seed substrate; forming a plurality of planes of different orientation which are inclined in the outer peripheral direction of the main surface relative to the main surface on one side of this seed substrate, by machining; and then growing a diamond single crystal by vapor phase synthesis.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: April 28, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Kiichi Meguro, Yoshiyuki Yamamoto, Takahiro Imai
  • Patent number: 7517406
    Abstract: Proposed is a technique of producing a magnetic garnet material of which the light absorption characteristics worsen little even though it is produced through LPE. The crucible for LPE is formed of a material containing Au. The amount of Au to be taken in single crystal formed in an Au crucible is smaller than that of Pt to be taken therein formed in a Pt crucible. As compared with Pt, the influence of Au on magnetic garnet film that increases the insertion loss in the film is small.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: April 14, 2009
    Assignee: TDK Corporation
    Inventors: Atsushi Ohido, Tamotsu Sugawara, Kazuhito Yamasawa, Shinichiro Kakei, Kazuya Shimakawa, Katsunori Hosoya
  • Patent number: 7514342
    Abstract: A method of forming a deposited film according to the present invention includes: introducing a starting gas into a discharge space in a reaction vessel; and applying electric power to generate discharge to decompose the starting gas, wherein, when a self-bias voltage value which is generated at an electrode applied with first electric power reaches a preset threshold, second electric power higher than the first electric power is applied to the electrode to change the self-bias voltage value to another self-bias voltage value larger in absolute value than the threshold, and the deposited film is formed.
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: April 7, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventor: Atsushi Yasuno
  • Patent number: 7504643
    Abstract: A cleaning arrangement for a lithographic apparatus module may be provided in a collector. The cleaning arrangement includes a hydrogen radical source configured to provide a hydrogen radical containing gas to at least part of the module and a pump configured to pump gas through the module such that a flow speed of the hydrogen radical containing gas provided through at least part of the module is at least 1 m/s. The cleaning arrangement may also include a gas shutter configured to modulate a flow of the hydrogen radical containing gas to at least part of the module, a buffer volume of at least 1 m3 in communication with the module, and a pump configured to provide a gas pressure in the buffer volume between 0.001 mbar (0.1 Pa) and 1 mbar (100 Pa). The cleaning arrangement may further include a gas return system.
    Type: Grant
    Filed: June 1, 2006
    Date of Patent: March 17, 2009
    Assignee: ASML Netherlands B.V.
    Inventors: Johannes Maria Freriks, Vadim Yevgenyevich Banine, Vladimir Vitalevitch Ivanov, Derk Jan Wilfred Klunder, Maarten Marinus Johannes Wilhelmus Van Herpen
  • Patent number: 7501024
    Abstract: A plume (109) is generated by irradiating a side face of a graphite rod (101) with a laser beam (103) to vaporize carbon. The vaporized carbon is introduced to a carbon nanohorn recovery chamber (119) through a recovery pipe (155), and the vaporized carbon is recovered as a carbon nanohorn assembly (117). A cooling tank (150) including liquid nitrogen (151) is arranged in the recovery pipe (155). While the cooling tank (150) controls the plume (109) at a low temperature, the cooling tank (150) cools the carbon vapor when the carbon vapor passes through the recovery pipe (155). The cooled carbon vapor is recovered as the carbon nanohorn assembly (117) which is controlled in the desired shape and dimensions.
    Type: Grant
    Filed: May 19, 2004
    Date of Patent: March 10, 2009
    Assignee: NEC Corporation
    Inventors: Takeshi Azami, Daisuke Kasuya, Sumio Iijima, Tsutomu Yoshitake, Yoshimi Kubo, Masako Yudasaka
  • Patent number: 7495239
    Abstract: A cleaning arrangement for a lithographic apparatus module may be provided in a collector. The cleaning arrangement includes a hydrogen radical source configured to provide a hydrogen radical containing gas to at least part of the module and a pump configured to pump gas through the module such that a flow speed of the hydrogen radical containing gas provided through at least part of the module is at least 1 m/s. The cleaning arrangement may also include a gas shutter configured to modulate a flow of the hydrogen radical containing gas to at least part of the module, a buffer volume of at least 1 m3 in communication with the module, and a pump configured to provide a gas pressure in the buffer volume between 0.001 mbar (0.1 Pa) and 1 mbar (100 Pa).
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: February 24, 2009
    Assignee: ASML Netherlands B.V.
    Inventors: Johannes Maria Freriks, Vadim Yevgenyevich Banine, Vladimir Vitalevitch Ivanov
  • Patent number: 7491269
    Abstract: The invention relates to a process for the growth of nanotubes or nanofibers on a substrate comprising at least an upper layer made of a first material, wherein: the formation, on the surface of the upper layer, of a barrier layer made of an alloy of the first material and of a second material, said alloy being stable at a first temperature; the formation of spots of catalyst that are made of the second material, on the surface of the alloy layer; and the growth of nanotubes or nanofibers at a second temperature below said first temperature. The alloy layer allows effective growth of nanotubes/nanofibers from catalyst spots on the surface of said alloy layer. This is because the alloy layer constitutes a diffusion barrier preventing the catalyst from diffusing into the growth substrate, which barrier is stable at the catalytic nanotube/nanofiber growth temperature.
    Type: Grant
    Filed: December 3, 2002
    Date of Patent: February 17, 2009
    Assignee: Thales
    Inventors: Pierre Legagneux, Didier Pribat, Yannig Nedellec
  • Patent number: 7488386
    Abstract: The invention includes atomic layer deposition methods and chemical vapor deposition methods. In a particular aspect of the invention, a source of microwave radiation is provided proximate a reaction chamber. At least a fragment of a precursor material is chemisorbed on a substrate within the reaction chamber while not exposing the precursor material to microwave radiation from the source. Excess precursor material is removed from the chamber, and the chemisorbed material is subsequently exposed to microwave radiation from the source within the reaction chamber.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: February 10, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Patent number: 7482235
    Abstract: A semiconductor device with an elevated source/drain structure provided in each predetermined position defined by the oxide film and gate wiring on a semiconductor silicon substrate, where an orthographic projection image of a shape of an upper end portion of the elevated source/drain structure on the semiconductor silicon substrate along the direction normal to the semiconductor silicon substrate is substantially in agreement with a predetermined shape defined by the corresponding oxide film and gate wiring on the semiconductor silicon substrate, and at least one of orthographic projection images of cross-sections taken along planes parallel with the semiconductor silicon substrate of the elevated source/drain structure on the semiconductor silicon substrate along the direction normal to the semiconductor silicon substrate is larger than the predetermined shape defined by the corresponding oxide film and gate wiring on the semiconductor silicon substrate.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: January 27, 2009
    Assignee: Elpida Memory Inc.
    Inventor: Fumiki Aiso
  • Patent number: 7481879
    Abstract: A diamond single crystal substrate manufacturing method for growing by vapor-phase synthesis a single crystal from a diamond single crystal seed substrate, comprising etching away by reactive ion etching, prior to single crystal growth, at least 0.5 ?m and less than 400 ?m, in etching thickness off the surface of the seed substrate which has been mechanically polished, thereby removing from the surface of the seed substrate the work-affected layers caused by mechanical polishing; and growing then a single crystal thereon. The manufacturing method provides a diamond single crystal substrate having a high quality, large size, and no unintentional impurity inclusions, and suitable for use as semiconductor materials, electronic components, optical components or the like.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: January 27, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Kiichi Meguro, Yoshiyuki Yamamoto, Takahiro Imai
  • Patent number: 7479443
    Abstract: A method comprises, in a reaction chamber, depositing a seed layer of germanium over a silicon-containing surface at a first temperature. The seed layer has a thickness between about one monolayer and about 1000 ?. The method further comprises, after depositing the seed layer, increasing the temperature of the reaction chamber while continuing to deposit germanium. The method further comprises holding the reaction chamber in a second temperature range while continuing to deposit germanium. The second temperature range is greater than the first temperature.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: January 20, 2009
    Assignee: ASM America Inc.
    Inventors: Matthias Bauer, Paul Brabant, Trevan Landin
  • Publication number: 20090000541
    Abstract: In one embodiment the present invention proved for a method for depositing a thin film layer onto a composite tape 16, that comprises depositing at least one thin film layer of physically enhancing material 30 onto at least one portion of the composite tape. The depositing is accomplished by atomic layer epitaxy and the thin film layer is approximately 1-10 molecules thick.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 1, 2009
    Inventor: Douglas J. Conley
  • Patent number: 7465499
    Abstract: A boron phosphide-based semiconductor device enhanced in properties includes a substrate (11) composed of a {111}-Si single crystal having a surface {111} crystal plane and a boron phosphide-based semiconductor layer formed on the surface of the substrate and composed of a polycrystal layer (12) that is an aggregate of a plurality of a triangular pyramidal single crystal entities (13) of the boron phosphide-based semiconductor crystal, where in each single crystal entity has a twining interface that forms an angle of 60° relative to a <110> crystal direction of the substrate.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: December 16, 2008
    Assignee: Showa Denko K.K.
    Inventors: Takashi Udagawa, Tamotsu Yamashita
  • Patent number: 7435297
    Abstract: A method for growing Group III nitride materials using a molten halide salt as a solvent to solubilize the Group-III ions and nitride ions that react to form the Group III nitride material. The concentration of at least one of the nitride ion or Group III cation is determined by electrochemical generation of the ions.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: October 14, 2008
    Assignee: Sandia Corporation
    Inventors: Karen E. Waldrip, Jeffrey Y. Tsao, Thomas M. Kerley
  • Patent number: 7427326
    Abstract: A method of forming a bipolar device includes forming at least one p-type layer of single crystal silicon carbide and at least one n-type layer of single crystal silicon carbide on a substrate. Stacking faults that grow under forward operation of the device are segregated from at least one of the interfaces between the active region and the remainder of the device. The method of forming bipolar devices includes growing at least one of the epitaxial layers to a thickness greater than the minority carrier diffusion length in that layer. The method also increases the doping concentration of epitaxial layers surrounding the drift region to decrease minority carrier lifetimes therein.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: September 23, 2008
    Assignee: Cree, Inc.
    Inventors: Joseph J. Sumakeris, Ranbir Singh, Michael James Paisley, Stephan Georg Mueller, Hudson M. Hobgood, Calvin H. Carter, Jr., Albert Augustus Burk, Jr.
  • Patent number: 7416606
    Abstract: The invention relates to a method of forming a layer of silicon carbide on a silicone wafer. The method includes the following steps: depositing an anti-carburation mask on the wafer using an essentially-check pattern; performing a carburation step under conditions such that the residual stress takes the form of extension and compression respectively; removing the mask; and form of extension and compression respectively; removing the mask; and performing a carburation step under conditions such that the residual stress takes form of compression and extension respectively.
    Type: Grant
    Filed: May 5, 2004
    Date of Patent: August 26, 2008
    Assignee: Centre National de la Recherche Scientifique
    Inventor: André Leycuras
  • Publication number: 20080166522
    Abstract: An epitaxial growth process for producing a thick III-N layer, wherein III denotes at least one element of group III of the periodic table of elements, is disclosed, wherein a thick III-N layer is deposited above a foreign substrate. The epitaxial growth process preferably is carried out by HVPE. The substrate can also be a template comprising the foreign substrate and at least one thin III-N intermediate layer. The surface quality is improved by providing a slight intentional misorientation of the substrate, and/or a reduction of the N/III ratio and/or the reactor pressure towards the end of the epitaxial growth process. Substrates and semiconductor devices with such improved III-N layers are also disclosed.
    Type: Application
    Filed: May 5, 2006
    Publication date: July 10, 2008
    Applicants: FREIBERGER COMPOUND MATERIALS GMBH, OSRAM OPTO SEMICONDUCTORS GMBH, FRAUNHOFER GESELLSCHAFT ZUR FORDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventors: Ferdinand Scholz, Peter Bruckner, Frank Habel, Matthias Peter, Klaus Kohler
  • Patent number: 7393412
    Abstract: A method for manufacturing a compound semiconductor epitaxial substrate with few concave defects is provided. The method for manufacturing a compound semiconductor epitaxial substrate comprises a step of epitaxially growing an InGaAs layer on an InP single crystal substrate or on an epitaxial layer lattice-matched to the InP single crystal substrate under conditions of ratio of V/: 10-100, growth temperature: 630° C.-700° C., and growth rate: 0.6 ?m/h-2 ?m/h.
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: July 1, 2008
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Kenji Kohiro, Tomoyuki Takada
  • Patent number: 7384481
    Abstract: Methods for forming compositions comprising a single-phase rare-earth dielectric disposed on a substrate are disclosed. In some embodiments, the method forms a semiconductor-on-insulator structure. Compositions and structures that are formed via the method provide the basis for forming high-performance devices and circuits.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: June 10, 2008
    Assignee: Translucent Photonics, Inc.
    Inventor: Petar Atanackovic
  • Patent number: 7384477
    Abstract: The present invention is a method for producing a single crystal with pulling the single crystal from a raw material melt in a chamber by CZ method, wherein when growing the single crystal, where a pulling rate is defined as V and a temperature gradient of the crystal is defined as G during growing the single crystal, the temperature gradient G of the crystal is controlled by changing at least two or more of pulling conditions. Thereby, there is provided a method for producing a single crystal in which when the single crystal is grown by CZ method, V/G can be controlled without lowering a pulling rate V, and thus the single crystal including a desired defect region can be produced effectively for a short time.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: June 10, 2008
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Masahiro Sakurada, Makoto Iida, Nobuaki Mitamura, Atsushi Ozaki
  • Patent number: 7377978
    Abstract: It is to provide a method for producing a silicon epitaxial wafer, which can prevent fine unevenness from occurring on a rear main surface of a silicon epitaxial wafer and which suppresses the haze level of the whole rear main surface to 50 ppm or less. A method for producing a silicon epitaxial wafer, includes: a hydrogen heat treatment step of arranging within a reactor a susceptor capable of mounting a silicon single crystal substrate and subjecting the silicon single crystal substrate mounted on the susceptor to heat treatment in a hydrogen atmosphere, and a vapor phase epitaxy step of epitaxially growing a silicon epitaxial layer after the hydrogen heat treatment step, wherein the silicon single crystal substrate is separated from the susceptor during the hydrogen heat treatment step, and the silicon single crystal substrate is mounted on the susceptor during the vapor phase epitaxy step.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: May 27, 2008
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventor: Tsuyoshi Nishizawa
  • Patent number: 7374617
    Abstract: The invention includes atomic layer deposition methods and chemical vapor deposition methods. In a particular aspect of the invention, a source of microwave radiation is provided proximate a reaction chamber. At least a fragment of a precursor material is chemisorbed on a substrate within the reaction chamber while not exposing the precursor material to microwave radiation from the source. Excess precursor material is removed from the chamber, and the chemisorbed material is subsequently exposed to microwave radiation from the source within the reaction chamber.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: May 20, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Patent number: 7371281
    Abstract: A growth crucible (2) for depositing on a seed crystal substrate (5) a silicon carbide single crystal (6) using a sublimate gas of a silicon carbide raw material (11) is disposed inside of an outer crucible (1). During the course of silicon carbide single crystal, a silicon raw material (22) is continuously fed from outside into a space between the growth crucible and the outer crucible for the purpose of vaporizing the silicon raw material. An atmosphere gas surrounding the growth crucible is constituted of a silicon gas. The pressure of the atmosphere silicon gas is controlled to suppress a variation in the composition of the sublimate gas within the growth crucible to thereby grow a large-sized silicon carbide single crystal with few crystal defects on the seed crystal substrate reliably at a high growth rate.
    Type: Grant
    Filed: September 18, 2003
    Date of Patent: May 13, 2008
    Assignee: Showa Denko K.K.
    Inventors: Yasuyuki Sakaguchi, Atsushi Takagi, Naoki Oyanagi
  • Patent number: 7361220
    Abstract: The present invention provides a method of manufacturing a gallium nitride single crystal that can suppress the decomposition of gallium nitride and improve production efficiency in a sublimation method. According to the manufacturing method, a material (GaN powder) for the gallium nitride (GaN) single crystal is placed inside a crucible, sublimed or evaporated by heating, and cooled on a substrate surface to return to a solid again, so that the gallium nitride single crystal is grown on the substrate surface. The growth of the single crystal is performed under pressure. The pressure is preferably not less than 5 atm (5×1.013×105 Pa). The single crystal is grown preferably in a mixed gas atmosphere containing NH3 and N2.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: April 22, 2008
    Assignees: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takatomo Sasaki, Yusuke Mori, Fumio Kawamura, Masashi Yoshimura, Yasunori Kai, Mamoru Imade, Yasuo Kitaoka, Hisashi Minemoto, Isao Kidoguchi
  • Publication number: 20080072816
    Abstract: A method for forming a structure of a desired cross-section on a substrate is provided. The method provides a seed structure comprising at least one support layer on the substrate. The support layer has a geometric shape related to the desired cross-section of the structure and is diffusive to a precursor constituent. The method further includes growing the structure by supplying at least one precursor constituent on the substrate. The desired cross-section of the structure is defined by the geometric shape of at least one support layer.
    Type: Application
    Filed: September 26, 2006
    Publication date: March 27, 2008
    Inventors: Walter H. Riess, Heike E. Riel, Siegfried F. Karg, Heinz Schmid
  • Patent number: 7309394
    Abstract: An object is to provide an ultraviolet light-emitting device in which a p-type semiconductor which has high conductivity and an emission peak in ultraviolet region, and emits light efficiently is used. The p-type semiconductor is prepared by supplying a p-type impurity raw material at the same time or after starting supply of predetermined types of crystal raw materials, besides before starting supply of other types of crystal raw materials than the predetermined types of crystal raw materials in one cycle wherein all the types of crystal raw materials of the plural types of crystal raw materials are supplied in one time each in case of making crystal growth by supplying alternately the plural types of crystal raw materials in a pulsed manner.
    Type: Grant
    Filed: July 25, 2003
    Date of Patent: December 18, 2007
    Assignee: Riken
    Inventors: Hideki Hirayama, Sohachi Iwai, Yoshinobu Aoyagi
  • Patent number: 7303632
    Abstract: A vapor transport growth process for bulk growth of high quality gallium nitride for semiconductor applications is disclosed. The method includes the steps of heating a gallium nitride source material, a substrate suitable for epitaxial growth of GaN thereon, ammonia, a transporting agent that will react with GaN to form gallium-containing compositions, and a carrier gas to a temperature sufficient for the transporting agent to form volatile Ga-containing compositions from the gallium nitride source material. The method is characterized by maintaining the temperature of the substrate sufficiently lower than the temperature of the source material to encourage the volatile gallium-containing compositions to preferentially form GaN on the substrate.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: December 4, 2007
    Assignee: Cree, Inc.
    Inventor: Gerald H. Negley
  • Patent number: 7294360
    Abstract: A micro-optical element is produced through vapor deposition techniques, such as atomic layer deposition. An optical structure having a surface with uneven structures is exposed to one or more precursor vapors to create a self-limiting film growth on the surface of the optical structure. The film thickness may be increased and controlled by subsequent exposures. The resulting film conforms to surface structures having varying complex dimensions.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: November 13, 2007
    Assignee: Planar Systems, Inc.
    Inventors: Jarmo Ilmari Maula, Runar Olof Ivar Törnqvist
  • Patent number: 7279041
    Abstract: An atomic layer deposition method includes positioning a plurality of semiconductor wafers into an atomic layer deposition chamber. Deposition precursor is emitted from individual gas inlets associated with individual of the wafers received within the chamber effective to form a respective monolayer onto said individual wafers received within the chamber. After forming the monolayer, purge gas is emitted from individual gas inlets associated with individual of the wafers received within the chamber. An atomic layer deposition tool includes a subatmospheric load chamber, a subatmospheric transfer chamber and a plurality of atomic layer deposition chambers. Other aspects and implementations are disclosed.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: October 9, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Trung Tri Doan
  • Patent number: 7276117
    Abstract: Embodiments related to a method of forming semi-insulating silicon carbide (SiC) single crystal are disclosed in which shallow donor levels originating, at least in part, from residual nitrogen impurities are compensated by the addition of one or more trivalent element(s) introduced by doping the SiC in a concentration that changes the SiC conductivity from n-type to semi-insulating. Related embodiments provide for the additional doping of the SiC single crystal with one or more deep level dopants. However, the resulting concentration of deep level dopants, as well as shallow donor or acceptor dopants, is not limited to concentrations below the detection limits of secondary ion mass spectrometry (SIMS) analysis.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: October 2, 2007
    Assignee: Cree Dulles, Inc.
    Inventors: Cem Basceri, Nikolay Yushin, Cengiz M. Balkas
  • Patent number: 7258742
    Abstract: A method of manufacturing KNbO3 single crystal thin film having single-phase high quality and excellent morphology on each of single crystal substrates. A surface acoustic wave element, frequency filter, frequency oscillator, electronics circuit, and electronic device employ the thin film manufactured by the method, and have high k2, and are wideband, reduced in size and economical in power consumption. A plasma plume containing K, Nb, and O in the range 0.5?x?xE is supplied to a substrate, where x is a mole ratio of niobium (Nb) to potassium (K) in KxNb1?xOy, and xE is a mole composition ratio at the eutectic point for KNbO3 and 3K2O.Nb2O5 under a predetermined oxygen partial pressure. Maintaining the temperature Ts of the substrate in the range TE?Ts?Tm where TE represents the temperature at the eutectic point and Tm represents a complete melting temperature, the KNbO3 single crystal is precipitated from the KxNb1?xOy deposited on the substrate.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: August 21, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Takamitsu Higuchi, Setsuya Iwashita, Hiromu Miyazawa
  • Patent number: 7255744
    Abstract: Concerns lithium-doped diamond: Low-resistivity n-type semiconductor diamond doped with lithium and nitrogen, and a method of manufacturing such diamond are provided. Low-resistivity n-type semiconductor diamond containing 1017 cm?3 or more of lithium atoms and nitrogen atoms together, in which are respectively doped lithium atoms into carbon-atom interstitial lattice sites, and nitrogen atoms into carbon-atom substitutional sites, with the lithium and the nitrogen holding arrangements that neighbor each other. To obtain low-resistivity n-type semiconductor diamond, in a method for the vapor synthesis of diamond, photodissociating source materials by photoexcitation utilizing vacuum ultraviolet light and irradiating a lithium source material with an excimer laser to scatter and supply lithium atoms enables the diamond to be produced.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: August 14, 2007
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Akihiko Namba, Takahiro Imai, Hisao Takeuchi
  • Patent number: 7250083
    Abstract: A method and an apparatus for executing efficient and cost-effective Atomic Layer Deposition (ALD) at low temperatures are presented. ALD films such as oxides and nitrides are produced at low temperatures under controllable and mild oxidizing conditions over substrates and devices that are moisture- and oxygen-sensitive. ALD films, such as oxides, nitrides, semiconductors and metals, are efficiently and cost-effectively deposited from conventional metal precursors and activated nonmetal sources. Additionally, substrate preparation methods for optimized ALD are disclosed.
    Type: Grant
    Filed: March 7, 2003
    Date of Patent: July 31, 2007
    Assignee: Sundew Technologies, LLC
    Inventor: Ofer Sneh
  • Patent number: 7232487
    Abstract: A method of making a highly sensitive epitaxial germanium low temperature sensor that is superior in the method of production and performance than those currently available. The geometry and sensitivity of the sensor can be tuned to desired temperature ranges, and specifically can operate at cryogenic temperatures. The sensor can be manufactured uniformly and reproducibly in large quantities at relatively low cost in which large area arrays are possible. The applications of the sensors range from conventional low temperature thermometry and control in laboratory and industrial settings, to applications associated with infrared, x-ray, particle and plasma physics and spectroscopy.
    Type: Grant
    Filed: November 9, 2001
    Date of Patent: June 19, 2007
    Assignee: Smithsonian Astrophysical Observatory
    Inventors: Eric H. Silver, Norman W. Madden, McDonald Robinson, Lamonte H. Lawrence
  • Patent number: 7229498
    Abstract: Nanostructures (18) and methods for production thereof by phase separation during metal organic vapor-phase epitaxy (MOVPE). An embodiment of one of the methods may comprise providing a growth surface in a reaction chamber and introducing a first mixture of precursor materials into the reaction chamber to form a buffer layer (12) thereon. A second mixture of precursor materials may be provided into the reaction chamber to form an active region (14) on the buffer layer (12), wherein the nanostructure (18) is embedded in a matrix (16) in the active region (14). Additional steps are also disclosed for preparing the nanostructure (18) product for various applications.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: June 12, 2007
    Assignee: Midwest Research Institute
    Inventors: Andrew G. Norman, Jerry M. Olson
  • Patent number: 7220313
    Abstract: The invention herein relates to controlling the nitrogen content in silicon carbide crystals and in particular relates to reducing the incorporation of nitrogen during sublimation growth of silicon carbide. The invention controls nitrogen concentration in a growing silicon carbide crystal by providing an ambient atmosphere of hydrogen in the growth chamber. The hydrogen atoms, in effect, block, reduce, or otherwise hinder the incorporation of nitrogen atoms at the surface of the growing crystal.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: May 22, 2007
    Assignee: Cree, Inc.
    Inventors: George J. Fechko, Jr., Jason R. Jenny, Hudson M. Hobgood, Valeri F. Tsvetkov, Calvin H. Carter, Jr.
  • Patent number: 7217322
    Abstract: A method of fabricating an epitaxial silicon-germanium layer for an integrated semiconductor device comprises the step of depositing an arsenic in-situ doped silicon-germanium layer, wherein arsenic and germanium are introduced subsequently into different regions of said silicon-germanium layer during deposition of said silicon-germanium layer. By separating arsenic from germanium any interaction between arsenic and germanium is avoided during deposition thereby allowing fabricating silicon-germanium layers with reproducible doping profiles.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: May 15, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Jeffrey A. Babcock, Scott Balster, Alfred Haeusler, Angelo Pinto, Manfred Schiekofer, Philipp Steinmann, Badih El-Kareh
  • Patent number: 7211144
    Abstract: A method of forming a tungsten nucleation layer using a sequential deposition process. The tungsten nucleation layer is formed by reacting pulses of a tungsten-containing precursor and a reducing gas in a process chamber to deposit tungsten on the substrate. Thereafter, reaction by-products generated from the tungsten deposition are removed from the process chamber. After the reaction by-products are removed from the process chamber, a flow of the reducing gas is provided to the process chamber to react with residual tungsten-containing precursor remaining therein. Such a deposition process forms tungsten nucleation layers having good step coverage. The sequential deposition process of reacting pulses of the tungsten-containing precursor and the reducing gas, removing reaction by-products, and than providing a flow of the reducing gas to the process chamber may be repeated until a desired thickness for the tungsten nucleation layer is formed.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: May 1, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Xinliang Lu, Ping Jian, Jong Hyun Yoo, Ken Kaung Lai, Alfred W. Mak, Robert L. Jackson, Ming Xi
  • Patent number: 7208044
    Abstract: This invention disclosure describes methods for the fabrication metal oxide films on surfaces by topotactic anion exchange, and laminate structures enabled by the method. A precursor metal-nonmetal film is deposited on the surface, and is subsequently oxidized via topotactic anion exchange to yield a topotactic metal-oxide product film. The structures include a metal-oxide layer(s) and/or a metal-nonmetal layer(s).
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: April 24, 2007
    Inventor: Mark A. Zurbuchen
  • Patent number: 7192483
    Abstract: The present invention relates to a method for diamond coating of substrates in which the substrate is exposed in a vacuum atmosphere to a reactive gas mixture excited by means of a plasma discharge, the plasma discharge comprising a plasma beam (14) in an evacuated receiver (16) that is formed between a cathode chamber (1) and an anode (2), and the reactive gas mixture comprising a reactive gas and a working gas, the reactive gas in (9) and the working gas in (8) and/or (9) introduced into the receiver, and the receiver (16) is evacuated by a pump arrangement (15), and the hydrogen concentration of the reactive gas mixture being 0–45 vol. %.
    Type: Grant
    Filed: October 7, 2002
    Date of Patent: March 20, 2007
    Assignee: Unaxis Balzers Aktiengesellschaft
    Inventors: David Franz, Johann Karner