Including Change In A Growth-influencing Parameter (e.g., Composition, Temperature, Concentration, Flow Rate) During Growth (e.g., Multilayer Or Junction Or Superlattice Growing) Patents (Class 117/105)
-
Patent number: 6478872Abstract: A method of delivering two or more mutually-reactive reaction gases when a predetermined film is deposited on a substrate, and a shower head used in the gas delivery method, function to increase the film deposition rate while preventing formation of contaminating particles. In this method, one reaction gas is delivered toward the edge of the substrate, and the other reaction gases are delivered toward the central portion of the substrate, each of the reaction gases being delivered via an independent gas outlet to prevent the reaction gases from being mixed. In the shower head, separate passages are provided to prevent the first reaction gas from mixing with the other reaction gases by delivering the first reaction gas from outlets formed around the edge of the bottom surface of the shower head. The other reaction gases are delivered from outlets formed in the central portion of the bottom surface of the shower head.Type: GrantFiled: December 20, 1999Date of Patent: November 12, 2002Assignee: Samsung Electronics Co., Ltd.Inventors: Yun-sook Chae, In-sang Jeon, Sang-bom Kang, Sang-in Lee, Kyu-wan Ryu
-
Patent number: 6475456Abstract: There is disclosed a method for manufacturing a silicon carbide film in which a crystal orientation is continued on a single crystal substrate surface and silicon carbide is allowed to epitaxially grow, the method comprising the steps of: entirely or partially providing the substrate surface with a plurality of undulations extended parallel in one direction; and allowing silicon carbide to grow on the substrate surface.Type: GrantFiled: December 3, 2001Date of Patent: November 5, 2002Assignee: Hoya CorporationInventors: Yukitaka Nakano, Hiroyuki Nagasawa, Kuniaki Yagi, Takamitsu Kawahara
-
Patent number: 6464778Abstract: A tungsten deposition process. A crystal growth step is carried out in a reaction chamber to form a tungsten crystal layer over a substrate using tungsten hexafluoride, silane and nitrogen as reactive gases. An intermediate step is conducted such that the supply of tungsten hexafluoride to the reaction chamber is cut but the supply of silane is continued. Furthermore, nitrogen is passed into the reaction chamber selectively. A main deposition step is finally conducted to form a tungsten layer over the tungsten crystal layer using tungsten hexafluoride, hydrogen and nitrogen as reactive gases.Type: GrantFiled: January 17, 2001Date of Patent: October 15, 2002Assignee: Promos Technologies Inc.Inventor: Wen Pin Chiu
-
Patent number: 6458207Abstract: The present invention provides relates to silicon carbide single-crystals and in particular to silicon carbide single-crystals produced by supplying superfine silicon dioxide particles and superfine carbon particles to nucleating silicon carbide crystals and reducing the silicon dioxide by the carbon. The silicon carbide single-crystals according to the present invention comprise silicon carbide single-crystals grown on nucleating silicon carbide crystals, which are prepared by supplying and sticking superfine silicon dioxide particles and superfine carbon particles onto the surface of nucleating silicon carbide crystals kept in a heated state in an inert gas atmosphere and reducing the silicon dioxide by the carbon on the surface of the nucleating silicon carbide crystals thereby allowing silicon carbide single-crystals to grow on the nucleating silicon carbide crystals.Type: GrantFiled: February 20, 2001Date of Patent: October 1, 2002Assignee: Nippon Pillar Packing Co, Ltd.Inventor: Yoshimitsu Yamada
-
Patent number: 6451112Abstract: A crucible for growing a single crystal therein has a seed crystal attachment portion and a peripheral portion surrounding the seed crystal attachment portion through a gap provided therebetween. The seed crystal attachment portion has a support surface for holding a seed crystal on which the single crystal is to be grown, and the support surface is recessed from a surface of the peripheral portion. The seed crystal is attached to the support surface to cover an entire area of the support surface. Accordingly, no poly crystal is formed on the seed crystal attachment portion, and the single crystal can be grown on the seed crystal with high quality.Type: GrantFiled: October 12, 2000Date of Patent: September 17, 2002Assignee: Denso CorporationInventors: Kazukuni Hara, Kouki Futatsuyama, Shoichi Onda, Fusao Hirose, Emi Oguri, Naohiro Sugiyama, Atsuto Okamoto
-
Patent number: 6451113Abstract: A method for growing of oriented whisker arrays on a single-crystalline substrate consists in vapor-phase transport of the material to be crystallized from a solid-state source body of the same composition as the whiskers to the substrate coated with liquid-phase particles that serve as nucleation/catalyzing centers for the whisker growth. The source body has a plane surface that is faced to the substrate and parallel to it so that a vectorly-uniformn temperature field, whose gradient is perpendicular to both the substrate and the source, is created. The vectorly-uniform temperature field is realized by an apparatus with high-frequency heating of specially designed bodies that are arranged in a special position in respect to the high-frequency inductor. Laser and/or lamp heat sources can be also used either separately or in combinations with the high-frequency heater. In the apparatus, the material source is heated, while the substrate takes. heat from the material source.Type: GrantFiled: May 11, 2000Date of Patent: September 17, 2002Inventor: Evgeny Invievich Givargizov
-
Patent number: 6428621Abstract: A low defect (e.g., dislocation and micropipe) density silicon carbide (SiC) is provided as well as an apparatus and method for growing the same. The SiC crystal, growing using sublimation techniques, is preferably divided into two stages of growth. During the first stage of growth, the crystal grows in a normal direction while simultaneously expanding laterally. Although dislocation and other material defects may propagate within the axially grown material, defect propagation and generation in the laterally grown material are substantially reduced, if not altogether eliminated. After the crystal has expanded to the desired diameter, the second stage of growth begins in which lateral growth is suppressed and normal growth is enhanced. A substantially reduced defect density is maintained within the axially grown material that is based on the laterally grown first stage material.Type: GrantFiled: February 14, 2001Date of Patent: August 6, 2002Assignee: The Fox Group, Inc.Inventors: Yury Alexandrovich Vodakov, Mark Grigorievich Ramm, Evgeny Nikolaevich Mokhov, Alexandr Dmitrievich Roenkov, Yury Nikolaevich Makarov, Sergei Yurievich Karpov, Mark Spiridonovich Ramm, Heikki I. Helava
-
Patent number: 6426320Abstract: A method for fabricating superconductor articles with an epitaxial layer is described. The method can be performed under conditions of relatively high pressure and low substrate surface temperature. The resulting epitaxial layers can demonstrate various advantageous features, including low pore density and/or inclusions with small average particle size diameter.Type: GrantFiled: December 29, 1999Date of Patent: July 30, 2002Assignee: American Superconductors CorporationInventors: Leslie G. Fritzemeier, David M. Buczek
-
Publication number: 20020088389Abstract: A method and apparatus for the high throughput epitaxial growth of a layer on the surface of a substrate by chemical vapor deposition is provided. In one embodiment, the method of the present invention comprises placing the substrate within a reactor vessel and passing a horizontal flow of reactant gas comprising a precursor chemical through the reactor vessel. The flow of the reactant gas is defined as having a Reynolds number of at least about 5000. The substrate is heated to a temperature sufficient to thermally decompose the precursor chemical and deposit an epitaxial layer on the substrate. In accordance with a preferred embodiment of the present invention, the substrate is placed within the reactor vessel at a position such that the flow of the reactant gas is characterized as a fully developed turbulent flow.Type: ApplicationFiled: November 15, 2001Publication date: July 11, 2002Applicant: MEMC Electronic Materials, Inc.Inventors: Srikanth Kommu, Gregory M. Wilson
-
Patent number: 6375739Abstract: Apparatus for bulk vapor phase crystal growth comprising: at least one source zone and at least one sink zone each associated with means for independent temperature control within the zone; and at least one passage means adapted for transport of vapor from source to sink zone; and additionally comprising means for in-situ monitoring of the sink zone; wherein means for monitoring is substantially non-intrusive in terms of temperature regulation within the sink zone; process for bulk vapor phase crystal growth employing the apparatus; method for starting up the process; method for controlling the process; use for any bulk vapor transport technique; equipment for monitoring growth using the apparatus or process; and crystal grown with the apparatus or process.Type: GrantFiled: February 18, 2000Date of Patent: April 23, 2002Assignee: University of DurhamInventor: John Tomlinson Mullins
-
Patent number: 6372041Abstract: A method and apparatus for homoepitaxial growth of freestanding, single bulk crystal Gallium Nitride (GaN) are provided, wherein a step of nucleating GaN in a reactor results in a GaN nucleation layer having a thickness of a few monolayers. The nucleation layer is stabilized, and a single bulk crystal GaN is grown from gas phase reactants on the GaN nucleation layer. The reactor is formed from ultra low oxygen stainless steel.Type: GrantFiled: January 7, 2000Date of Patent: April 16, 2002Assignee: GAN Semiconductor Inc.Inventors: Hak Dong Cho, Sang Kyu Kang
-
Patent number: 6358313Abstract: A method of manufacturing a crystalline silicon base semiconductor thin film on a substrate, includes the steps of forming a thin film primarily made of silicon on the substrate by forming plasma of a film material gas containing at least a silicon base gas at the vicinity of the substrate; and crystallizing the silicon in the thin film primarily made of the silicon by emitting excited particles produced from an excited particle material gas to the substrate. At least one of the film material gas and the excited particle material gas contains an impurity gas for forming the silicon semiconductor, and thereby the crystalline silicon base semiconductor thin film is formed on the substrate.Type: GrantFiled: December 22, 1999Date of Patent: March 19, 2002Assignees: Sharp Kabushiki Kaisha, Nissin Electric Co., Ltd.Inventors: Shuhei Tsuchimoto, Hirohisa Tanaka, Kiyoshi Ogata, Hiroya Kirimura
-
Patent number: 6358316Abstract: In a method for producing a semiconductor device, a compound semiconductor cap layer including no aluminum is grown on a compound semiconductor layer including aluminum, a mask pattern insulating film is formed on a part of the compound semiconductor cap layer, the compound semiconductor wafer with the insulating mask pattern is immersed in an ammonium sulfide solution, the compound semiconductor wafer is selectively etched away using a chlorine containing gas in a reaction chamber, and a groove formed in the etching process is filled with a compound semiconductor layer grown in the reaction chamber by MOCVD. Therefore, a regrowth interface on which no impurity is segregated is attained, improving the quality of the regrown crystal layer.Type: GrantFiled: August 9, 1995Date of Patent: March 19, 2002Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hirotaka Kizuki, Norio Hayafuji, Tatsuya Kimura
-
Publication number: 20020020342Abstract: The present invention provides relates to silicon carbide single-crystals and in particular to silicon carbide single-crystals produced by supplying superfine silicon dioxide particles and superfine carbon particles to nucleating silicon carbide crystals and reducing the silicon dioxide by the carbon. The silicon carbide single-crystals according to the present invention comprise silicon carbide single-crystals grown on nucleating silicon carbide crystals, which are prepared by supplying and sticking superfine silicon dioxide particles and superfine carbon particles onto the surface of nucleating silicon carbide crystals kept in a heated state in an inert gas atmosphere and reducing the silicon dioxide by the carbon on the surface of the nucleating silicon carbide crystals thereby allowing silicon carbide single-crystals to grow on the nucleating silicon carbide crystals.Type: ApplicationFiled: February 20, 2001Publication date: February 21, 2002Inventor: Yoshimitsu Yamada
-
Publication number: 20020014199Abstract: An &agr;-SiC bulk single crystal is formed from an SiC gas phase by deposition of SiC on an SiC seed crystal. To enable an SiC bulk single crystal of the 15R type to be grown reproducibly and without restricting the seed crystal, the deposition takes place under a uniaxial tensile strength which includes a predetermined angle with the [0001] axis of the bulk single crystal, so that a rhombohedral crystal is formed.Type: ApplicationFiled: August 20, 2001Publication date: February 7, 2002Inventors: Harald Kuhn, Rene Stein, Johannes Volkl
-
Publication number: 20020014198Abstract: A process for preparation of silicon carbide by depositing silicon carbide on at least a part of a surface of a substrate having on its surface undulations extending approximately in parallel with each other, wherein a center line average of said undulations is in a range of from 3 to 1,000 nm, gradients of inclined planes of said undulations are in a range of from 1° to 54.7°, and, in a cross section orthogonal to a direction along which the undulations are extended, portions at which neighboring inclined planes are brought in contact with each other are in a curve shape. The substrate is silicon or silicon carbide having a surface with a plane normal in a crystallographic <001> orientation, having {001} planes accounting for 10% or less of the entire area of the surface, etc. Also claimed is a single crystal silicon carbide having a planar defect density of 1,000/cm2 or lower, or having an internal stress of 10 MPa or lower.Type: ApplicationFiled: April 6, 2001Publication date: February 7, 2002Applicant: HOYA CORPORATIONInventors: Takamitsu Kawahara, Hiroyuki Nagasawa, Kuniaki Yagi
-
Patent number: 6319439Abstract: A method of synthesizing an even free-standing diamond film without growth cracks is disclosed. The intrinsic tensile stress of a diamond film is compensated by an artificial compressive stress with a step down control of the deposition temperature during deposition. After a diamond film is deposited with a predetermined thickness at a deposition temperature, the deposition temperature is decreased in multiple steps during the deposition. The bending of the diamond wafer is minimized by using a tungsten substrate with higher elastic modulus than molybdenum.Type: GrantFiled: February 25, 2000Date of Patent: November 20, 2001Assignee: Korea Institute of Science and TechnologyInventors: Jae-Kap Lee, Young Joon Baik, Kwang Yong Eun
-
Patent number: 6309459Abstract: A compound semiconductor light emitting element has a unique SCH structure having InGaN graded layers with a gradiunt in content of In interposed between an InGaN active layer and AlGaN cladding layers to ensure a good crystallographic property of the active layer, to maintain and hetero interfaces on and above the active layer in a good condition and to prevent fluctuation in thickness of the active layer, so that a compound semiconductor light emitting element with a high emission efficiency and reliability or a laser element with a high slope efficiency and reliability be obtained. The InGaN graded layers with gradually changed In compositions can be made by increasing or decreasing the temperature while maintaining the supply amount or the ratio of the In source material relative to the supply amount of the other group III source materials in a constant value.Type: GrantFiled: July 24, 2000Date of Patent: October 30, 2001Assignee: Kabushiki Kaisha ToshibaInventor: Shozo Yuge
-
Patent number: 6306211Abstract: In a chamber, a substrate is mounted on a susceptor and then heated to an elevated temperature. Source and diluting gases are supplied into the chamber through source and diluting gas supply pipes provided with respective flow meters. In addition, a doping gas is also supplied through an additive gas supply pipe, which is provided with a pulse valve, and a gas inlet pipe into the chamber by repeatedly opening and closing the pulse valve. In this manner, a doped layer is grown epitaxially on the substrate. In this case, a pulsed flow of the doping gas is directly supplied through the pulse valve onto the substrate from the outlet port of a pressure reducer for a doping gas cylinder. As a result, a steeply rising dopant concentration profile appears in a transition region between the substrate and the doped layer, and the surface of the doped layer is planarized.Type: GrantFiled: March 10, 2000Date of Patent: October 23, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kunimasa Takahashi, Makoto Kitabatake, Masao Uchida, Toshiya Yokogawa
-
Publication number: 20010027744Abstract: A process for forming an epitaxial layer on a semiconductor wafer substrate is provided. The process comprises providing a semiconductor wafer substrate and an area for forming an epitaxial layer on said semiconductor wafer substrate. The formation area consists essentially of an epitaxial layer process chamber. The semiconductor wafer substrate is introduced into the epitaxial layer process chamber and an epitaxial layer is formed on at least one surface of the semiconductor wafer substrate. At least one epitaxial layer surface is substantially hydrophobic. Then, a chemical reagent is introduced into said epitaxial layer process chamber. The chemical reagent reacts with the epitaxial layer surface in situ to form an outer layer.Type: ApplicationFiled: December 15, 2000Publication date: October 11, 2001Inventor: Gerald R. Dietze
-
Patent number: 6270574Abstract: A method of growing a Group III-V nitrite buffer layer on a substrate made of a different material by molecular beam epitaxy is provided, which compensates for lattice mismatching between a material of the substrate and a material of a further layer to be grown on the substrate. The method includes the steps of: placing the substrate in a vacuum chamber at a reduced pressure suitable for epitaxial growth and at an elevated temperature; and supplying species to the vacuum chamber to be used in the epitaxial growth including a nitrogen precursor species supplying nitrogen to the substrate to cause epitaxial growth on the substrate of the buffer layer. The elevated temperature is in the range of 300 to 800 ° C., and a supply rate of nitrogen to the substrate is such as to cause epitaxial growth on the substrate of the Group III-V nitride buffer layer of uniform thickness less than 2000 Å at a growth rate in the range of 2 to 10 &mgr;m/hr.Type: GrantFiled: July 14, 2000Date of Patent: August 7, 2001Assignee: Sharp Kabushiki KaishaInventor: Stewart Edward Hooper
-
Patent number: 6254933Abstract: A method of performing chemical vapor deposition which produces semiconductor crystalline thin films having small transition widths. The method involves the use of a cold-wall type reaction chamber that is equipped with a gas inlet at one end and a gas outlet at the other end and a semiconductor substrate support which supports a semiconductor substrate so that a main surface thereof is horizontal. A reactant gas is caused to flow horizontally through the reaction chamber to effect the growing of a crystalline thin film on the main surface of the semiconductor substrate. The semiconductor substrate is arranged within the reactor chamber within a distance W which is measured from a leading edge of the semiconductor substrate at a most upstream position along a direction toward the gas outlet where W indicates an internal width of the reaction chamber.Type: GrantFiled: September 14, 1999Date of Patent: July 3, 2001Assignee: Shin-Etsu Handotai, Ltd.Inventors: Hitoshi Habuka, Masanori Mayuzumi, Naoto Tate, Masatake Katayama
-
Patent number: 6245144Abstract: A method of controlling the relative amounts of silicon dopant inside and outside of an enhanced growth region on an indium phosphide substrate using a metalorganic chemical vapor deposition (MOCVD) process. The method includes the steps of positioning the indium phosphide substrate in a reactor chamber, and defining an enhanced growth region on the substrate by depositing a dielectric mask on the substrate. The indium phosphide substrate is heated to a growth temperature of between about 600 and 630° C., and the pressure in the reactor chamber is adjusted to between about 40 and 80 Torr. A first gas contains a metalorganic compound comprising indium and a hydrogen carrier gas flow of between about 12 and 16 liters/minute, and a second gas containing a phosphide and a doping gas containing a silicon dopant at a flow rate of between are introduced into the reactor chamber.Type: GrantFiled: December 6, 1999Date of Patent: June 12, 2001Assignee: Lucent Technologies Inc.Inventors: Thomas C. Bitner, Chris W. Ebert, Michael Geva, Charles H. Joyner
-
Patent number: 6231668Abstract: A method for manufacturing and calibrating a scale in the nanometer range for technical devices which are used for the high-resolution or ultrahigh-resolution imaging of structures, and such a scale. To construct the scale, at least two different crystalline or amorphous materials are used, which, when imaged, are easily distinguished from one another by their contrast. These material layers are deposited using a suitable material deposition method as a heterolayer sequence onto a substrate material. The produced heterolayer sequence is characterized experimentally using an analysis method that is sensitive to the individual layer thicknesses of the heterolayer sequence. The data obtained from the analysis method are evaluated and recorded. The layer structure is exposed by splitting open the heterolayer sequence in the deposition direction.Type: GrantFiled: February 6, 1997Date of Patent: May 15, 2001Assignee: Deutsche Telekom AGInventors: Rainer Loesch, Hartmut Hillmer, Winfried Schlapp, Armin Poecker, Walter Betz, Rainer Goebel
-
Patent number: 6214712Abstract: A process for growing a metal oxide thin film upon a semiconductor surface with a physical vapor deposition technique in a high-vacuum environment and a structure formed with the process involves the steps of heating the semiconductor surface and introducing hydrogen gas into the high-vacuum environment to develop conditions at the semiconductor surface which are favorable for growing the desired metal oxide upon the semiconductor surface yet is unfavorable for the formation of any native oxides upon the semiconductor. More specifically, the temperature of the semiconductor surface and the ratio of hydrogen partial pressure to water pressure within the vacuum environment are high enough to render the formation of native oxides on the semiconductor surface thermodynamically unstable yet are not so high that the formation of the desired metal oxide on the semiconductor surface is thermodynamically unstable.Type: GrantFiled: September 16, 1999Date of Patent: April 10, 2001Assignee: UT-Battelle, LLCInventor: David P. Norton
-
Patent number: 6183555Abstract: A sapphire single crystal wafer 11 having a diameter not less than two inches and having an off-angled surface which is obtained by rotating an R (1-102) surface about a [11-20] axis by a given off-angle is introduced in a CVD apparatus, and a double-layer structure of first and second aluminum single crystal layers 12 and 13 is deposited on the off-angled surface of the sapphire single crystal wafer by MOCVD. The thus deposited aluminum single crystal layer 13 has (1-210) surface. The first aluminum nitride single crystal layer 12 serves as a buffer layer and has a thickness of 5-50 nm, and the second aluminum nitride single crystal layer 13 has a thickness not less than 1 &mgr;m. The off-angle is preferably set to a value not less than ±1°, much preferably a value ±2°, more preferably a value not less than −3°, and particularly preferable to a value within a range from −2°-+10°.Type: GrantFiled: May 11, 1999Date of Patent: February 6, 2001Assignee: NGK Insulators, Ltd.Inventors: Tomohiko Shibata, Yukinori Nakamura
-
Patent number: 6143619Abstract: A method of manufacturing a semiconductor device contains a first treatment step of removing a silicon oxide film on a semiconductor substrate (15) in a rare hydrofluoric acid treatment device (12), a second treatment step of forming hemispherical grained silicon on the semiconductor substrate (15) in an HSG-Si forming device (13), and a step of moving the semiconductor substrate (15) treated in the first treatment step to the HSG-Si forming device (13) by means of a semiconductor substrate moving device (14), wherein filtering an air in the semiconductor substrate moving device (14) is conducted so that an amount of organic materials which adhere onto a surface of the semiconductor substrate (15) during a process to the second treatment step is set to 1 ng/cm.sup.2 or less.Type: GrantFiled: July 17, 1998Date of Patent: November 7, 2000Assignee: NEC CorporationInventors: Kenji Okamura, Shuji Fujiwara, Takao Katuyama
-
Patent number: 6139629Abstract: The present invention comprises growing gallium nitride films in the presence of bismuth using MBE at temperatures of about 1000 K or less. The present invention further comprises the gallium nitride films fabricated using the inventive fabrication method. The inventive films may be doped with magnesium or other dopants. The gallium nitride films were grown on sapphire substrates using a hollow anode Constricted Glow Discharge nitrogen plasma source. When bismuth was used as a surfactant, two-dimensional gallium nitride crystal sizes ranging between 10 .mu.m and 20 .mu.m were observed. This is 20 to 40 times larger than crystal sizes observed when GaN films were grown under similar circumstances but without bismuth. It is thought that the observed increase in crystal size is due bismuth inducing an increased surface diffusion coefficient for gallium. The calculated value of 4.7.times.10.sup.-7 cm.sup.2 /sec. reveals a virtual substrate temperature of 1258 K which is 260 degrees higher than the actual one.Type: GrantFiled: April 3, 1998Date of Patent: October 31, 2000Assignee: The Regents of the University of CaliforniaInventors: Christian K. Kisielowski, Michael Rubin
-
Patent number: 6123768Abstract: This invention relates to a method of preparing highly insulating GaN single crystal films in a molecular beam epitaxial growth chamber. A single crystal substrate is provided with the appropriate lattice match for the desired crystal structure of GaN. A molecular beam source of Ga and source of activated atomic and ionic nitrogen are provided within the growth chamber. The desired film is deposited by exposing the substrate to Ga and nitrogen sources in a two step growth process using a low temperature nucleation step and a high temperature growth step. The low temperature process is carried out at 100-400.degree. C. and the high temperature process is carried out at 600-900.degree. C. The preferred source of activated nitrogen is an electron cyclotron resonance microwave plasma.Type: GrantFiled: May 10, 1996Date of Patent: September 26, 2000Assignee: The Trustees of Boston UniversityInventor: Theodore D. Moustakas
-
Patent number: 6113692Abstract: The invention relates to an apparatus for forming SiC on a nucleus. The apparatus comprises a first enclosure (100) defined by at least one wall (102, 110, 112) and able to receive a SiC nucleus (122), a SiC powder reservoir (118) and means (120) for heating the enclosure and, according to the invention, the wall (102, 110, 112) is essentially covered by at least one SiC layer (116).Type: GrantFiled: March 25, 1997Date of Patent: September 5, 2000Assignee: Commissariat a l'Energie AtomiqueInventors: Claude Jaussaud, Roland Madard, Mikhail Anikin, Isabelle Garcon
-
Patent number: 6110279Abstract: A (111) cubic silicon carbide single-crystal layer is formed on a (111) silicon wafer, and then the silicon wafer is removed. Thus prepared (111) cubic silicon carbide single-crystal layer is disposed in a graphite crucible to function as a seed crystal. Silicon carbide source material powder is also held in the graphite crucible and sublimated in an atmosphere including inert gas, while controlling a temperature of the (111) cubic silicon carbide single-crystal layer to be lower than a temperature of the silicon carbide source material powder. As a result, a (0001) .alpha.-type silicon carbide single-crystal layer can be formed on the (111) cubic silicon carbide single-crystal layer with a large diameter and high quality at low cost.Type: GrantFiled: March 30, 1998Date of Patent: August 29, 2000Assignee: Denso CorporationInventors: Yasuo Kito, Youichi Kotanshi, Shoichi Onda, Tatuyuki Hanazawa, Eiji Kitaoka
-
Patent number: 6106616Abstract: A production method of a crystal structure oxide that includes the steps of evaporating the material by heating the material to generate a gas phase and precipitating crystals from the gas phase at a precipitating part so as to produce a layer crystal structure oxide. The precipitating part is provided away from the material in a range of greater than or equal to about 10 mm to about 30 mm.Type: GrantFiled: September 9, 1998Date of Patent: August 22, 2000Assignee: Sony CorporationInventors: Akio Machida, Naomi Nagasawa, Takaaki Ami, Masayuki Suzuki
-
Patent number: 6099640Abstract: A method of promoting evaporation of excess indium from a surface of an indium containing compound semiconductor single crystal layer during a discontinuation of a molecular beam epitaxial growth. Substantial supply of all elements for the indium containing compound semiconductor single crystal layer are stopped at least until a substrate temperature rises to a predetermined temperature of not less than an indium re-evaporation initiation temperature.Type: GrantFiled: September 3, 1998Date of Patent: August 8, 2000Assignee: NEC CorporationInventor: Hitoshi Negishi
-
Patent number: 6086673Abstract: Provided is a method for producing a nitride layer on a growth substrate. First a pretreatment layer is formed on the growth substrate, and then the formed pretreatment layer is exposed to a gaseous environment that is thermochemically reactive with the pretreatment layer. After gaseous environment exposure of the pretreatment layer, there is carried out an epitaxial growing process to produce on the substrate a nitride layer material defined as In.sub.x Ga.sub.y Al.sub.1-x-y N, where 0.ltoreq.x.ltoreq.1; 0.ltoreq.y.ltoreq.1; and 0.ltoreq.x+y.ltoreq.1. For example, a pretreatment layer of ZnO can be deposited on a sapphire growth substrate and then subjected to a gaseous environment, e.g., including HCl- and/or NH.sub.3 -containing gas, that is thermochemically reactive with the ZnO. Then an epitaxial layer of GaN can be grown by a hydride vapor phase epitaxial process on the pretreated substrate.Type: GrantFiled: April 2, 1998Date of Patent: July 11, 2000Assignee: Massachusetts Institute of TechnologyInventor: Richard J. Molnar
-
Patent number: 6080240Abstract: Crystal of sublimable material is recovered by introducing a reaction gas containing sublimable material into a vertical recovery chamber kept at a temperature near a depositing temperature of the sublimable material to form a crystal deposit of the sublimable material on a surface of a wall of the chamber, and cooling the wall formed with the crystal deposit to a temperature below the previous temperature to cause a contraction difference between the crystal deposit and the wall formed with the crystal deposit, and break away the deposited crystal from the wall.Type: GrantFiled: April 6, 1998Date of Patent: June 27, 2000Assignee: Nippon Shokubai Co., Ltd.Inventors: Hiroshi Uchida, Hideki Sogabe, Teruaki Yabuuchi
-
Patent number: 6071109Abstract: A method for producing aluminum-indium-antimony materials by metal-organic chemical vapor deposition (MOCVD). This invention provides a method of producing Al.sub.X In.sub.1-x Sb crystalline materials by MOCVD wherein an Al source material, an In source material and an Sb source material are supplied as a gas to a heated substrate in a chamber, said Al source material, In source material, and Sb source material decomposing at least partially below 525.degree. C. to produce Al.sub.x In.sub.1-x Sb crystalline materials wherein x is greater than 0.002 and less than one.Type: GrantFiled: February 24, 1999Date of Patent: June 6, 2000Assignee: Sandia CorporationInventors: Robert M. Biefeld, Andrew A. Allerman, Kevin C. Baucom
-
Patent number: 6069021Abstract: A method of growing a group III nitride semiconductor crystal layer includes a step of growing a first buffer layer composed of boron phosphide on a silicon single crystal substrate by a vapor phase growth method at a temperature of not lower than 200.degree. C. and not higher than 700.degree. C., a step of growing a second buffer layer composed of boron phosphide on the first buffer layer by a vapor phase growth method at a temperature of not lower than 750.degree. C. and not higher than 1200.degree. C., and a step of growing a crystal layer composed of group III nitride semiconductor crystal represented by general formula Al.sub.p Ga.sub.q In.sub.r N (where 0.ltoreq.p.ltoreq.1, 0.ltoreq.q.ltoreq.1, 0.ltoreq.r.ltoreq.1, p+q+r=1) on the second buffer layer by a vapor phase growth method. A semiconductor device incorporating the group III nitride semiconductor crystal layer is provided.Type: GrantFiled: March 17, 1999Date of Patent: May 30, 2000Assignee: Showa Denko K.K.Inventors: Kazutaka Terashima, Suzuka Nishimura, Takuji Tsuzaki, Takashi Udagawa
-
Patent number: 6068739Abstract: A method of manufacturing a data recording medium for recording and reproducing data by use of a magnetic field or light and formed of an ordered alloy thin film comprising the steps of forming at least one underlayer principally containing an element or a compound selected from the group consisting of Cr, Pt, Pd, Au, Fe, Ni, MgO, NiO and controlled in such a way that a crystal plane having a crystal lattice face of a Miller index (100) is in parallel to a substrate, and forming an ordered alloy layer with L1.sub.0 crystal structure by sputter deposition within the range satisfying Equation 1: P.times.D>3000, where P is Ar sputter-gas pressure (Pa) and D is a target-substrate distance (mm), is disclosed.Type: GrantFiled: June 9, 1999Date of Patent: May 30, 2000Assignee: Governor of Akita PrefectureInventors: Toshio Suzuki, Naoki Honda, Kazuhiro Ouchi
-
Patent number: 6068698Abstract: The invention relates to a p-type silicon macromolecule, with a multifaceted structure in which silicon atoms form the corners of an inner multifaceted structure having sides. Attached to each silicon atom is a doping atom. The doping atoms are attached to the silicon atoms and radiate out from the center of the molecule to form an outer multi-faceted structure having sides parallel to the inner multifaceted structure. The macromolecule forms a base facility in a transistor that comprises an emitter layer, a collector layer, connected to the base facility, and a control input structure. The control input structure comprises a dipole connected to a boundary surface on the transistor and at least one external modulation capacitor connected to the dipole. The capacitor receives a carrier signal from a control input signal. The dipole is spaced from the center a boundary surface by half a wavelength of the carrier signal.Type: GrantFiled: January 9, 1998Date of Patent: May 30, 2000Inventor: Christian Schmidt
-
Patent number: 6063185Abstract: Low defect density, low impurity bulk single crystals of AlN, SiC and AlN:SiC alloy are produced by depositing appropriate vapor species of Al, Si, N, C on multiple nucleation sites that are preferentially cooled to a temperature less than the surrounding surfaces in the crystal growth enclosure. The vapor species may be provided by subliming solid source material, vaporizing liquid Al, Si or Al--Si or injecting source gases. The multiple nucleation sites may be unseeded or seeded with a seed crystal such as 4 H or 6 H SiC.Type: GrantFiled: October 9, 1998Date of Patent: May 16, 2000Assignee: Cree, Inc.Inventor: Charles Eric Hunter
-
Patent number: 6051063Abstract: A diamond wafer including a substrate and a (100) oriented polycrystalline diamond film grown on the substrate for making surface acoustic wave devices, semiconductor devices or abrasion-resistant discs. The (100) oriented film is produced by changing a hydrocarbon ratio in a material gas halfway from a higher value to a lower value. The wafer is monotonously distorted with a distortion height H satisfying 2 .mu.m.ltoreq..vertline.H.vertline..ltoreq.150 .mu.m. The film is polished to a roughness of less than Rmax50 nm and Ra20 nm.Type: GrantFiled: November 21, 1997Date of Patent: April 18, 2000Assignee: Sumitomo Electric Industries, Ltd.Inventors: Keiichiro Tanabe, Yuichiro Seki, Akihiko Ikegaya, Naoji Fujimori, Hideaki Nakahata, Shin-ichi Shikata
-
Patent number: 6036774Abstract: Methods of preparing metal oxide nanorods are described. The metal oxide nanorods have diameters between 1 and 200 nm and aspect ratios between 5 and 2000. The methods include the steps of generating a metal vapor in a furnace, exposing the nanorod growth substrate to the metal vapor within a growth zone in the furnace for a sufficient time to grow metal oxide nanorods on a surface of the nanorod growth substrate, removing the nanorod growth substrate from the growth zone after the sufficient time to grow metal oxide nanorods on a surface of the nanorod growth substrate, and removing the metal oxide nanorods from the furnace. The methods can be used to prepared large quantities of metal oxide nanorods.Type: GrantFiled: January 22, 1997Date of Patent: March 14, 2000Assignee: President and Fellows of Harvard CollegeInventors: Charles M. Lieber, Peidong Yang
-
Patent number: 6030453Abstract: A production process for protecting the surface of compound semiconductor wafers includes providing a multi-wafer epitaxial production system with a transfer and load module, a III-V growth chamber and an insulator chamber. The wafer is placed in the transfer and load module and the pressure is reduced to .ltoreq.10.sup.-10 Torr, after which the wafer is moved to the III-V growth chamber and layers of compound semiconductor material are epitaxially grown on the surface of the wafer.Type: GrantFiled: March 4, 1997Date of Patent: February 29, 2000Assignee: Motorola, Inc.Inventors: Matthias Passlack, Jonathan K. Abrokwah, Ravi Droopad, Corey D. Overgaard
-
Patent number: 6022832Abstract: A method for fabricating superconductor articles with an epitaxial layer is described. The method can be performed under conditions of relatively high pressure and low substrate surface temperature. The resulting epitaxial layers can demonstrate various advantageous features, including low pore density and/or inclusions with small average particle size diameter.Type: GrantFiled: January 15, 1998Date of Patent: February 8, 2000Assignee: American Superconductor CorporationInventors: Leslie G. Fritzemeier, David M. Buczek
-
Patent number: 6015459Abstract: Method is provided for controlling the concentration of a dopant introduced into an epitaxial film during CVD or sublimation growth by controlling the energy of dopant atoms impinging on the film in a supersonic beam. Precursor materials may also be introduced by supersonic beam. Energy of the dopant atoms may be changed by changing flow conditions in the supersonic beam or changing carrier gases. Flow may be continuous or pulsed. Examples of silicon carbide doping are provided.Type: GrantFiled: June 26, 1998Date of Patent: January 18, 2000Assignee: Extreme Devices, Inc.Inventors: Keith D. Jamison, Mike L. Kempel
-
Patent number: 6007623Abstract: A method for producing a horizontal magnetic recording medium that has as its magnetic film a granular film with grains of a chemically-ordered FePt or FePtX (or CoPt or CoPtX) alloy in the tetragonal L1.sub.0 structure uses an etched seed layer beneath the granular film. The granular magnetic film reveals a very high magnetocrystalline anisotropy within the individual grains. The film is produced by sputtering from a single alloy target or cosputtering from several targets. The granular structure and the chemical ordering are controlled by means of sputter parameters, e.g., temperature and deposition rate, and by the use of the etched seed layer that provides a structure for the subsequently sputter-deposited granular magnetic film. The structure of the seed layer is obtained by sputter etching, plasma etching, ion irradiation, or laser irradiation. The magnetic properties, i.e., H.sub.c and areal moment density M.sub.Type: GrantFiled: August 29, 1997Date of Patent: December 28, 1999Assignee: International Business Machines CorporationInventors: Jan-Ulrich Thiele, Dieter Klaus Weller
-
Patent number: 6001172Abstract: A method and apparatus for generating a dopant gas species which is a reaction product of a metal and a gas reactive therewith to form the dopant gas species. A source mass of metal is provided and contacted with the reactive gas to yield a dopant gas species. The dopant gas species may be passed to a chemical vapor deposition reactor, or flowed to an ionization chamber to generate ionic species for ion implantation.Type: GrantFiled: August 5, 1997Date of Patent: December 14, 1999Assignee: Advanced Technology Materials, Inc.Inventors: Gautam Bhandari, W. Karl Olander, Michael A. Todd, Timothy Glassman
-
Patent number: 5993542Abstract: A method for fabricating nitride III-V compound semiconductor layers of substrate, of GaN for example, comprises the steps of: growing a first B.sub.w Al.sub.x Ga.sub.y In.sub.z N layer 2 (where 0.ltoreq.w.ltoreq.1, 0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, 0.ltoreq.y.ltoreq.1 and w+x+y+z=1) on a sacrificial sapphire substrate 1 by MOCVD at a growth rate not higher than 4 .mu.m/h; growing a second B.sub.w Al.sub.x Ga.sub.y In.sub.z N layer 3 (where 0.ltoreq.w.ltoreq.1, 0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, 0.ltoreq.y.ltoreq.1 and w+x+y+z=1) on the first B.sub.w Al.sub.x Ga.sub.y In.sub.z N layer by hydride VPE at a growth rate higher than 4 .mu.m/h and not higher than 200 .mu.m/h; and removing the sacrificial substrate 1.Type: GrantFiled: December 4, 1997Date of Patent: November 30, 1999Assignee: Sony CorporationInventors: Katsunori Yanashima, Masao Ikeda, Satoshi Tomioka
-
Patent number: 5964942Abstract: No wide bulk diamond wafer exists at present. A wide diamond-coated wafer is proposed instead of the bulk diamond wafer. Diamond is heteroepitaxially deposited on a convex-distorted non-diamond single crystal substrate by a vapor phase deposition method. In an early step, a negative bias is applied to the substrate. In the case of a Si substrate, an intermediate layer of .beta.-SiC is first deposited on the Si substrate by supplying a low carbon concentration material gas. Then the carbon concentration is raised for making a diamond film. The convex-distorted wafer is stuck to a holder having a shaft which is capable of inclining to the holder. The wafer is pushed to a turn-table of a polishing machine. The convex diamond wafer can fully be polished by inclining the holder to the shaft. A wide distorted mirror wafer of diamond is produced. Fine wire patterns can be made on the diamond mirror wafer by the photolithography.Type: GrantFiled: June 26, 1995Date of Patent: October 12, 1999Assignee: Sumitomo Electric Industries, Ltd.Inventors: Keiichiro Tanabe, Yuichiro Seki, Akihiko Ikegaya, Naoji Fujimori, Takashi Tsuno
-
Patent number: 5951757Abstract: A method for fabricating silicon-germanium alloy on a sapphire substrate of the present invention comprises the steps of passivating a surface of a sapphire substrate, maintaining a deposition temperature of about 900 degrees C., exposing the passivated surface to a flow of about 1 slm of about 2 percent silane in a hydrogen carrier and a flow of at least 200 sccm of about 10 percent germane in a hydrogen carrier to form a layer of single crystal silicon germanium alloy on the passivated surface of the sapphire substrate, and ramping the temperature down to about 650 degrees C. during the step of exposing the passivated surface to the germane gas.Type: GrantFiled: May 6, 1997Date of Patent: September 14, 1999Assignee: The United States of America as represented by the Secretary of the NavyInventors: Wadad B. Dubbelday, Paul R. de la Houssaye, Shannon D. Kasa, Isaac Lagnado