With Responsive Control Means Patents (Class 117/202)
  • Publication number: 20100294999
    Abstract: The sublimation speed of dopant can be precisely controlled without being influenced by a change over time of intra-furnace thermal environment. A dopant supply unit equipped with an accommodation chamber and a supply tube is provided. A sublimable dopant is accommodated. Upon sublimation of the dopant within the accommodation chamber, the sublimed dopant is introduced into a melt. The dopant within the accommodation chamber of the dopant supply unit is heated. The amount of heating by means of heating means is controlled so as to sublime the dopant at a desired sublimation speed. The dopant is supplied to the melt so that the dopant concentration until the first half of a straight body portion of the silicon single crystal is in the state of low concentration or non-addition.
    Type: Application
    Filed: April 23, 2008
    Publication date: November 25, 2010
    Applicant: SUMCO TECHXIV CORPORATION
    Inventors: Yasuhito Narushima, Shinichi Kawazoe, Fukuo Ogawa, Masahiro Irokawa, Toshimichi Kubota
  • Patent number: 7837969
    Abstract: The method of making a single crystal, especially a CaF2 single crystal, includes tempering, in which the crystal is heated at <18 K/h to a temperature of 1000° C. to 1350° C. and held at this temperature for at least 65 hours with maximum temperature differences within the crystal of <0.2 K. Subsequently the crystal is cooled with a cooling rate of at maximum 0.5 K/h above a limiting temperature between 900° C. to 600° C. and then further below this limiting temperature at maximum 3 K/h. The obtained CaF2 crystals have refractive index uniformity <0.025×10?6 (RMS) in a (111)-, (100)- or (110)-direction and a stress birefringence of less than 2.5 nm/cm (PV) and/or a stress birefringence of less than 1 nm/cm (RMS) in the (100)- or (110)-direction. In the (111)-direction the stress birefringence is <0.5 nm/cm (PV) and/or the stress birefringence is <0.15 nm/cm (RMS).
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: November 23, 2010
    Assignee: Hellma Materials GmbH & Co. KG
    Inventors: Joerg Staeblein, Lutz Parthier
  • Patent number: 7837794
    Abstract: A vapor phase growth apparatus and a vapor phase growth method improve the uniformity of film formed are provided. The vapor phase growth apparatus includes a chamber, a rotatable holder having a susceptor, an internal heater and an external heater which are arranged in the holder and heat the wafer from the bottom surface, an gas-pipe which is arranged to face the internal heater and sprays a cooling gas, and a temperature measuring unit which is arranged outside the chamber and measures the surface temperature of the wafer. In this manner, a position of a singular point of temperature which is an overheated portion generated on the wafer can be recognized. The singular point of temperature is locally cooled to make it possible to improve the uniformity of a temperature distribution in plane of the wafer.
    Type: Grant
    Filed: March 24, 2008
    Date of Patent: November 23, 2010
    Assignee: NuFlare Technology, Inc.
    Inventors: Hideki Ito, Shinichi Mitani
  • Patent number: 7837795
    Abstract: Methods are provided for low temperature, rapid baking to remove impurities from a semiconductor surface prior to in-situ deposition. Advantageously, a short, low temperature process consumes very little of the thermal budget, such that the process is suitable for advanced, high density circuits with shallow junctions. Furthermore, throughput is greatly improved by the low temperature bake, particularly in combination with low temperature plasma cleaning and low temperature wafer loading prior to the bake, and deposition after the bake at temperatures lower than conventional epitaxial deposition. The process enables epitaxial deposition of silicon-containing layers over semiconductor surfaces, particularly enabling epitaxial deposition over a silicon germanium base layer. By use of a low-temperature bake, the silicon germanium base layer can be cleaned to facilitate further epitaxial deposition without relaxing the strained crystal structure of the silicon germanium.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: November 23, 2010
    Assignee: ASM America, Inc.
    Inventors: Paul D. Brabant, Joe P. Italiano, Jianqing Wen
  • Publication number: 20100263586
    Abstract: A method for synthesizing ZnO, comprising continuously circulating a growth solution that is saturated with ZnO between a warmer deposition zone, which contains a substrate or seed, and a cooler dissolution zone, which is contains ZnO source material.
    Type: Application
    Filed: April 15, 2010
    Publication date: October 21, 2010
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Jacob J. Richardson, Frederick F. Lange, Maryann E. Lange
  • Publication number: 20100206219
    Abstract: An improvement to a method and an apparatus for growing a monocrystalline silicon ingot from silicon melt according to the CZ process. The improvement performs defining an error between a target taper of a meniscus and a measured taper, and translating the taper error into a feedback adjustment to a pull-speed of the silicon ingot. The conventional control model for controlling the CZ process relies on linear control (PID) controlling a non-linear system of quadratic relationship defined in the time domain between the diameter and the pull-speed. The present invention transforms the quadratic relationship in the time domain between the diameter and the pull-speed into a simile, linear relationship in the length domain between a meniscus taper of the ingot and the pull-speed.
    Type: Application
    Filed: March 8, 2010
    Publication date: August 19, 2010
    Inventors: Benno Orschel, Joel Kearns, Keiichi Takanashi, Volker Todt
  • Patent number: 7776152
    Abstract: Apparatus and method for growing and observing the growth of epitaxial layers on a wafer. The apparatus includes: epitaxial growth apparatus; a source of light mounted to illuminate an entire surface of the wafer in the apparatus during growth of the epitaxial layer on the entire surface of the wafer; and apparatus for observing scattering of the light from the entire surface of the wafer during growth of the epitaxial layer on the entire surface of the wafer. The method includes growing the epitaxial layer on a surface of the wafer and observing scattering of the light from the entire surface of the wafer during growth of the epitaxial layer on the entire surface of the wafer. The growing process is varied in accordance with the observation. With an epitaxial layer of gallium nitride (GaN) the entire surface of the wafer is observed for balls of gallium.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: August 17, 2010
    Assignee: Raytheon Company
    Inventors: William E. Hoke, Theodore D. Kennedy
  • Publication number: 20100162946
    Abstract: An improved system based on the Czochralski process for continuous growth of a single crystal ingot comprises a low aspect ratio, large diameter, and substantially flat crucible, including an optional weir surrounding the crystal. The low aspect ratio crucible substantially eliminates convection currents and reduces oxygen content in a finished single crystal silicon ingot. A separate level controlled silicon pre-melting chamber provides a continuous source of molten silicon to the growth crucible advantageously eliminating the need for vertical travel and a crucible raising system during the crystal pulling process. A plurality of heaters beneath the crucible establish corresponding thermal zones across the melt. Thermal output of the heaters is individually controlled for providing an optimal thermal distribution across the melt and at the crystal/melt interface for improved crystal growth. Multiple crystal pulling chambers are provided for continuous processing and high throughput.
    Type: Application
    Filed: December 17, 2009
    Publication date: July 1, 2010
    Inventor: David L. Bender
  • Patent number: 7704325
    Abstract: A crystal forming apparatus and method for using the apparatus, the method including depositing a precipitant solution in a site, incubating the site, during which time volatile vapor evaporates from the precipitant solution and accumulates in the site, and pumping the accumulated volatile vapor away from the site. An exemplary apparatus includes a sealed site except for a vent on the sealed site. In one embodiment, the vent is a passive vent that inhibits vapor diffusion out of the site. In another embodiment, the vent is an active vent that opens in response to a pressure differential. The present invention accelerates and controls the crystal growth process by pumping volatile vapor away from the sealed site.
    Type: Grant
    Filed: January 2, 2008
    Date of Patent: April 27, 2010
    Assignee: Neuro Probe Incorporated
    Inventor: Richard H. Goodwin, Jr.
  • Patent number: 7686888
    Abstract: Disclosed herein is a cooling system for a chamber of an ingot growth apparatus. In the present invention, guide blades (180) are provided in a base plate (100) at positions adjacent to unevenly curved parts of a guide line (170), which is the base plate (100), and along which cooling water flows. Furthermore, guide blades (360) are provided in a lid (300) at positions adjacent to ports, which are provided in the lid (300) and interfere with the flow of cooling water. As such, in the present invention, the guide blades are provided in the base plate (100) and the lid (300), which define the chamber, at positions at which cooling water creates stationary vortices, thus solving a problem of water stagnation, thereby increasing a cooling effect.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: March 30, 2010
    Assignee: Qualiflownaratech Co., Ltd.
    Inventor: Jong Gu Lee
  • Publication number: 20100031870
    Abstract: Controlling crystal growth in a crystal growing system is described. The crystal growing system includes a heated crucible including a semiconductor melt from which a monocrystalline ingot is grown according to a Czochralski and the ingot is grown on a seed crystal pulled from the melt. The method includes applying a cusped magnetic field to the melt by supplying an upper coil with a first direct current (IUDC) and supplying a lower coil with a second direct current (ILDC). The method also includes supplying the upper coil with a first alternating current (IUAC) and supplying the lower coil with a second alternating current (ILAC) to generate a time-varying magnetic field, wherein the time-varying magnetic field generates a pumping force in the semiconductor melt.
    Type: Application
    Filed: August 6, 2009
    Publication date: February 11, 2010
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Hariprasad Sreedharamurthy, Milind Kulkarni, Harold W. Korb
  • Publication number: 20100031876
    Abstract: A method for large-scale manufacturing of gallium nitride includes a process for reducing and/or minimizing contamination in the crystals, for solvent addition to an autoclave, for improving or optimizing the solvent atmosphere composition, for removal of the solvent from the autoclave, and for recycling of the solvent. The method is scalable up to large volumes and is cost effective.
    Type: Application
    Filed: August 4, 2009
    Publication date: February 11, 2010
    Applicant: SORAA,INC.
    Inventor: MARK P. D'EVELYN
  • Publication number: 20100024718
    Abstract: A method and apparatus for growing a semiconductor crystal include pulling the semiconductor crystal from melt at a pull speed and modulating the pull speed by combining a periodic pull speed with an average speed. The modulation of the pull speed allows in-situ determination of characteristic temperature gradients in the melt and in the crystal during crystal formation. The temperature gradients may be used to control relevant process parameters that affect morphological stability or intrinsic material properties in the finished crystal such as for instance the target pull speed of the crystal or the melt gap, which determines the thermal gradient in the crystal during growth.
    Type: Application
    Filed: July 31, 2008
    Publication date: February 4, 2010
    Inventors: Benno Orschel, Andrzej Buczkowski, Joel Kearns, Keiichi Takanashi, Volker Todt
  • Publication number: 20100024717
    Abstract: A semiconductor crystal growth method includes pulling a crystal from melt in a crucible at a nominal pull speed and generating a crucible lift signal to compensate reduction in melt level in the crucible. Based on diameter of the crystal, the method includes generating a correction signal and combining the crucible lift signal and the correction signal to keep the crystal diameter substantially constant.
    Type: Application
    Filed: July 31, 2008
    Publication date: February 4, 2010
    Inventors: Benno Orschel, Manabu Nishimoto
  • Publication number: 20100024716
    Abstract: An improvement to a method and an apparatus for growing a monocrystalline silicon ingot from silicon melt according to the CZ process. The improvement performs defining an error between a target taper of a meniscus and a measured taper, and translating the taper error into a feedback adjustment to a pull-speed of the silicon ingot. The conventional control model for controlling the CZ process relies on linear control (PID) controlling a non-linear system of quadratic relationship defined in the time domain between the diameter and the pull-speed. The present invention transforms the quadratic relationship in the time domain between the diameter and the pull-speed into a simile, linear relationship in the length domain between a meniscus taper of the ingot and the pull-speed.
    Type: Application
    Filed: July 31, 2008
    Publication date: February 4, 2010
    Inventors: Benno Orschel, Joel Kearns, Keiichi Takanashi, Volker Todt
  • Patent number: 7655091
    Abstract: The invention concerns a device (10) for forming in single-crystal state a compound body with incongruent evaporation, capable of being in monocrystalline or polycrystalline form, comprising at least one first chamber (20) containing a substrate (42) whereat is formed a polycrystalline source of said body and a monocrystalline germ (46) of said body; a second chamber (14), said substrate being arranged between the two chambers; means for input (36) of gaseous precursors of said body into the second chamber capable of bringing about deposition of said body in polycrystalline form on the substrate; and heating means (26) for maintaining the substrate at a temperature higher than the temperature of the germ so as to bring about sublimation of the polycrystalline source and the deposition on the germ of said body in monocrystalline form.
    Type: Grant
    Filed: May 15, 2003
    Date of Patent: February 2, 2010
    Assignee: Centre National de la Recherche Scientifique
    Inventors: Roland Madar, Michel Pons, Francis Baillet, Ludovic Charpentier, Etienne Pernot, Didier Chaussende, Daniel Turover
  • Patent number: 7651567
    Abstract: A method of forming a polycrystalline silicon layer includes: disposing a mask over the amorphous silicon layer, the mask having a plurality of transmissive regions, the plurality of transmissive regions being disposed in a stairstep arrangement spaced apart from each other in a first direction and a second direction substantially perpendicular from the first direction, each transmissive region having a central portion and first and second side portions that are adjacent to opposite ends of the central portion along the first direction, and wherein each of the portions has a length along the first direction and a width along the second direction, and wherein the width of first and second portions decreases away from the central portion along the first direction; irradiating a laser beam onto the amorphous silicon layer a first time through the mask to form a plurality of first irradiated regions corresponding to the plurality of transmissive regions, each first irradiated region having a central portion, and
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: January 26, 2010
    Assignee: LG Display Co., Ltd.
    Inventor: Yun-Ho Jung
  • Patent number: 7635413
    Abstract: A SiC single crystal is produced by the solution growth method in which a seed crystal attached to a seed shaft is immersed in a solution of SiC dissolved in a melt of Si or a Si alloy and a SiC single crystal is allowed to grow on the seed crystal by gradually cooling the solution or by providing a temperature gradient therein. To this method, accelerated rotation of a crucible is applied by repeatedly accelerating to a prescribed rotational speed and holding at that speed and decelerating to a lower rotational speed or a 0 rotational speed. The rotational direction of the crucible may be reversed each acceleration. The seed shaft may also be rotated synchronously with the rotation of the crucible in the same or opposite rotational as the crucible. A large, good quality single crystal having no inclusions are produced with a high crystal growth rate.
    Type: Grant
    Filed: March 1, 2007
    Date of Patent: December 22, 2009
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Kazuhiko Kusunoki, Kazuhito Kamei, Nobuyoshi Yashiro, Akihiro Yauchi, Yoshihisa Ueda, Yutaka Itoh, Nobuhiro Okada
  • Publication number: 20090309069
    Abstract: A method of manufacturing a silicon monocrystal by FZ method, wherein a P-type or N-type silicon crystal having been pulled up by CZ method is used as a raw material. While impurities whose conductivity type is the same as that of the raw material are supplied by a gas doping method, the raw material is recrystallized by an induction-heating coil for obtaining a product-monocrystal.
    Type: Application
    Filed: September 27, 2007
    Publication date: December 17, 2009
    Inventors: Shinji Togawa, Toshiyuki Sato
  • Publication number: 20090293800
    Abstract: A Czochralski single crystal manufacturing apparatus uses multiple heaters to improve the controllability of crystal diameter. The power supplied to the multiple heaters is controlled so as to bring the pulling up speed close to a predetermined speed set value, and so as to bring the heater temperatures close to predetermined target temperature values. The ratio of electrical power between the heaters is controlled to agree with a predetermined power ratio set value which varies according to the crystal pulling up length, and the heater temperatures change along with this change, which causes disturbance to the diameter control. To compensate for this, heater temperature changes along with the power ratio set value change are taken into account in advance in the temperature set values. Accordingly, along with change of the power ratio set value, the temperature set values change to values appropriate for the current power ratio set value.
    Type: Application
    Filed: July 20, 2007
    Publication date: December 3, 2009
    Applicant: SUMCO TECHXIV CORPORATION
    Inventors: Tetsuhiro Iida, Shin Matsukuma
  • Publication number: 20090249995
    Abstract: The present invention provides an apparatus for producing single crystals according to the Czochralski method, the apparatus including a chamber that can be divided into a plurality of chambers; at least one of the plurality of divided chambers having a circulating coolant passage in which a circulating coolant for cooling the chamber circulates; and measuring means that respectively measure an inlet temperature, an outlet temperature, and a circulating coolant flow rate of the circulating coolant in the circulating coolant passage; the apparatus further including a calculating means that calculates a quantity of heat removed from the chamber and/or a proportion of the quantity of removed heat, from the measured values of the inlet temperature, outlet temperature, and circulating coolant flow rate; and a pulling rate control means that controls a pulling rate of the single crystal based on the resulting quantity of removed heat and/or the resulting proportion of the quantity of removed heat.
    Type: Application
    Filed: August 20, 2007
    Publication date: October 8, 2009
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kiyotaka Takano, Masahiko Urano, Ryoji Hoshi
  • Patent number: 7597758
    Abstract: Embodiments of the invention provide chemical precursor ampoules that may be used during vapor deposition processes. In one embodiment, an apparatus for generating a chemical precursor gas used in a vapor deposition processing system is provided which includes a canister having a sidewall, a top, and a bottom forming an interior volume and a solid precursor material at least partially contained within a lower region of the interior volume. The apparatus further contains an inlet port and an outlet port in fluid communication with the interior volume and an inlet tube connected to the inlet port and positioned to direct a carrier gas towards the sidewall and away form the outlet port. In one example, the solid precursor contains pentakis(dimethylamido) tantalum (PDMAT). In another example, the apparatus contains a plurality of baffles that form an extended mean flow path between the inlet port and the outlet port.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: October 6, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Ling Chen, Vincent W. Ku, Hua Chung, Christophe Marcadal, Seshadri Ganguli, Jenny Lin, Dien-Yeh Wu, Alan Ouye, Mei Chang
  • Publication number: 20090224175
    Abstract: An apparatus for performing non-contact material characterization includes a wafer carrier adapted to hold a plurality of substrates and a material characterization device, such as a device for performing photoluminescence spectroscopy. The apparatus is adapted to perform non-contact material characterization on at least a portion of the wafer carrier, including the substrates disposed thereon.
    Type: Application
    Filed: February 12, 2009
    Publication date: September 10, 2009
    Applicant: VEECO INSTRUMENTS INC.
    Inventors: Dong Seung Lee, Mikhail Belousov, Eric A. Armour, William E. Quinn
  • Patent number: 7582162
    Abstract: A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: September 1, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsuo Isobe, Shunpei Yamazaki, Koji Dairiki, Hiroshi Shibata, Chiho Kokubo, Tatsuya Arao, Masahiko Hayakawa, Hidekazu Miyairi, Akihisa Shimomura, Koichiro Tanaka, Mai Akiba
  • Patent number: 7572335
    Abstract: A crystallization apparatus includes an illumination system which illuminates a phase-shift mask and an image-forming optical system arranged in an optical path between the phase-shift mask and a semiconductor film. The semiconductor film is irradiated with a light beam having a light intensity distribution of inverted peak patterns whose light intensity is the lowest in portions corresponding to phase shift sections to form a crystallized semiconductor film. The image-forming optical system is located to optically conjugate the phase-shift mask and the semiconductor film and has an aberration corresponding to the given wavelength range to form a light intensity distribution of inverted peak patterns with no swell of intensity in the middle portion.
    Type: Grant
    Filed: October 6, 2004
    Date of Patent: August 11, 2009
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Yukio Taniguchi, Masakiyo Matsumura, Hirotaka Yamaguchi, Mikihiko Nishitani, Susumu Tsujikawa, Yoshinobu Kimura, Masayuki Jyumonji
  • Patent number: 7540921
    Abstract: A phase modulation element according to the present invention has a first area having a first phase value based on a phase modulation unit having a predetermined size and a second area having a second phase value based on the phase modulation unit having the predetermined size, and each phase distribution is defined by a change in area shares of the first area and the second area depending on each position.
    Type: Grant
    Filed: March 3, 2004
    Date of Patent: June 2, 2009
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Masakiyo Matsumura, Yukio Taniguchi
  • Patent number: 7537657
    Abstract: A process for producing a single-crystal silicon wafer, comprises the following steps: producing a layer on the front surface of the silicon wafer by epitaxial deposition or production of a layer whose electrical resistance differs from the electrical resistance of the remainder of the silicon wafer on the front surface of the silicon wafer, or production of an external getter layer on the back surface of the silicon wafer, and heat treating the silicon wafer at a temperature which is selected to be such that an inequality (1) [ Oi ] < [ Oi ] eq ? ( T ) ? exp ? 2 ? ? SiO ? ? 2 ? ? rkT is satisfied, where [Oi] is an oxygen concentration in the silicon wafer, [Oi]eq(T) is a limit solubility of oxygen in silicon at a temperature T, ?SiO2 is the surface energy of silicon dioxide, ? is a volume of a precipitated oxygen atom, r is a mean COP and k the Boltzmann constant, with the silicon wafer, during the heat treatment, at least part of the time being exposed to an oxygen-con
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: May 26, 2009
    Assignee: Siltronic AG
    Inventors: Christoph Seuring, Robert Hoelzl, Reinhold Wahlich, Wilfried Von Ammon
  • Patent number: 7524374
    Abstract: Embodiments of the present invention are directed to an apparatus for generating a precursor for a semiconductor processing system (320). The apparatus includes a canister (300) having a sidewall (402), a top portion and a bottom portion. The canister (300) defines an interior volume (438) having an upper region (418) and a lower region (434). In one embodiment, the apparatus further includes a heater (430) partially surrounding the canister (300). The heater (430) creates a temperature gradient between the upper region (418) and the lower region (434). Also claimed is a method of forming a barrier layer from purified pentakis (dimethylamido) tantalum, for example a tantalum nitride barrier layer by atomic layer deposition.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: April 28, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Ling Chen, Vincent W. Ku, Hua Chung, Christophe Marcadal, Seshadri Ganguli, Jenny Lin, Dien-Yeh Wu, Alan Ouye, Mei Chang
  • Patent number: 7513949
    Abstract: An amorphous silicon film is formed on a flat glass substrate, and then crystallized by heating to obtain a crystalline silicon film. The glass substrate is placed on a stage having a convex U-shaped curved surface. The glass substrate is heated for a desired period of time at a temperature close to a strain point of the glass substrate, and then is cooled. Also, an amorphous silicon film formed on a glass substrate is crystallized into a crystalline silicon film by heating and then the glass substrate is mounted on a stage having a flat surface in such a manner that the lower surface of the glass substrate is in close contact with the flat surface of the stage by pressing the upper surface of the glass substrate. Then, a linear laser beam is irradiated on the crystalline silicon film in a scanning manner.
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: April 7, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Koichiro Tanaka
  • Patent number: 7470326
    Abstract: The apparatus for manufacturing a silicon single crystal includes: a crucible for storing molten silicon; a pulling-up device for pulling up a silicon single crystal from the molten silicon in the crucible to grow; a detecting device for detecting a position of the crucible in a vertical direction; and a control device for controlling a pulling rate for the silicon single crystal by the pulling-up device, based on the detected position of the crucible.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: December 30, 2008
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Youji Suzuki, Satoshi Sato
  • Patent number: 7462237
    Abstract: The present invention provides computer-implementable systems and methods for generating images of crystals. The systems each include (a) a light source; (b) a rotatable first polarizing material; (c) a rotatable second polarizing material; (d) a light-capturing device; and (e) a software program executable on the computer-implementable system for analyzing electrical signals from the light-capturing device.
    Type: Grant
    Filed: June 28, 2005
    Date of Patent: December 9, 2008
    Assignee: deCODE biostructures, Inc.
    Inventors: Peter Nollert-von Specht, Mark B. Mixon
  • Publication number: 20080295764
    Abstract: A control system and method for controlling temperatures while performing a MBE deposition process, wherein the control system comprises a MBE growth structure; a heater adapted to provide heat for the MBE deposition process on the MBE growth structure; and a control computer adapted to receive a plurality of dynamic feedback control signals derived from the MBE growth structure; switch among a plurality of control modes corresponding with the plurality of dynamic feedback control signals; and send an output power signal to the heater to control the heating for the MBE deposition process based on a combination of the plurality of control modes. In one embodiment, the plurality of dynamic feedback control signals comprises thermocouple signals and pyrometer signals.
    Type: Application
    Filed: May 30, 2007
    Publication date: December 4, 2008
    Inventor: Stefan P. Svensson
  • Patent number: 7445674
    Abstract: A first optical modulation element irradiates a non-single-crystal substance with a light beam which is to have a first light intensity distribution on the non-single crystal substance by modulating an intensity of an incident first light beam, thereby melting the substance. A second optical modulation element irradiates the substance with a light beam which is to have a second light intensity distribution on the substance by modulating an intensity of an incident second light beam, thereby melting the substance. An illumination system causes the light beam having the second light intensity distribution to enter the molten part of the substance in a period that the substance is partially molten by irradiation of the light beam having the first light intensity distribution.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: November 4, 2008
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Yukio Taniguchi, Masayuki Jyumonji, Hiroyuki Ogawa
  • Publication number: 20080264332
    Abstract: The current application deals with the doping and multi-chamber method and apparatus for the growth of material, directed toward Solid Phase Epitaxy (SPE) process. We will examine different variations and features of this method and process. The advantages of this method are the high throughput and the reduced operational cost of the production for semiconductor material and devices, such as III-V material (e.g. GaAs) and solar cell devices. It can be applied to many systems and devices/material.
    Type: Application
    Filed: April 25, 2007
    Publication date: October 30, 2008
    Inventor: Fareed Sepehry-Fard
  • Publication number: 20080257254
    Abstract: Techniques for the formation of a large grain, multi-crystalline semiconductor ingot and include forming a silicon melt in a crucible, the crucible capable of locally controlling thermal gradients within the silicon melt. The local control of thermal gradients preferentially forms silicon crystals in predetermined regions within the silicon melt by locally reducing temperatures is the predetermined regions. The method and system control the rate at which the silicon crystals form using local control of thermal gradients for inducing the silicon crystals to obtain preferentially maximal sizes and, thereby, reducing the number of grains for a given volume. The process continues the thermal gradient control and the rate control step to form a multicrystalline silicon ingot having reduced numbers of grains for a given volume of the silicon ingot.
    Type: Application
    Filed: April 17, 2007
    Publication date: October 23, 2008
    Inventors: Dieter Linke, Matthias Heuer, Fritz Kirscht, Jean Patrice Rakotoniana, Kamel Ounadjela
  • Patent number: 7431768
    Abstract: A crystallization system is provided comprising: a screen replicator configured to transfer screen solutions from wells of a screen storage plate into well regions of multiple crystallization plates; a trial generation station configured to generate crystallization trials in the trial zones of a crystallization plate; a transport mechanism configured to transport crystallization plates from the screen replicator to the trial generation station; and a controller having logic for causing the screen replicator to transfer the screen solutions from the screen storage plate to multiple crystallization plates, logic for causing the transport mechanism to transport the crystallization plates from the screen replicator to the trial generation station and logic for causing the trial generation station to generate crystallization trials in the crystallization plates.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: October 7, 2008
    Assignee: Takeda San Diego, Inc.
    Inventors: Laurent Martin, John W. Palan
  • Patent number: 7431764
    Abstract: The axial temperature gradient G at the vicinity of the solid-liquid interface 24 in an ingot is calculated in consideration of the heating value of a heater 18, the dimensions and physical property values of furnace inside components and the convection of the melt 12 before pulling up the single crystal ingot 15 by a puller 10 by use of a numerical simulation of synthetic heater transfers and a numerical simulation of melt convection. Then, the pulling velocity V of the single crystal ingot is determined from an value experienced of the ratio C=V/G of the pulling velocity V and the axial temperature gradient G of the single crystal ingot at which the single crystal ingot becomes defect-free, obtained when the single crystal ingot was pulled up by a same type puller as the puller in the past, and the axial temperature gradient G calculated by use of the simulations.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: October 7, 2008
    Assignee: Sumco Corporation
    Inventors: Senlin Fu, Naoki Ono
  • Publication number: 20080236477
    Abstract: A vapor phase growth apparatus and a vapor phase growth method improve the uniformity of film formed are provided. The vapor phase growth apparatus includes a chamber, a rotatable holder having a susceptor, an internal heater and an external heater which are arranged in the holder and heat the wafer from the bottom surface, an gas-pipe which is arranged to face the internal heater and sprays a cooling gas, and a temperature measuring unit which is arranged outside the chamber and measures the surface temperature of the wafer. In this manner, a position of a singular point of temperature which is an overheated portion generated on the wafer can be recognized. The singular point of temperature is locally cooled to make it possible to improve the uniformity of a temperature distribution in plane of the wafer.
    Type: Application
    Filed: March 24, 2008
    Publication date: October 2, 2008
    Inventors: Hideki ITO, Shinichi MITANI
  • Patent number: 7416708
    Abstract: Efficient measuring of protein solubility with the use of a precipitating agent as crystallization parameter; and production of a high-quality protein crystal with the use of a solubility curve obtained by the measuring. Protein crystal is disposed, and the surrounding thereof is filled with a protein solution. Not only is the concentration of precipitating agent in the protein solution increased but also the interference fringes of the protein solution around the crystal are observed, and in which of dissolution, growth and equilibrium the condition of crystal resides is judged from the interference fringes. The protein concentration of protein solution is simultaneously measured, and the solubility, of protein is determined from the observation results of interference fringes together with the measured protein concentration and precipitating agent concentration. Further, a solubility curve is prepared, and a protein crystal is produced through controlling of supersaturation condition.
    Type: Grant
    Filed: October 10, 2003
    Date of Patent: August 26, 2008
    Assignee: Nihon University
    Inventor: Katsuyoshi Nakazato
  • Patent number: 7413605
    Abstract: By pulling up an ingot in consideration of deformation of a crucible, generation of the defective ingot is prevented and a plurality of ingots having equivalent quality with the first ingot are pulled up in a multiple pull-up. Firstly, a deformation amount of a crucible for experiment (34) upon melting a silicon raw material and a history of supply power to a heater for experiment (38) are measured to calculate deformation tendency of a crucible for mass production (14). Next, the size of the crucible for mass production is measured, the silicon raw material of the amount equivalent to the amount supplied to the crucible for experiment is melted with a heater for mass production (18), and an initial crucible external position with a predetermined gap (X) is measured before initiating pull-up.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: August 19, 2008
    Assignee: Sumco Corporation
    Inventor: Jun Furukawa
  • Patent number: 7402207
    Abstract: Methods and systems for permitting thickness control of the selective epitaxial growth (SEG) layer in a semiconductor manufacturing process, for example raised source/drain applications in CMOS technologies, are presented. These methods and systems provide the capability to measure the thickness of an SEG film in-situ utilizing optical ellipsometry equipment during or after SEG layer growth, prior to removing the wafer from the SEG growth tool. Optical ellipsometry equipment can be integrated into the SEG platform and control software, thus providing automated process control (APC) capability for SEG thickness. The integration of the ellipsometry equipment may be varied, dependent upon the needs of the fabrication facility, e.g., integration to provide ellipsometer monitoring of a single process tool, or multiple tool monitoring, among other configurations.
    Type: Grant
    Filed: May 5, 2004
    Date of Patent: July 22, 2008
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Paul R. Besser, Eric N. Paton, William G. En
  • Publication number: 20080098953
    Abstract: Apparatus and method for growing and observing the growth of epitaxial layers on a wafer. The apparatus includes: epitaxial growth apparatus; a source of light mounted to illuminate an entire surface of the wafer in the apparatus during growth of the epitaxial layer on the entire surface of the wafer; and apparatus for observing scattering of the light from the entire surface of the wafer during growth of the epitaxial layer on the entire surface of the wafer. The method includes growing the epitaxial layer on a surface of the wafer and observing scattering of the light from the entire surface of the wafer during growth of the epitaxial layer on the entire surface of the wafer. The growing process is varied in accordance with the observation. With an epitaxial layer of gallium nitride (GaN) the entire surface of the wafer is observed for balls of gallium.
    Type: Application
    Filed: November 1, 2006
    Publication date: May 1, 2008
    Inventors: William E. Hoke, Theodore D. Kennedy
  • Patent number: 7344596
    Abstract: To reduce the heat input to the bottom of the crucible and to control heat extraction independently of heat input, a shield can be raised between a heating element and a crucible at a controlled speed as the crystal grows. Other steps could include moving the crucible, but this process can avoid having to move the crucible. A temperature gradient is produced by shielding only a portion of the heating element; for example, the bottom portion of a cylindrical element can be shielded to cause heat transfer to be less in the bottom of the crucible than at the top, thereby causing a stabilizing temperature gradient in the crucible.
    Type: Grant
    Filed: August 25, 2005
    Date of Patent: March 18, 2008
    Assignee: Crystal Systems, Inc.
    Inventors: Frederick Schmid, Chandra P. Khattak, David B. Joyce
  • Patent number: 7335261
    Abstract: Disclosed are apparatus for forming a semiconductor film having an excellent crystallinity from a non-single crystal semiconducting layer formed on a base layer made of an insulating material. The apparatus includes a light source, a homogenizer for homogenizing an intensity distribution of the emitted light, an amplitude-modulation means for performing the amplitude-modulation such that the amplitude of the light, of which the intensity distribution is homogenized, is increased in the direction of the relative motion of the light to the base layer, an optional light projection optical system for projecting the amplitude-modulated light onto the surface of the non-single crystal semiconductor such that a predetermined irradiation energy can be obtained, a phase shifter for providing a low temperature point in the surface irradiated by the light, and a substrate stage to move the light relative to the substrate thereby enabling scanning in the X and Y axis.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: February 26, 2008
    Assignee: Kabushiki Kaisha Ekisho Sentan Gijutsu Kaihatsu Center
    Inventors: Masakiyo Matsumura, Mikihiko Nishitani, Yoshinobu Kimura, Masayuki Jyumonji, Yukio Taniguchi, Masato Hiramatsu, Fumiki Nakano
  • Patent number: 7332032
    Abstract: Methods of forming a layer on a substrate using complexes of Formula I. The complexes and methods are particularly suitable for the preparation of semiconductor structures. The complexes are of the formula LyMYz (Formula I) wherein: M is a metal; each L group is independently a neutral ligand containing one or more Lewis-base donor atoms; each Y group is independently an anionic ligand; y=a nonzero integer; and z=a nonzero integer corresponding to the valence state of the metal.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: February 19, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Patent number: 7332029
    Abstract: A crystal forming apparatus and method for using the apparatus, the method including depositing a precipitant solution in a site, incubating the site, during which time volatile vapor evaporates from the precipitant solution and accumulates in the site, and pumping the accumulated volatile vapor away from the site. An exemplary apparatus includes a sealed site except for a vent on the sealed site. In one embodiment, the vent is a passive vent that inhibits vapor diffusion out of the site. In another embodiment, the vent is an active vent that opens in response to a pressure differential. The present invention accelerates and controls the crystal growth process by pumping volatile vapor away from the sealed site.
    Type: Grant
    Filed: August 10, 2004
    Date of Patent: February 19, 2008
    Assignee: Neuro Probe Incorporated
    Inventor: Richard H. Goodwin, Jr.
  • Patent number: 7326292
    Abstract: The inventive quality evaluation method for a single crystal ingot generally includes a step of determining cropping and sampling positions and a step of evaluating a sample. The step of determining cropping and sampling positions includes: (a) inputting basic information on the decision of cropping, sampling and prime positions according to equipments and products, (b) predetermining the cropping, sampling and prime positions according to the basic information, (c) monitoring a growing process of a growing ingot and analyzing/storing X factors related with the growing process of the growing ingot, and (d) determining the cropping and sampling positions based on the X factors related with the growing process.
    Type: Grant
    Filed: June 14, 2006
    Date of Patent: February 5, 2008
    Assignee: Siltron Inc.
    Inventors: Jin Geun Kim, Hyon Jong Cho
  • Patent number: 7318865
    Abstract: A manufacturing method of an electronic device includes positioning a processed substrate with respect to a substrate stage of a crystallization apparatus and supporting it with at least one positioning mark previously provided on the processed substrate being used as a references, applying a modulated light beam to a predetermined area of the processed substrate supported by the substrate stage and crystallizing the area, and forming at least one circuit element in the crystallized area of the processed substrate subjected to positioning with the positioning mark being used as a reference.
    Type: Grant
    Filed: December 8, 2004
    Date of Patent: January 15, 2008
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Noritaka Akita, Yoshio Takami
  • Patent number: 7318866
    Abstract: The present invention is directed to systems and methods for irradiating regions of a thin film sample(s) with laser beam pulses having different energy beam characteristics that are generated and delivered via different optical paths.
    Type: Grant
    Filed: January 9, 2004
    Date of Patent: January 15, 2008
    Assignee: The Trustees of Columbia University in the City of New York
    Inventor: James Im
  • Patent number: RE40871
    Abstract: The first object of the present invention is to provide a PDP with improved panel brightness which is achieved by improving the efficiency in conversion from discharge energy to visible rays. The second object of the present invention is to provide a PDP with improved panel life which is achieved by improving the protecting layer protecting the dielectrics glass layer. To achieve the first object, the present invention sets the amount of xenon in the discharge gas to the range of 10% by volume to less than 100% by volume, and sets the charging pressure for the discharge gas to the range of 500 to 760 Torr which is higher than conventional charging pressures. With such construction, the panel brightness increases. Also, to achieve the second object, the present invention has, on the surface of the dielectric glass layer, a protecting layer consisting of an alkaline earth oxide with (100)-face or (110)-face orientation.
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: August 18, 2009
    Assignee: Panasonic Corporation
    Inventors: Masaki Aoki, Hideo Torii, Eiji Fujii, Mitsuhiro Ohtani, Takashi Inami, Hiroyuki Kawamura, Hiroyoshi Tanaka, Ryuichi Murai, Yasuhisa Ishikura, Yutaka Nishimura, Katsuyoshi Yamashita