Sputter Etching Patents (Class 204/192.32)
  • Publication number: 20080093212
    Abstract: An apparatus and a method for operating the same. The method includes providing an apparatus which includes a chamber, wherein the chamber includes first and second inlets, an anode and a cathode structures in the chamber, and a wafer on the cathode structure. A cleaning gas is injected into the chamber via the first inlet. A collecting gas is injected into the chamber via the second inlet. The cleaning gas when ionized has a property of etching a top surface of the wafer resulting in a by-product mixture in the chamber. The collecting gas has a property of preventing the by-product mixture from depositing back to the surface of the wafer.
    Type: Application
    Filed: October 12, 2006
    Publication date: April 24, 2008
    Inventors: Edward Crandal Cooney, William Joseph Murphy, Anthony Kendall Stamper, David Craig Strippe
  • Publication number: 20080023320
    Abstract: A method for manufacturing a titanium separator to be used in a fuel cell. In this method, an oxide film (66) is removed from a surface (21) of a separator material (51) by sputtering. Then, separator material is heated within a range of 350°C.-500°C. in a nitriding atmosphere which includes a nitriding gas (55), and a plasma nitriding process is performed to form a titanium film (71) on the surface of the separator material.
    Type: Application
    Filed: May 10, 2005
    Publication date: January 31, 2008
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Koji Kobayashi, Yutaka Takeuchi, Masashi Takagaki, Toshiki Kawamura
  • Publication number: 20080014420
    Abstract: The present invention relates to a process for forming a novel coating on the surface of Titanium (Ti) or Ti-alloy substrates. The layered coating improves, among others, the overall hardness of the surface and leads to a surface that is shinier and more resistant to fingerprints than surfaces obtaining by treatment methods known from the prior art. The present invention also relates to a novel layer sequence for a coating formed on a substrate containing Ti. In one embodiment, the coating includes a transition layer, a hardness layer and a coloring layer.
    Type: Application
    Filed: July 11, 2006
    Publication date: January 17, 2008
    Inventor: Shui Woo Chan
  • Patent number: 7316764
    Abstract: A system and method for performing sputter etching includes an ion source that generates an ion current that is directed at a substrate and an electron source that generates an electron current directed at the substrate. Biasing circuitry biases the substrate with an a-symmetric bi-polar DC voltage pulse signal. The biasing circuitry is formed from a positive voltage source with respect to ground, a negative voltage source with respect to ground and a high frequency switch. At least one current sensor, coupled to the biasing circuitry, monitors a positive current and a negative current from the substrate during one or more cycles of the a-symmetric bi-polar DC voltage pulse signal. A control system, coupled to the at least one current sensor, varies the ion current independently from the electron current. The ion and electron sources create a continuous plasma that is proximate the substrate and the biasing circuitry causes the substrate to alternatively attract ions and electrons from the plasma.
    Type: Grant
    Filed: March 29, 2004
    Date of Patent: January 8, 2008
    Assignee: 4 Wave, Inc.
    Inventors: David Alan Baldwin, Todd Lanier Hylton
  • Patent number: 7313854
    Abstract: A method of manufacturing a tactile sensor, which is capable of implementing a wide range of senses, including sensing contact pressure (vertical force and horizontal force) with an external object and heat caused by the contact pressure, comprises forming a side block formation pattern of a force sensor and forming a piezo-resistor formation pattern of a heat sensor; forming a piezo-resistor and depositing an oxide film on the piezo-resistor; forming contact holes and forming a line hole formation pattern; forming a metal line, a temperature measurement metal line, and a heater; depositing an oxide film on the metal line, the temperature measurement metal line, and the heater, and forming a load block on the oxide film; and forming a side block by etching a bottom surface of the wafer on which the load block is formed.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: January 1, 2008
    Assignee: Korea Research Institute of Standards and Science
    Inventors: Jong-ho Kim, Dae-im Kang, Yon-kyu Park, Min-seok Kim
  • Patent number: 7300684
    Abstract: The coating of internal surfaces of a workpiece is achieved by connecting a bias voltage such that the workpiece functions as a cathode and by connecting an anode at each opening of the workpiece. A source gas is introduced at an entrance opening, while a vacuum source is connected at an exit opening. Pressure within the workpiece is monitored and the resulting pressure information is used for maintaining a condition that exhibits the hollow cathode effect. Optionally, a pre-cleaning may be provided by introducing a hydrocarbon mixture and applying a negative bias to the workpiece, so as to sputter contaminants from the workpiece using argon gas. Argon gas may also be introduced during the coating processing to re-sputter the coating, thereby improving uniformity along the length of the workpiece. The coating may be a diamond-like carbon material having properties which are determined by controlling ion bombardment energy.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: November 27, 2007
    Assignee: Sub-One Technology, Inc.
    Inventors: William John Boardman, Andrew William Tudhope, Raul Donate Mercado
  • Patent number: 7270729
    Abstract: First and second electrodes and magnets between the electrodes define an enclosure. The first electrode is biased at a high voltage to produce a high intensity electrical field. The second electrode is biased at a low negative voltage by a low alternating voltage to produce a low intensity electrical field. Electrons movable in a helical path in the enclosure near the first electrode ionize inert gas molecules in the enclosure. A wafer having a floating potential and an insulating layer is closely spaced from the second electrode. The second electrode and the wafer define plates of a first capacitor having a high impedance. The wafer and the inert gas ions in the enclosure define opposite plates of a second capacitor. The first capacitor accordingly controls and limits the speed at which the gas ions move to the insulating layer surface to etch this surface. The resultant etch, only a relatively few angstroms, of the insulating layer is smooth, uniform and accurate.
    Type: Grant
    Filed: August 4, 2003
    Date of Patent: September 18, 2007
    Assignee: Tegal Corporation
    Inventor: Pavel N. Laptev
  • Patent number: 7259372
    Abstract: A processing method uses a probe of a scanning probe microscope. A fine marker is formed in a processing material by thrusting the probe, which is made of a material harder than the processing material, into a portion of the processing material disposed in the vicinity of an area of the processing material to be processed by the probe during a processing operation. A position of the fine marker on the processing material is detected during the processing operation. A drift amount of the area of the processing material is calculated in accordance with the detected position of the fine marker. A position of the area of the processing material is corrected in accordance with the calculated drift amount.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: August 21, 2007
    Assignee: SII NanoTechnology Inc.
    Inventors: Osamu Takaoka, Masatoshi Yasutake, Shigeru Wakiyama, Naoya Watanabe
  • Patent number: 7241397
    Abstract: An optical window deposition shield including a backing plate having a through hole, and a honeycomb structure having a plurality of adjacent cells configured to allow optical viewing through the honeycomb structure. Each cell of the honeycomb structure has an aspect ratio of length to diameter sufficient to impede a processing plasma from traveling through the full length of the cell. A coupling device configured to couple the honeycomb core structure to the backing plate such that the honeycomb structure is aligned with at least a portion of the through hole in the backing plate. The optical window deposition shield shields the optical viewing window of a plasma processing apparatus from contact with the plasma.
    Type: Grant
    Filed: March 30, 2004
    Date of Patent: July 10, 2007
    Assignee: Tokyo Electron Limited
    Inventors: Steven T. Fink, Andrej S. Mitrovic, Paula A. Calabrese
  • Patent number: 7238294
    Abstract: The invention refers to a procedure for etching of materials at the surface by focussed electron beam induced chemical reactions at said surface. The invention is characterized in that in a vacuum atmosphere the material which is to be etched is irradiated with at least one beam of molecules, at least one beam of photons and at least one beam of electrons, whereby the irradiated material and the molecules of the beam of molecules are excited in a way that a chemical reaction predetermined by said material and said molecules composition takes place and forms a reaction product and said reaction product is removed from the material surface-irradiation and removal step.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: July 3, 2007
    Assignees: NaWoTec GmbH, University of Maryland
    Inventors: Hans Wilfried Peter Koops, Klaus Edinger
  • Patent number: 7213322
    Abstract: A piezoelectric substrate is provided with interdigital transducer electrodes including a first electrode layer, a second electrode layer, and a third electrode layer that is principally made of aluminum. The piezoelectric substrate has a stepped structure on the surface of the piezoelectric substrate, the stepped structure including terraces each having a width of about 50 nm or less and steps each having a width of a mono-molecular layer (e.g., about 14 ?).
    Type: Grant
    Filed: March 3, 2004
    Date of Patent: May 8, 2007
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Osamu Nakagawara, Akinori Shinoda
  • Patent number: 7166233
    Abstract: In a method for performing a plasma-assisted treatment on a substrate in a reactor chamber by: introducing at least one process gas into the reactor chamber; and creating a plasma within the reactor chamber by establishing an RF electromagnetic field within the chamber and allowing the field to interact with the process gas, the electromagnetic field is controlled to have an energy level which varies cyclically between at least two values each sufficient to maintain the plasma, such that each energy level value is associated with performance of a respectively different treatment process on the substrate.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: January 23, 2007
    Assignee: Tokyo Electron Limited
    Inventors: Wayne L. Johnson, Eric J. Strang
  • Patent number: 7159302
    Abstract: A method for manufacturing a write head having a small write pole tip that emits magnetic flux sufficient for effective perpendicular recording. The method creates a leading edge taper (LET) between the write pole tip and a magnetic flux guide to create a sufficient magnetic flux in the write pole. The LET is fabricated by ion milling away a sacrificial striated material whose layers have different rates of ion milling. The top layer of material thus mills away faster than lower layers, creating the required tapering of a negative mold. An endpoint material stops the milling. The LET magnetic material is then spattered into the negative mold, resulting in a well defined taper of magnetic flux shaping material extending the magnetic flux guide to the write pole tip, such that the write pole tip is able to emit sufficient magnetic flux for perpendicular recording.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: January 9, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Michael Feldbaum, Quang Le
  • Patent number: 7152305
    Abstract: A magnetoresistive (MR) read head is disclosed including a shield layer with a recessed portion and a protruding portion defined by the recessed portion. Also included is an MR sensor located in vertical alignment with the protruding portion of the shield layer. Further provided is at least one gap layer situated above and below the MR sensor. At least one of such gap layers is positioned in the recessed portion of the shield layer. By this design, a combined thickness of the gap layers is thinner adjacent to the MR sensor and the protruding portion of the shield layer, while being thicker adjacent to the recessed portion of the shield layer. As such, optimum insulation is provided while maintaining planar gap layer surfaces to avoid the detrimental ramifications of reflective notching and the swing curve effect.
    Type: Grant
    Filed: June 19, 2003
    Date of Patent: December 26, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventor: Douglas Werner
  • Patent number: 7118657
    Abstract: For controlling a physical dimension of a solid state structural feature, a solid state structure is provided, having a surface and having a structural feature. The structure is exposed to a first periodic flux of ions having a first exposure duty cycle characterized by a first ion exposure duration and a first nonexposure duration for the first duty cycle, and then at a second periodic flux of ions having a second exposure duty cycle characterized by a second ion exposure duration and a second nonexposure duration that is greater than the first nonexposure duration, for the second duty cycle, to cause transport, within the structure including the structure surface, of material of the structure to the structural feature in response to the ion flux exposure to change at least one physical dimension of the feature substantially by locally adding material of the structure to the feature.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: October 10, 2006
    Assignee: President and Fellows of Harvard College
    Inventors: Jene A. Golovchenko, Derek M. Stein, Jiali Li
  • Patent number: 7112286
    Abstract: A thin film resistor structure and a method of fabricating a thin film resistor structure is provided. The thin film resistor structure includes an electrical interface layer or head layer that is a combination of a Titanium (Ti) layer and a Titanium Nitride (TiN) layer. The combination of the Ti layer and the TiN layer mitigates resistance associated with the electrical interface layers.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: September 26, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Brian Vialpando, Eric William Beach, Philipp Steinmann
  • Patent number: 7097745
    Abstract: A method of forming a tunneling magnetoresistive head begins by forming a tunneling magnetoresistive stack having a tunnel barrier. An air bearing surface is formed of the tunneling magnetoresistive stack. The air bearing surface is ion etched causing a deficiency of a constituent in a portion of the tunnel barrier adjacent the air bearing surface. The deficiency of the constituent is replenished in the portion of the tunnel barrier adjacent the air bearing surface to restore the electrical properties of the tunnel barrier.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: August 29, 2006
    Assignee: Seagate Technology, LLC
    Inventors: Joel William Hoehn, Cyril Peter DeVries, Kristin Joy Duxstad, Harry Sam Edelman
  • Patent number: 7007374
    Abstract: A narrow track width read sensor having a high magnetoresistive sensitivity is made using a self-aligned process which requires the use of only a single resist mask. A plurality of sensor layers is deposited over a substrate. After forming a resist mask in the central region, first lead layers are deposited in the end regions and over the resist mask. Using the resist mask, ion milling is performed such that the first lead layers and sensor layers in the end regions are substantially removed but sensor layers in the central region remain, to thereby form a read sensor having lead overlays on the edges thereof. Hard bias and second lead layers are then deposited in the end regions and over the resist mask. After the resist mask is removed, the top of the read sensor may be oxidized through an exposure to oxygen plasma.
    Type: Grant
    Filed: August 9, 2002
    Date of Patent: March 7, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventor: Jeffrey Scott Lille
  • Patent number: 6953519
    Abstract: In order to establish processing techniques capable of making multi-tip probes with sub-micron intervals and provide such microscopic multi-tip probes, there is provided an outermost surface analysis apparatus for semiconductor devices etc. provided with a function for enabling positioning to be performed in such a manner that there is no influence on measurement in electrical measurements at an extremely small region using this microscopic multi-tip probe, and there are provided the steps of making a cantilever 1 formed with a plurality of electrodes 3 using lithographic techniques, and forming microscopic electrodes 6 minute in pitch by sputtering or gas-assisted etching a distal end of the cantilever 1 using a focused charged particle beam or using CVD.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: October 11, 2005
    Assignee: SII NanoTechnology Inc.
    Inventors: Yoshiharu Shirakawabe, Hiroshi Takahashi, Tadashi Arai
  • Patent number: 6942764
    Abstract: Contamination due to deposited particulate matter has been greatly reduced in single wafer sputter-etchers by coating the full interior of the sputtering shield with a layer of an arc-sprayed material such as aluminum, said layer being possessed of a high degree of surface roughness. The method for forming the coating of arc-sprayed aluminum is described and data comparing particulate contaminant count and product yield before and after the adoption of the present invention, are presented.
    Type: Grant
    Filed: August 24, 1995
    Date of Patent: September 13, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Kun Lin, Chin-Shien Yang, Chuan-Huai Chen
  • Patent number: 6929721
    Abstract: Method and apparatus for reducing the curvature of a micromachined structure having lamella (12). Surface treatment by an ion beam (30) of the lamella (12) such as by sputtering removes regions of stress allowing the lamella (12) to return to a planar condition. The resulting outer surface is made suitable for use as a reflector and other purposes needing a substantially planar surface.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: August 16, 2005
    Assignee: The Trustees of Boston University
    Inventor: Thomas G. Bifano
  • Patent number: 6923891
    Abstract: A method for forming a conductive region on a first portion of a substrate, the method being constituted by exposing the first portion to a filtered beam of substantially fully ionised metallic ions under a pulsed, modulated electrical bias. The method uses FCVA (Filtered Cathodic Vacuum Arc) techniques to generate the filtered ion beam and permits the formation of a conformal metal coating, even in high aspect ratio visa and trenches. The method also permits the in-filling of vias and trenches to form conductive interconnects. Particular examples concern the deposition of copper ions. An adapted FCVA apparatus deposits metals on substrates. A control apparatus controls ion beams impacting upon substrates, the control apparatus being suitable for incorporation within existing filtered ion beam sources.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: August 2, 2005
    Assignee: Nanofilm Technologies International Pte Ltd.
    Inventors: Li Kang Cheah, Xu Shi, Lang Hu
  • Patent number: 6899918
    Abstract: A method for manufacturing an electrode for a lithium secondary battery includes a step of forming an oxide film other than a natural oxide film on a current collector by oxidizing the surface of the current collector, and a step of forming an active material layer on the oxide film by a method to provide a material for the active material layer by emitting in the vapor phase, such as PVD (physical vapor deposition) including sputtering, vapor evaporation, and the like, and CVD (chemical vapor deposition) including plasma CVD.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: May 31, 2005
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hiromasa Yagi, Hisaki Tarui
  • Patent number: 6896973
    Abstract: A recording medium manufacturing method has a surface treatment process which removes contamination from a surface of a thermoplastic resin support substrate and also improves its wettability. This surface treatment process is conducted prior to forming the layer structure, which includes at least a signal recording layer, onto the surface of the thermoplastic resin support substance. The support substance is placed in an active gas atmosphere, such as ozone, followed by an inert gas atmosphere, such as nitrogen. This surface treatment process generates little deterioration in the support substrate surface.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: May 24, 2005
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Yoshinobu Sugata
  • Patent number: 6896775
    Abstract: Magnetically enhanced plasma processing methods and apparatus are described. A magnetically enhanced plasma processing apparatus according to the present invention includes an anode and a cathode that is positioned adjacent to the anode. An ionization source generates a weakly-ionized plasma proximate to the cathode. A magnet is positioned to generate a magnetic field proximate to the weakly-ionized plasma. The magnetic field substantially traps electrons in the weakly-ionized plasma proximate to the cathode. A power supply produces an electric field in a gap between the anode and the cathode. The electric field generates excited atoms in the weakly-ionized plasma and generates secondary electrons from the cathode. The secondary electrons ionize the excited atoms, thereby creating a strongly-ionized plasma.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: May 24, 2005
    Assignee: Zond, Inc.
    Inventor: Roman Chistyakov
  • Patent number: 6868856
    Abstract: Methods and apparatus for cleaning semiconductor processing equipment. The apparatus include both local and remote gas dissociators coupled to a semiconductor processing chamber to be cleaned. The methods include introducing a precursor gas into the remote dissociator where the gas is dissociated and introducing a portion of the dissociated gas into the chamber. Another portion of the dissociated gas which re-associates before introduction into the chamber is also introduced into the chamber where it is again dissociated. The dissociated gas combines with contaminants in the chamber and is exhausted from the chamber along with the contaminants.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: March 22, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Thomas Nowak, Ian Latchford, Tsutomu Tanaka, Bok Heon Kim, Ping Xu, Jason Foster, Heath B. DeShong, Martin Seamons
  • Patent number: 6852203
    Abstract: A three-dimensional periodical structure whose period is about 1 ?m or smaller is provided. At least two kinds of films which have two-dimensionally substantially periodical projections are successively formed in layers substantially periodical to construct structure which is substantially three-dimensionally periodical. For instance, the films are made of materials different in refractive index. The three-dimensional periodical structure whose period is about 1 ?m or smaller can be obtained by a simple fabricating method. By this structure, the propagation of a wave with a specific wavelength in many solid angular directions including several axial directions parallel to the plane and the thickness direction of the layers can be cut off.
    Type: Grant
    Filed: March 24, 1998
    Date of Patent: February 8, 2005
    Assignee: Autocloning Technology, LTD
    Inventors: Shojiro Kawakami, Hiroyuki Sakaki, Kazuo Shiraishi
  • Patent number: 6821624
    Abstract: For machine parts, cutting tools and molds used under extremely high contact pressures, an amorphous carbon film is provided which has a sufficient adhesion to a substrate. The amorphous carbon covered member has an interlayer comprising at least one element selected from the group consisting of elements in the IVa, Va, VIa and IIIb groups and the IVb group except carbon in the periodic table, or a carbide of at least one element selected from the group, and an amorphous carbon film formed on the interlayer. The interlayer has a thickness of 0.5 nm or over and less than 10 nm.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: November 23, 2004
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yoshiharu Utsumi, Kazuhiko Oda
  • Publication number: 20040229386
    Abstract: A method for controlling a gap in an electrically conducting solid state structure provided with a gap. The structure is exposed to a fabrication process environment conditions of which are selected to alter an extent of the gap. During exposure of the structure to the process environment, a voltage bias is applied across the gap. Electron tunneling current across the gap is measured during the process environment exposure and the process environment is controlled during process environment exposure based on tunneling current measurement. A method for controlling the gap between electrically conducting electrodes provided on a support structure. Each electrode has an electrode tip separated from other electrode tips by a gap. The electrodes are exposed to a flux of ions causing transport of material of the electrodes to corresponding electrode tips, locally adding material of the electrodes to electrode tips in the gap.
    Type: Application
    Filed: January 29, 2004
    Publication date: November 18, 2004
    Applicant: President and Fellows of Harvard College
    Inventors: Jene A. Golovchenko, Gregor M. Schurmann, Gavin M. King, Daniel Branton
  • Patent number: 6810566
    Abstract: A method of manufacturing a surface acoustic wave element includes the steps of providing a piezoelectric body having an interdigital transducer, where the interdigital transducer is made of a metal having a higher density than the piezoelectric body, and performing ion bombardment of the interdigital transducer and the piezoelectric body simultaneously so as to reduce the thickness of the interdigital transducer and the piezoelectric body.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: November 2, 2004
    Assignee: Murata Manufacturing Co., Ltd
    Inventors: Eiichi Takata, Yasuji Yamamoto, Toshimaro Yoneda, Michio Kadota
  • Patent number: 6802944
    Abstract: A method of depositing a film on a substrate. In one embodiment, the method includes depositing a first portion of the film using a high density plasma to partially fill a gap formed between adjacent features formed on the substrate. The film deposition process is then stopped before or shortly after the entry of the gap pinches off and the film is etched to widen entry to the gap using a two step etching process that includes a first physical etch step that forms a plasma from a sputtering agent introduced into the processing chamber and biases the plasma towards the substrate and a subsequent chemical etch step that forms a plasma from a reactive etchant gas introduced into the processing chamber. After the etching sequence is complete, a second portion of the film is deposited over the first portion using a high density plasma to further fill the gap.
    Type: Grant
    Filed: October 23, 2002
    Date of Patent: October 12, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Farhan Ahmad, Michael Awdshiew, Alok Jain, Bikram Kapoor
  • Publication number: 20040188243
    Abstract: An apparatus for masked ion-beam lithography comprises a mask maintenance module for prolongation of the lifetime of the stencil mask. The module comprises a deposition means for depositing material to the side of the mask irradiated by the lithography beam, with at least one deposition source being positioned in front of the mask, and further comprises a sputter means in which at least one sputter source, positioned in front of the mask holder means and outside the path of the lithography beam, produces a sputter ion beam directed to the mask in order to sputter off material from said mask in a scanning procedure and compensate for inhomogeneity of deposition.
    Type: Application
    Filed: March 24, 2003
    Publication date: September 30, 2004
    Inventors: Elmar Platzgummer, Hans Loschner, Gerhard Stengl
  • Patent number: 6789297
    Abstract: A method of manufacturing a surface acoustic wave element includes the steps of providing a piezoelectric body having an interdigital transducer, where the interdigital transducer is made of a metal having a higher density than the piezoelectric body, and performing ion bombardment of the interdigital transducer and the piezoelectric body simultaneously so as to reduce the thickness of the interdigital transducer and the piezoelectric body.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: September 14, 2004
    Assignee: Murata Manufacturing Co., Ltd
    Inventors: Eiichi Takata, Yasuji Yamamoto, Toshimaro Yoneda, Michio Kadota
  • Publication number: 20040175511
    Abstract: A coater having a substrate cleaning device is disclosed. Also disclosed are methods of processing substrates in a coater equipped with a substrate cleaning device. The substrate cleaning device comprises an ion gun (i.e., an ion source) that is positioned beneath a path of substrate travel (e.g., beneath a substrate support) extending through the coater and that is adapted for treating a bottom major surface of a substrate. Certain embodiments involve an upward coating apparatus that is further along the path of substrate travel than the substrate cleaning device. In some embodiments of this nature, the upward coating apparatus is configured for depositing a photocatalytic coating upwardly onto the bottom major surface of the substrate. Certain embodiments of the invention involve a downward coating apparatus, wherein the substrate cleaning device is further along the path of substrate travel than the downward coating apparatus.
    Type: Application
    Filed: December 31, 2003
    Publication date: September 9, 2004
    Inventor: Klaus Hartig
  • Patent number: 6783643
    Abstract: A solid state structure having a surface is provided and exposed to a flux, F, of incident ions under conditions that are selected based on: ∂ ∂ t ⁢ C ⁡ ( r , t ) = F ⁢   ⁢ Y 1 + D ⁢ ∇ 2 ⁢ C - C τ trap - F ⁢   ⁢ C ⁢   ⁢ &sigm
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: August 31, 2004
    Assignee: President and Fellows of Harvard College
    Inventors: Jene A. Golovchenko, Daniel Branton, Michael J. Aziz, Jiali Li, Derek M. Stein, Ciaran J. McMullan
  • Publication number: 20040157134
    Abstract: Mask shops typically use carbon to repair any clear defects identified on a mask, irrespective of the type of mask. However, carbon can have different characteristics than the original patterning material on the mask. Therefore, a mask that is repaired using carbon may not optically perform as if it were defect-free. An automated method of repairing a clear defect on an attenuated phase shifting mask (PSM) provides an optimized plug size/shape. In this method, a repair solution to the clear defect can be simulated, thereby allowing the repair decision for an attenuated PSM to be advantageously made at the same time that inspection is done and before actual repair. Simulation can include performing model-based OPC on the repair solution.
    Type: Application
    Filed: February 11, 2003
    Publication date: August 12, 2004
    Applicant: Numerical Technologies, Inc.
    Inventors: Juhwan Kim, Keun-Young Kim
  • Publication number: 20040146661
    Abstract: A method of depositing a silicon oxide layer over a substrate having a trench formed between adjacent raised surfaces. In one embodiment the silicon oxide layer is formed in a multistep process that includes depositing a first portion of layer over the substrate and within the trench by forming a high density plasma process that has simultaneous deposition and sputtering components from a first process gas comprising a silicon source, an oxygen source and helium and/or molecular hydrogen with high D/S ratio, for example, 10-20 and, thereafter, depositing a second portion of the silicon oxide layer over the substrate and within the trench by forming a high density plasma process that has simultaneous deposition and sputtering components from a second process gas comprising a silicon source, an oxygen source and molecular hydrogen with a lower D/S ratio of, for example, 3-10.
    Type: Application
    Filed: January 23, 2003
    Publication date: July 29, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Bikram Kapoor, Ziaul Karim, Anchuan Fremont
  • Patent number: 6753538
    Abstract: A method and apparatus for electron beam processing using an electron beam activated gas to etch or deposit material. The invention is particularly suitable for repairing defects in lithography masks. By using an electron beam in place of an ion beam, the many problems associated with ion beam mask repair, such as staining and riverbedding, are eliminated. Endpoint detection is not critical because the electron beam and gas will not etch the substrate. In one embodiment, xenon difluoride gas is activated by the electron beam to etch a tungsten, tantalum nitride, or molybdenum silicide film on a transmission or reflection mask. To prevent spontaneous etching by the etchant gas in processed sites at which the passivation layer was removed, processed sites can be re-passivated before processing additional sites.
    Type: Grant
    Filed: July 27, 2002
    Date of Patent: June 22, 2004
    Assignee: FEI Company
    Inventors: Christian R. Musil, J. David Casey, Jr., Thomas J. Gannon, Clive Chandler, Xiadong Da
  • Patent number: 6746727
    Abstract: A method is described involving depositing a dielectric layer. The surface of the dielectric layer is modified to prevent outdiffusion from the dielectric layer. A metal layer is deposited above the modified surface of the dielectric layer.
    Type: Grant
    Filed: August 24, 1998
    Date of Patent: June 8, 2004
    Assignee: Intel Corporation
    Inventors: Jick Yu, Chi Hing Choi
  • Patent number: 6746540
    Abstract: A plate assembly on which a wafer is supported in the processing chamber of a processing apparatus facilitates a precise transfer of the wafer therefrom even when a vacuum atmosphere is present in the chamber. The plate assembly includes an underlying support plate and a pad dedicated to support the rear surface of the wafer. A plurality of recesses, in the form of parallel grooves, extend in the upper surface of the pad so that the rear surface of the wafer can also be exposed to the vacuum atmosphere in the processing chamber. Accordingly, a pressure difference at both sides of the wafer is minimized. Thus, the wafer can be raised off of the plate assembly while the precise position thereof is maintained.
    Type: Grant
    Filed: March 5, 2002
    Date of Patent: June 8, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Gye-Tak Ahn
  • Patent number: 6740207
    Abstract: Sparking is suppressed during high-frequency sputtering by a high-frequency generator (5) which has a controlled switching unit (13) that is connected upstream in relation to the output of the generator. A high-frequency supply signal that is generated at the output of the high-frequency generator is stopped for plasma discharge (PL) for a short time, by the switching unit.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: May 25, 2004
    Assignee: Unaxis Deutschland GmbH
    Inventors: Andreas Kloeppel, Christoph Daube, Johannes Stollenwerk, Thomas Linz
  • Patent number: 6730605
    Abstract: A method to redistribute solid copper deposited by PVD on a wafer topography. The deposited copper is solubilized in a fluid for redistribution. The copper redistribution prevents inherent nonuniformity of the deposited copper film thickness by improving the uniformity of thickness of the copper film on the covered surfaces, such as vertical and bottom surfaces. The method provides the advantages of good adhesion and good grain growth and orientation that are achieved with copper deposited by PVD, and also provides the good step coverage as achieved with copper deposited by CVD.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: May 4, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Chantal Arena-Foster, Robert F. Foster, Joseph T. Hillman, Thomas J. Licata, Tugrul Yasar
  • Publication number: 20040079632
    Abstract: A method of depositing a film on a substrate disposed in a substrate processing chamber. In one embodiment the method includes depositing a first portion of the film to at partially fill a gap formed between to adjacent features formed on the substrate. The first portion of film is deposited using a high density plasma formed from a first gaseous mixture flown into the process chamber. The film deposition process is then stopped before or shortly after the entry of the gap pinches off and the film is etched to widen entry to the gap using a two step etching process that includes a first physical etch step and a subsequent chemical etch step. The physical etch step sputter etches the first portion of film by forming a plasma from a sputtering agent introduced into the processing chamber and biasing the plasma towards the substrate. After the physical etching step, the film is chemically etched by forming a plasma from a reactive etchant gas introduced into the processing chamber.
    Type: Application
    Filed: October 23, 2002
    Publication date: April 29, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Farhan Ahmad, Michael Awdshiew, Alok Jain, Bikram Kapoor
  • Publication number: 20040079728
    Abstract: A film is deposited on a substrate disposed in a substrate processing chamber. The substrate has a trench formed between adjacent raised surfaces. A first portion of the film is deposited over the substrate from a first gaseous mixture flowed into the process chamber by chemical-vapor deposition. Thereafter, the first portion is etched by flowing an etchant gas having a halogen precursor, a hydrogen precursor, and an oxygen precursor into the process chamber. Thereafter, a second portion of the film is deposited over the substrate from a second gaseous mixture flowed into the processing chamber by chemical-vapor deposition.
    Type: Application
    Filed: September 12, 2003
    Publication date: April 29, 2004
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Hemant P. Mungekar, Anjana M. Patel, Manoj Vellaikal, Anchuan Wang, Bikram Kapoor
  • Patent number: 6723213
    Abstract: A titanium target assembly includes a titanium sputtering target, a copper or copper alloy backing plate and serving as a support member for the target and a silver or silver alloy coating film and formed between the target and backing plate. The coating film is formed on a surface subjected to cleaning treatment on the bonding side or sides of the target and backing plate by physical vapor deposition. The titanium target and backing plate are solid phase diffusion bonded. The face(s) serve as the bonding plane. The assembly can be manufactured by cleaning the surface(s) of the target and/or backing plate on bonding side(s), forming a coating film on the cleaned surface(s) on bonding side(s) and solid phase diffusion-bonding the target and backing plate, while using surface(s) provided with coated film as the bonding plane. The target assembly possesses high bonding strength and excellent bonding stability and reliability.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: April 20, 2004
    Assignee: Vacuum Metallurgical Co., Ltd.
    Inventors: Yasuo Nakadai, Poong Kim, Weiping Chai, Masahiro Kodera
  • Patent number: 6719885
    Abstract: A method of reducing stress induced defects in a substrate according to an HDP-CVD process including providing a substrate for depositing a layer of material according to an HDP-CVD process; igniting a plasma for carrying out an HDP-CVD process; adjusting plasma operating parameters to achieve a first deposition-sputter ratio with respect to the substrate; depositing a first portion of the layer of material according to a first range of substrate temperatures; and, depositing at least a second portion of the layer of material according to at least a second range of substrate temperatures.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: April 13, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co. Ltd.
    Inventors: Chun-Sheng Lin, Jui-Hei Huang, Chi-Sheng Lo, Long-Siang Chuang
  • Patent number: 6709553
    Abstract: A method and apparatus for depositing a film on a substrate comprising a deposition interval wherein DC power is applied to a target to form a first plasma and material is sputtered from the target onto a substrate and, during a subsequent forming interval, high frequency power is applied to the target to remove material from at least a portion of the substrate. The sputtering working gas admitted to the chamber may be maintained at a first pressure during the deposition interval and the pressure of the sputtering working gas may be increased to a second pressure during the forming interval.
    Type: Grant
    Filed: May 9, 2002
    Date of Patent: March 23, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Wei Wang, Praburam Gopalraja, Jianming Fu
  • Patent number: 6696107
    Abstract: The present invention relates to a method for producing an ordered array of nanoparticles on a substrate surface and to a nanomaterial having such an ordered array of nanoparticles. Particularly, but not exclusively, the invention relates to the provision of an ordered array of magnetic nanocrystals on a substrate surface. Although the present invention is not limited to the production of a magnetic array, one important object of the present invention is the production of a material suitable for use as an ultra high density magnetic data storage medium. According to the present invention there is provided a method of producing a structure comprising a plurality of nanoparticles distributed across a surface of a substrate in a predetermined array, the method comprising the steps of: i) providing a substrate which has a passivated surface; ii) depositing nanoparticles on to said surface; and iii) displacing said particles over said surface to configure them in said predetermined array.
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: February 24, 2004
    Assignee: Council for the Central Laboratory of the Research Councils
    Inventor: Derek A. Eastham
  • Patent number: 6695954
    Abstract: A method and apparatus for depositing a layer of a material which contains a metal on a workpiece surface, in an installation including a deposition chamber; a workpiece support providing a workpiece support surface within the chamber; a coil within the chamber, the coil containing the metal that will be contained in the layer to be deposited; and an RF power supply connected to deliver RF power to the coil in order to generate a plasma within the chamber, a DC self bias potential being induced in the coil when only RF power is delivered to the coil. A DC bias potential which is different in magnitude from the DC self bias potential is applied to the coil from a DC voltage source.
    Type: Grant
    Filed: October 11, 2001
    Date of Patent: February 24, 2004
    Assignee: Applied Materials, Inc.
    Inventor: Liubo Hong
  • Patent number: H2209
    Abstract: A large area metallization pretreatment and surface activation system that uses an electron beam-produced plasma capable of delivering substantial ion and radical fluxes at low temperatures over large areas of an organic plastic or polymer material. The ion and radical fluxes physically and chemically alter the surface structure of the organic plastic or polymer material thereby improving the ability of a film to adhere to the material.
    Type: Grant
    Filed: April 14, 2004
    Date of Patent: February 5, 2008
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Darrin Leonhardt, Scott G. Walton, Robert A. Meger, Christopher Muratore