Metal Is Elemental Copper, An Alloy, Or Compound Thereof Patents (Class 216/105)
  • Publication number: 20030010751
    Abstract: An extrusion-free wet cleaning process for post-etch Cu-dual damascene structures is developed. The process includes the following steps: (1). providing a wafer having a silicon substrate and at least one post-etch Cu-dual damascene structure, the post-etch Cu-dual damascene structure having a via structure exposing a portion of a Cu wiring line electrically connected with an N+ diffusion region of the silicon substrate, and a trench structure formed on the via structure; (2). applying a diluted H2O2 solution on the wafer to slightly oxidize the surface of the exposed Cu wiring line; (3). washing away cupric oxide generated in the oxidation step by means of an acidic cupric oxide cleaning solution containing diluted HF, NH4F or NH2OH; and (4). providing means for preventing Cu reduction reactions on the Cu wiring line.
    Type: Application
    Filed: July 16, 2001
    Publication date: January 16, 2003
    Inventor: Chih-Ning Wu
  • Patent number: 6500349
    Abstract: A continuous process for forming multilayer circuit structures which includes applying and curing a film forming polymer onto the matte side of a copper foil. The opposite (shiny) side of the foil is optionally but preferably cleaned, and applied with a photoresist which is then optionally but preferably dried. The photoresist is exposed, and developed to remove the nonimage areas but leave the image areas. The foil under the removed nonimage area is then etched to form a copper pattern, and the remaining photoresist is optionally but preferably removed. The foil is then cut into sections, and then optionally but preferably punched with registration holes. The copper pattern is then optionally but preferably treated with a bond enhancing treatment, optionally but preferably inspected for defects, and laminated onto a substrate to form a multilayered circuit structure.
    Type: Grant
    Filed: December 26, 2000
    Date of Patent: December 31, 2002
    Assignee: Oak-Mitsui, Inc.
    Inventors: John Andresakis, Dave Paturel
  • Patent number: 6500352
    Abstract: An electrode plate is formed by a substrate and a plurality of patterned electrodes formed on the substrate. Each patterned electrode has a laminate structure including a first layer of nickel metal formed on the substrate and a second layer of copper formed thereon. The electrode plate may be prepared by a process including a step of etching such a multi-layer metal electrode-forming film formed on a substrate by spraying an etchant downwardly and uniformly onto the substrate while rotating the substrate at a rotation speed sufficient to allow quick liberation of the etchant from the substrate. The metal electrodes can be formed with good adhesion onto the substrate and with good width and thickness accuracy. By incorporating the electrode plate as a pair of substrates sandwiching a liquid crystal, a liquid crystal device free from transmission delay and rounding of voltage waveforms can be provided.
    Type: Grant
    Filed: November 23, 1999
    Date of Patent: December 31, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshiaki Yoshikawa, Makoto Kameyama, Junri Ishikura
  • Publication number: 20020190029
    Abstract: This invention relates to an on-line process for removing copper deposits from the blades of the rotor of a steam turbine in systems, particularly condensing steam turbines. The process comprises adding an oxime to an appropriate injection point of an electric generating power plant powered by a steam turbine, where the power plant comprises a pre-boiler system, a steam generator, a steam turbine, a condenser and an electric generator.
    Type: Application
    Filed: February 4, 2002
    Publication date: December 19, 2002
    Inventors: Emery N. Lange, Thomas H. Pike
  • Publication number: 20020166839
    Abstract: A thermoelectric device with improved efficiency is provided. In one embodiment, the thermoelectric device includes a first thermoelement and a second thermoelement electrically coupled to the first thermoelement. An array of first tips are in close physical proximity to, but not necessarily in physical contact with, the first thermoelement at a first set of discrete points. An array of second tips are in close physical proximity to, but not necessarily in physical contact with, the second thermoelement at a second set of discrete points. The first and second conical are constructed entirely from metal, thus reducing parasitic resistances.
    Type: Application
    Filed: February 11, 2002
    Publication date: November 14, 2002
    Applicant: International Business Machines Corporation
    Inventors: Uttam Shyamalindu Ghoshal, Errol Wayne Robinson
  • Patent number: 6468439
    Abstract: A process for the etching of multiple layers of at least two different metals comprisies: forming a resist pattern over a first layer of metal, said resist pattern having a pattern of openings therein, applying a first etch solution onto said resist pattern so that at least some etch solution contacts exposed areas of the first layer of metal, etching away the majority of the depth of the first metal in exposed areas of metal in the first layer of metal, applying a second etch solution onto the resist pattern the second etch solution having a rate of etch towards the first metal as compared to the first etch solution that is at least 20% less than the millimeter/minute rate of etch of the first etch solution at the same etch solution temperature, removing the second etch solution from said resist pattern after at least the first metal layer has been etched sufficiently to expose areas of a second metal layer underlying the first metal layer by forming an etched first metal layer, and applying a third etch so
    Type: Grant
    Filed: November 1, 1999
    Date of Patent: October 22, 2002
    Assignee: BMC Industries, Inc.
    Inventors: Donald A. Whitehurst, Paul D. Wyatt, Charles Ring, Michael J. Dufresne, Jose F. Brenes, Bruce A. Finger, Dave R. Zeipelt
  • Patent number: 6464893
    Abstract: Controlled chemical etching of rotating metal substrates has been shown to be a feasible and economic method for the reproducible production of thin, reactive metallic foils such as copper foils. Foils thus prepared react readily with chemical substances, apparently by chemisorption. The organic-metal assemblies exhibit the same corrosion and wetting behavior as those prepared by other processes, and they readily undergo additional functional group transformations.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: October 15, 2002
    Assignee: Pace University
    Inventor: Karen R. Caldwell
  • Patent number: 6444140
    Abstract: Metal surfaces, particularly copper surfaces, which are oxidatively micro-etched to increase surface area through the use of molybdenum. The micro-etch solutions contain a proton source, e.g., a mineral acid, an oxidizer agent, e.g., hydrogen peroxide, an azole compound, and a molybdenum source. These micro-etched surfaces can further be rendered acid-resistant by exposure to a thiazole compound and/or a thiocarbamide compound. The thiazole compound and/or thiocarbamide compound may be provided either in the oxidative micro-etching solution or provided in a post-micro-etching solution.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: September 3, 2002
    Assignee: Morton International Inc.
    Inventors: John Schemenaur, Todd Johnson, Michael Marsaglia
  • Publication number: 20020113039
    Abstract: An integrated semiconductor substrate bevel cleaning system that enables transfer of substrates through the bevel cleaner either with or without substrate processing within the bevel cleaner. The invention provides an integrated bevel cleaning apparatus comprising a transfer position, a rinsing position and an etching position.
    Type: Application
    Filed: February 16, 2001
    Publication date: August 22, 2002
    Inventors: Yeuk-Fai Edwin Mok, Alexander Ko, Bernardo Donoso, Joseph J. Stevens
  • Patent number: 6432826
    Abstract: Cu metallization is treated to reduce defects and effect passivation by removing a thin surface layer or removing corrosion stains, subsequent to CMP and barrier layer removal, employing a cleaning composition comprising deionized water, an acid and ammonium hydroxide and/or an amine. Embodiments include removing up to about 100 Å of the Cu metallization surface in a damascene opening by sequentially treating the exposed Cu surface with: an optional corrosion inhibitor; a solution having a pH of about 4 to about 11 and containing an acid, ammonium hydroxide and/or an amine, and deionized water; and a corrosion inhibitor.
    Type: Grant
    Filed: November 29, 1999
    Date of Patent: August 13, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Ramin Emami, Shijian Li, Sen-Hou Ko, Fred C. Redeker, Madhavi Chandrachood
  • Patent number: 6429134
    Abstract: A method of manufacturing a semiconductor device, which comprises the steps of providing a substrate having a groove on the surface thereof, forming a burying film on the substrate to thereby fill the groove with the burying film, performing a first polishing step to polish the burying film by means of a CMP method, the polishing being suspended before the substrate is exposed, and performing a second polishing step to polish the burying film by means of a CMP method until part of the burying film which is disposed outside the groove is removed. The time to finish polishing of the second polishing step is determined based on a film thickness of the burying film which is left remained after finishing the first polishing step. The first polishing step may be performed under a condition which differs from that of the second polishing step.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: August 6, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeo Kubota, Hiroyuki Yano, Kenro Nakamura
  • Patent number: 6428719
    Abstract: Write head coils for magnetic disk systems are commonly formed through electroplating onto a seed layer in the presence of a photoresist mask. It is then necessary to remove the seed layer everywhere except under the coil itself. The present invention achieves this through etching in a solution of ammonium persulfate to which has been added the complexing agent 1,4,8,11 tetraazundecane. This suppresses the reduction of Cu++ to Cu, thereby increasing the dissolution rate of copper while decreasing that of nickel-iron. Two ways of implementing this are described—adding the complexing agent directly to the ammonium persulfate and introducing the 1,4,8,11 tetraazundecane through a dipping process that precedes conventional etching in the ammonium persulfate.
    Type: Grant
    Filed: January 19, 2000
    Date of Patent: August 6, 2002
    Assignee: Headway Technologies, Inc.
    Inventors: Xuehua Wu, Wensen Li, Si-Tuan Lam, Henry C. Chang, Kochan Ju, Jei-Wei Chang
  • Patent number: 6426011
    Abstract: A method of making a printed circuit board whereby a fine wiring pattern can be formed. A through hole is formed in a substrate, both surfaces of the substrate being covered with copper foil. The substrate is treated with a catalyst and plated with copper. The through hole is filled with an insulating material, and the copper layer on the substrate is etched so that the catalyst layer is not exposed, leaving a thinned copper layer. Then, the substrate surfaces are ground and leveled by removing any projecting insulating material. Thereafter, another copper layer is deposited on the surface of the substrate, including surface regions on the fill material and is circuitized to form a wiring pattern. Since the catalyst layer is not exposed when the copper layer on the substrate is thinned, a fine wiring pattern can be obtained without the problem of subsequent peeling of the wiring conductors, or the entrapment of air.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: July 30, 2002
    Assignee: International Business Machines Corporation
    Inventor: Takashi Katoh
  • Publication number: 20020092827
    Abstract: Metal CMP with reduced dishing and overpolish insensitivity is achieved with an abrasive-free polishing composition having a pH and oxidation-reduction potential in the domain of passivation of the metal and, therefore, a low static etching rate at high temperatures, e.g., higher than 50° C. Embodiments of the present invention comprise CMP of Cu film without any abrasive using a composition comprising one or more chelating agents, one or more oxidizers, one or more corrosion inhibitors, one or more agents to achieve a pH of about 3 to about 10 and deionized water.
    Type: Application
    Filed: February 15, 2002
    Publication date: July 18, 2002
    Applicant: Applied Materials, Inc.
    Inventors: Lizhong Sun, Shijian Li, Fritz Redeker
  • Patent number: 6420099
    Abstract: A method for patterning an aluminum-containing layer. A tungsten-containing layer is provided over an aluminum-containing layer. The tungsten-containing layer is patterned to form an opening therein, so that the opening exposes an underlying portion of the aluminum-containing layer. The patterned tungsten-containing layer is exposed to an etch having a substantially higher etch rate of the aluminum-containing layer than of the tungsten-containing layer to remove the exposed portion of the aluminum-containing layer.
    Type: Grant
    Filed: August 2, 1999
    Date of Patent: July 16, 2002
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Martin Gutsche, Satish D. Athavale
  • Patent number: 6413436
    Abstract: In a process for treating a workpiece such as a semiconductor wafer, a processing fluid is selectively applied or excluded from an outer peripheral margin of at least one of the front or back sides of the workpiece. Exclusion and/or application of the processing fluid occurs by applying one or more processing fluids to the workpiece while the workpiece and a reactor holding the workpiece are spinning. The flow rate of the processing fluids, fluid pressure, and/or spin rate are used to control the extent to which the processing fluid is selectively applied or excluded from the outer peripheral margin.
    Type: Grant
    Filed: November 10, 1999
    Date of Patent: July 2, 2002
    Assignee: Semitool, Inc.
    Inventors: Brian Aegerter, Curt T. Dundas, Michael Jolley, Tom L. Ritzdorf, Steven L. Peace, Gary L. Curtis, Raymon F. Thompson
  • Patent number: 6410442
    Abstract: In-laid metallization patterns of copper or a copper alloy are fabricated by a damascene-type process wherein the upper surface of a thick, electroplated copper or copper alloy blanket or overburden layer filling recesses in a substrate surface is subjected to a mask-less, chemically-based differential etching step for partially planarizing/thickness reduction prior to a step of planarization by chemical-mechanical polishing (CMP). The inventive process enables an increase in manufacturing throughput, reduction in cost, and reduction in spent CMP slurry generation.
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: June 25, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Kai Yang
  • Patent number: 6403146
    Abstract: The present invention relates to a process for the manufacture of printed circuit boards. The method contemplates a novel processing sequence for this manufacturing process which method is particularly versatile in reducing the number of steps and variety of chemicals currently necessary to produce the circuit boards.
    Type: Grant
    Filed: March 12, 1997
    Date of Patent: June 11, 2002
    Inventors: Gary B. Larson, Donna Kologe, Cynthia Retallick, Austin Wells
  • Patent number: 6391780
    Abstract: A process for manufacturing damascene wiring in integrated circuits is described. Trenches in the top most layer are first over-filled with a soft metal (such as copper) and then a relatively thin layer of a hard material such as tantalum, tantalum nitride, titanium, titanium nitride etc is deposited on the copper surface Under a first set of control conditions CMP is then applied for just long enough to selectively remove this hard material layer from peaks in the copper surface while leaving it intact in the valleys. The control conditions for CMP are then adjusted so that CMP can proceed with material at the peaks being removed at a significantly faster rate than in the valleys. Thus, when the point is reached that all copper outside the trenches has been removed, the trenches are found to be just filled with a flat layer that has no dishing.
    Type: Grant
    Filed: August 23, 1999
    Date of Patent: May 21, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Tsu Shih, Ying-Ho Chen, Jih-Churng Twu
  • Patent number: 6383254
    Abstract: There are provided a treatment solution for reducing a copper oxide formed on the surface of copper to copper, wherein dimethylamine borane is contained in an amount of 0.3 to 2.0 g/L and the relationship y≧0.232x−0.185 holds between the concentration y (g/L) of dimethylamine borane and an area x (dm2/L) to be treated per unit solution amount, and a treatment method for reducing a copper oxide formed on the surface of a copper material to copper by dipping the copper material in the treatment solution as described above, wherein the addition of dimethylamine borane to water is carried out within 10 minutes before the dipping of the copper material or after the dipping of the copper material.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: May 7, 2002
    Assignee: Meltex Inc.
    Inventors: Yasuji Fujita, Kenji Ikeshima
  • Publication number: 20020036181
    Abstract: The optimization of a CMP process provides the use of an auxiliary layer (4) between a dielectric (1) in the vicinity of patterned portions and a layer of a liner (2). If the liner (2) is perforated in the CMP process, then the undercutting of the liner (2) by the chemical removal of the auxiliary layer (4) simplifies the process overall. Advantages are significantly lower defect densities due to CMP scratches, fewer short circuits, fewer alignment errors.
    Type: Application
    Filed: August 20, 2001
    Publication date: March 28, 2002
    Inventors: Peter Lahnor, Stephan Wege
  • Patent number: 6361708
    Abstract: A method and an apparatus for polishing a metal film formed on a semiconductor device are disclosed. A semiconductor wafer is immersed in an oxidizing solution before it is polished. As a result, the undesirable part of a W film deposited on the circumferential edge of the wafer is removed by etching.
    Type: Grant
    Filed: May 14, 1998
    Date of Patent: March 26, 2002
    Assignee: NEC Corporation
    Inventors: Akira Kubo, Mieko Suzuki
  • Publication number: 20020033379
    Abstract: The present invention is to provide a hydrophilic treating method of the surface of metal comprising, the first process which treat the surface of metal with a chemical conversion solution to form a chemical conversion film on the metal surface while etching the metal surface and the second process which remove said film formed on the surface of metal to obtain rougher surface, and the final process which forms a hydrophilic film on the surface of metal. Desirably the surface roughness indicated by Rz after above mentioned second process is rougher than 1.5 &mgr;m.
    Type: Application
    Filed: August 1, 2001
    Publication date: March 21, 2002
    Applicant: Nihon Parkerizing Co., Ltd.
    Inventors: Hiroki Hayashi, Mitsuhiro Matsumoto, Hiroyuki Iizuka
  • Publication number: 20020022370
    Abstract: Metal CMP with reduced dishing and overpolish insensitivity is achieved with an abrasive-free polishing composition having a pH and oxidation-reduction potential in the domain of passivation of the metal and, therefore, a low static etching rate at high temperatures, e.g., higher than 50° C. Embodiments of the present invention comprise CMP of Cu film without any abrasive using a composition comprising one or more chelating agents, one or more oxidizers, one or more corrosion inhibitors, one or more agents to achieve a pH of about 3 to about 10 and deionized water.
    Type: Application
    Filed: April 6, 2000
    Publication date: February 21, 2002
    Inventors: Lizhong Sun, Shijian Li, Fritz Redeker
  • Patent number: 6341557
    Abstract: This invention relates to a relatively thin cladded graphic arts impression graphic arts impression die plate (20) having a steel layer (22) which is integral throughout the extent thereof with a layer of copper (24) or bronze. A relieved design-defining surface may be formed in the copper or bronze layer by a chemical etching process or by chemical milling. In the case of chemical etching of the graphic arts impression die plate (20), a design-defining layer of photo-resist is applied to the outer surface of the copper layer (24) or the bronze layer and the relieved design is formed in the copper or bronze layer using a conventional ferric chloride etching solution. The etched graphic arts impression die plate may be mounted on an etchant-resistant backing or magnetic support member (28) to present an assembly which increases the thickness of the die assembly sufficiently to permit use thereof on standard stamping and embossing equipment without modification of the die-supporting chase.
    Type: Grant
    Filed: February 9, 2000
    Date of Patent: January 29, 2002
    Assignee: Universal Engraving, Inc.
    Inventors: Glenn E. Hutchison, Todd E. Scholtz
  • Patent number: 6333275
    Abstract: A chemical etching system provides a mixture of sulfuric acid and hydrogen peroxide and serves as the etchant for removing residual copper from an edge bevel region of a semiconductor wafer. The etching system includes a dilution module where concentrated sulfuric acid and concentrated hydrogen peroxide are diluted to the appropriate concentrations and then stored. To reduce the likelihood that oxygen bubbles (from hydrogen peroxide decomposition) will appear in the etchant solution, stored sulfuric acid and hydrogen peroxide are mixed immediately prior to use. In this manner, the dissolved oxygen concentration in the hydrogen peroxide decreases well below the saturation level.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: December 25, 2001
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, John B. Alexy, Jinbin Feng
  • Patent number: 6322636
    Abstract: A method of artificially forming patina on a copper product surface comprising the steps of blowing granular sodium hydrogen carbonate powder onto the copper product surface to clean and roughen it; wetting the surface with water; and depositing granular sodium hydrogen carbonate powder onto the wet copper surface; thereby forming patina on the copper surface. The step of wetting the copper surface and the step of depositing granular sodium hydrogen carbonate powder onto the wet copper surface are preferably repeated several times. The copper surface is preferably covered with porous sheets during or after the above steps.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: November 27, 2001
    Assignee: The Hiraoka Environmental Science Laboratory
    Inventor: Yutaka Matsugu
  • Patent number: 6322955
    Abstract: Multicurved copper films having fine-line elements suitable for radome applications can be improved by cutting the elements with reproducible precision to close tolerance (typically line widths of 3-10±0.25 mil) using an etchant comprising a concentrated saline solution of CuCl2.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: November 27, 2001
    Assignee: The Boeing Company
    Inventor: Dennis L. Dull
  • Publication number: 20010023829
    Abstract: A method for plating an electrically conductive substance, which includes the steps of contacting the electrically conductive substance with a plating agent in dilute solution, in which the plating agent is present in a concentration of 200 mM at most, and subjecting the plating agent adjacent to the electrically conducive substance to an electric field.
    Type: Application
    Filed: March 1, 2001
    Publication date: September 27, 2001
    Applicant: Obducat AB
    Inventors: Lennart Olsson, Babak Heidari
  • Patent number: 6284309
    Abstract: This invention relates to a method of forming a substrate with preparing a surface capable of making a cocontinuous bond comprising the steps of 1) obtaining a copper or copper alloy substrate and 2) applying an etching composition which comprises (a) an acid, (b) an oxidizing agent, (c) a copper complexing agent, and (d) a copper complex, wherein the copper complex is present in an amount which precipitates when applied to the copper or copper alloy substrate. The method also includes the step of 3) treating the substrate with a coating composition and/or 4) applying a stripping composition to the substrate. The invention also relates to copper articles, having surface porosity, including multilayer articles such as printed circuit boards and compositions used in the method. The present invention provides microporous copper or copper alloy substrates which have improved adhesion properties to organic material.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: September 4, 2001
    Assignee: Atotech Deutschland GmbH
    Inventors: Craig V. Bishop, George S. Bokisa, Robert J. Durante, John R. Kochilla
  • Publication number: 20010015345
    Abstract: A process for treating a copper or copper alloy substrate surface with a composition and corrosion inhibitor solution to minimize defect formation and surface corrosion, the method including applying a composition including one or more chelating agents, a pH adjusting agent to produce a pH between about 3 and about 11, and deionized water, and then applying a corrosion inhibitor solution. The composition may further comprise a reducing agent and/or corrosion inhibitor. The method may further comprise applying the corrosion inhibitor solution prior to treating the substrate surface with the composition.
    Type: Application
    Filed: November 29, 2000
    Publication date: August 23, 2001
    Applicant: Applied Materials, Inc.
    Inventors: Ramin Emami, Shijian Li, Sen-Hou Ko, Fred C. Redeker, Madhavi Chandrachood
  • Patent number: 6270590
    Abstract: A method for treating a component made of a copper-based alloy containing lead. The component has Pb and Pb salts on a surface thereof. The method includes the step of etching the surface of the component selectively to remove almost entirely the Pb and Pb salts from the surface. The etching includes treating the surface with an acidic aqueous solution that is a) a non-oxidizing acidic aqueous solution of an acid capable of forming soluble Pb salts or b) an oxidizing acidic aqueous solution of an organic acid mixed with peroxide. The method also includes the step of passivating the etched surface whereby to inhibit release of any Pb or Pb salts remaining in the component when the passivated surface is in contact with water.
    Type: Grant
    Filed: November 19, 1997
    Date of Patent: August 7, 2001
    Assignee: Europa Metalli S.p.A.
    Inventor: Aldo Giusti
  • Publication number: 20010008224
    Abstract: A method of manufacturing electronic components includes disposing a top metal layer (502) comprised of solder over a bottom metal layer (201, 202) comprised of titanium or tungsten, and selectively etching the bottom metal layer (201, 202) over the top metal layer (502) with an etchant mixture (601) comprised of an etchant, an additive to control the temperature of the etchant mixture (601), and another additive to reduce the redeposition of the top layer (502).
    Type: Application
    Filed: July 30, 1998
    Publication date: July 19, 2001
    Inventors: ERIC J. WOOLSEY, DOUGLAS G. MITCHELL, GEORGE F. CARNEY, FRANCIS J. CARNEY, CARY B. POWELL
  • Publication number: 20010007317
    Abstract: Tin or tin alloys, and any underlying copper-tin intermetallic, are stripped from copper surfaces utilizing an aqueous solution comprising nitric acid, sulfamic acid and a mono, di, or tri hydroxyl benzene.
    Type: Application
    Filed: February 17, 1999
    Publication date: July 12, 2001
    Applicant: MACDERMID, INCORPORATED
    Inventors: RAYMOND LETIZE, ROBERT HAMILTON
  • Patent number: 6168725
    Abstract: The invention is an aluminum etchant and method for chemically milling aluminum from, according to a preferred embodiment, a copper-aluminum-copper tri-metal layer to form three-dimensional circuits. The tri-metal comprises copper circuit patterns present on opposing surfaces of an aluminum foil, one of the copper patterns being laminated on a substrate. The etchant comprises an aqueous solution of 60 to 500 g/l base selected from (a) sodium hydroxide, (b) potassium hydroxide, and (c) their mixture; and 30 to 500 g/l of an additive selected from nitrite salt, a borate salt, a bromate salt, or mixture of any of them. The method comprises contacting the tri-metal with the etchant at a temperature between 25 and 95° C. for a time sufficient to remove a desired amount of the aluminum layer and provide (rigid, flexible, or 3-dimensional) electronic circuitry which may contain multiple conductive circuit layers.
    Type: Grant
    Filed: December 22, 1997
    Date of Patent: January 2, 2001
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Achyuta Achari, Mohan R. Paruchuri
  • Patent number: 6162366
    Abstract: An etching process includes the steps of: preparing an etchant containing ferric chloride and an anticorrosive agent for Cu, and etching with said etchant a multi-layer metal structure including a Cu layer and an Ni layer. The etchant may preferably further contain ferrous chloride. The etching process is effective in making etching rates of the respective substantially equal, thus suppressing occurrence of burr portions of the Ni layers.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: December 19, 2000
    Assignee: Canon Kabushiki Kaisha
    Inventors: Junri Ishikura, Toshiaki Yoshikawa
  • Patent number: 6156221
    Abstract: The present invention is a persulfate etchant composition especially useful for dissolving copper during fabrication of microelectronic packages. The etchant is characterized by its ability to selectively etch copper in the presence of nickel, nickel-phosphorous and noble metal alloys therefrom. Furthermore, no deleterious galvanic etching occurs in this etchant-substrate system so that substantially no undercutting of the copper occurs. The combination of high selectivity and no undercutting allows for a simplification of the microelectronic fabrication process and significant improvements in the design features of the microelectronic package, in particular higher density circuits. The persulfate etchant composition is stabilized with acid and phosphate salts to provide a process that is stable, fast acting, environmentally acceptable, has high capacity, and can be performed at room temperature. A preferred etchant composition is 230 gm/liter sodium persulfate, 3 volume % phosphoric acid and 0.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: December 5, 2000
    Assignee: International Business Machines Corporation
    Inventors: John M. Lauffer, Kathleen L. Covert, deceased, Peter A. Moschak
  • Patent number: 6143652
    Abstract: A method for forming a high-quality aluminum-copper alloy pattern over a semiconductor substrate. The method first forms an aluminum-copper alloy layer over a semiconductor substrate, and then performs a rapid thermal processing operation to remelt copper extracts into the alloy bulk. Subsequently, a photoresist layer is formed over the alloy layer. Finally, the alloy layer is etched to transfer the pattern from the photoresist layer to the metallic alloy layer. Unlike a conventional method that can lead to abnormal conduction due to the presence of extracts that are difficult to etch, this invention uses a thermal operation to remove the extracts before etching is conducted. Hence, the masking effect due to etching is mostly prevented.
    Type: Grant
    Filed: April 21, 1998
    Date of Patent: November 7, 2000
    Assignee: United Semiconductor Corporation
    Inventor: Chia-Chieh Yu
  • Patent number: 6123088
    Abstract: A cleaner composition for removing from within a microelectronic fabrication a copper containing residue layer in the presence of a copper containing conductor layer, and a method for stripping from within a microelectronic fabrication the copper containing residue layer in the presence of the copper containing conductor layer. The cleaner composition comprises: (1) a hydroxyl amine material; (2) an ammonium fluoride material; and (3) a benzotriazole (BTA) material. The cleaner composition contemplates the method for stripping from within the microelectronic fabrication the copper containing residue layer in the presence of the copper containing conductor layer.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: September 26, 2000
    Assignee: Chartered Semiconducotor Manufacturing Ltd.
    Inventor: Kwok Keung Paul Ho
  • Patent number: 6117352
    Abstract: The present invention advantageously provides a method for obtaining access to an integrated circuit chip encapsulated within a device package. The present method involves positioning a masking material, i.e., gasket, adjacent to the heat spreader of the device package. The gasket includes a cavity which is aligned adjacent a portion of the heat spreader directly above the chip. An etchant injection system is then placed against the gasket. A heat spreader etchant is then injected directly into the cavity such that the etchant contacts the exposed surface of the heat spreader. The etchant is supplied to the cavity until a opening is etched vertically through the thickness of the heat spreader. If the heat spreader is composed of copper plated with nickel, it is preferred that the etchant be a solution of 70% nitric acid heated to about 80.degree. C. Formation of the opening through the heat spreader may expose an adhesive layer.
    Type: Grant
    Filed: November 20, 1997
    Date of Patent: September 12, 2000
    Assignee: LSI Logic Corporation
    Inventors: Kevin Weaver, Steve E. Scott
  • Patent number: 6099745
    Abstract: In a rigid/flex circuit board and fabricating process, patterns of electrical traces are formed by etching conductive layers on outer surfaces of a flexible multi-layer circuit structure. A protective barrier material is deposited on the etched traces using an "electroless" process, such as immersion of the flexible circuit board in an aqueous solution containing ionic tin. The protective barrier material adheres to and encapsulates the copper traces. An outer circuit structure including a bondfilm of epoxy-impregnated fiberglass ("prepreg" bondfilm) and a copper foil layer is laminated onto the flexible circuit structure. The prepreg bondfilm has a window area removed by routing or an equivalent process prior to being laminated to the flexible structure. The window area defines a flex area of the rigid/flex circuit board that will be relatively flexible.
    Type: Grant
    Filed: May 4, 1999
    Date of Patent: August 8, 2000
    Assignee: Parlex Corporation
    Inventors: Darryl McKenney, Arthur Demaso, Craig Wilson
  • Patent number: 6096652
    Abstract: A method of CMP of the semiconductor device where the method comprises the sequential steps of providing a semiconductor device, forming a copper layer on the semiconductor device and planarizing the copper layer with a medium. The medium comprises an abrasive component and a chemical solution. The chemical solution comprises water, an oxidizing agent, a first coordinating ligand adapted to form a complex with Cu(I) and a second coordinating ligand adapted to form a complex with Cu(II).
    Type: Grant
    Filed: November 3, 1997
    Date of Patent: August 1, 2000
    Assignee: Motorola, Inc.
    Inventors: David K. Watts, Janos Farkas, Jason Gomez, Chelsea Dang
  • Patent number: 6093335
    Abstract: A method for planarizing an exposed metal surface on a substrate is provided in which surface irregularities are eliminated. A photoresist layer is first removed from the substrate. Then a conformal planarizing head is placed in contact with the metal surface while chemical etchant essentially free of abrasives is supplied to an interface between the metal substrate and the planarizing head. The surface is then planarized until it is free of irregularties.
    Type: Grant
    Filed: November 20, 1997
    Date of Patent: July 25, 2000
    Assignee: International Business Machines Corporation
    Inventors: Ashwinkumar C. Bhatt, John Christopher Camp, Subahu Dhirubhai Desai, Voya Rista Markovich, Michael Wozniak
  • Patent number: 6086779
    Abstract: This invention relates to an aqueous etching composition for etching metallic copper comprising(a) an acid,(b) a copper complexing agent,(c) a metal capable of having a multiplicity of oxidation states which is present in one of its higher positive oxidation states and which metal forms a composition soluble salt, and(d) oxygen wherein the concentration of the higher positive oxidation state metal in the composition is greater than about 4 grams/liter of composition.The invention also relates to a process for etching metallic copper comprising contacting the surface of a copper substrate with the aqueous etching compositions of the invention. A method of regenerating a spent aqueous etching composition of the invention which has been used for etching metallic copper also is described.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: July 11, 2000
    Assignee: McGean-Rohco, Inc.
    Inventors: Craig V. Bishop, John R. Kochilla, Robert J. Durante, George S. Bokisa
  • Patent number: 5965036
    Abstract: A microetching composition for copper or copper alloys comprising, (a) an oxidizing agent which can oxidize the copper or copper alloy, (b) a polymer compound which contains polyamine chains or a cationic group or both in the amount of 0.000001 to 1.0% by weight, and (c) water. The composition can produce surfaces of copper or copper alloy exhibiting excellent adhesion to resins such as prepregs and resists, and superior solderability. The composition can be adaptable to the manufacture of printed wiring boards with highly integrated fine line patterns.
    Type: Grant
    Filed: January 24, 1997
    Date of Patent: October 12, 1999
    Assignee: MEC Co., Ltd.
    Inventors: Yoshiro Maki, Toshiko Nakagawa, Yasushi Yamada, Takashi Haruta, Maki Arimura
  • Patent number: 5958257
    Abstract: A process for the treatment of brass components to reduce leachable lead therefrom when the component is exposed to water in which the brass component is first treated with an aqueous caustic solution to remove some of the leachable lead therefrom. Thereafter, the brass component is leached to remove excess caustic and then contacted with a water soluble carboxylic acid to remove most of the remaining leachable lead. It has been found that the efficiency of the process can be significantly enhanced through the use of ultrasonic agitation to ensure intimate contact between the treating solutions and the brass component. In the practice of the invention, the amount of lead removed is sufficient to meet the most stringent regulatory requirements for water quality.
    Type: Grant
    Filed: January 7, 1997
    Date of Patent: September 28, 1999
    Assignee: Gerber Plumbing Fixtures Corp.
    Inventors: Michael W. Regelbrugge, George V. Richey, Edward L. Cote, Lane D. Tickanen
  • Patent number: 5948280
    Abstract: A printed circuit board laminated without reinforced binder and a method for its fabrication are disclosed. The invention makes possible reduced board thickness and increased layer count without excessive reduction in the thickness of core material. Laser or plasma drilling can be performed with increased control. Straighter traces, higher trace resolution and higher signal velocity with reduced distortion are made possible.
    Type: Grant
    Filed: May 2, 1997
    Date of Patent: September 7, 1999
    Assignee: Westak, Inc.
    Inventor: Chung Namgung
  • Patent number: 5935452
    Abstract: A resin composition comprising (a) an epoxy resin having a number average molecular weight of 1200 or less, (b) a carboxylic acid-containing acrylic or acrylonitrile-butadiene rubber, (c) a curing agent for the epoxy resin, and (d) a curing accelerator is easily chemically etched and suitable as an insulating adhesive for producing multilayer printed circuit boards.
    Type: Grant
    Filed: November 10, 1998
    Date of Patent: August 10, 1999
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Teiichi Inada, Yoshiyuki Tsuru, Shin Takanezawa
  • Patent number: 5919379
    Abstract: Copper foil having a matte surface and an opposite shiny surface, the shiny surface having thereon a protective metallic coating comprised of a first protective metallic layer, preferably iron, electrodeposited on the shiny surface and a second metallic layer, preferably zinc, electrodeposited on the first layer, the metallic coating be chemically removable without damage to the copper foil and the second metallic layer being softer than the first metallic layer. The matte surface of the copper foil can be bonded to a dielectric material, and the protective metallic coating can be removed from the shiny surface by etching.
    Type: Grant
    Filed: December 22, 1997
    Date of Patent: July 6, 1999
    Assignee: Foil Technology Development Corporation
    Inventor: John E. Thorpe
  • Patent number: 5904859
    Abstract: The specification describes techniques for applying under bump metallization (UBM) for solder bump interconnections on interconnection substrates. The UBM of the invention comprises a Cu, Cu/Cr, Cr multilayer structure. Problems in etching the Cu/Cr layer are overcome using a high pH etchant containing a copper complexing ingredient to prevent passivation of the copper constituent by the chromium etchant solution. With the availability of this etchant the UBM multilayer can be formed using subtractive techniques.
    Type: Grant
    Filed: April 2, 1997
    Date of Patent: May 18, 1999
    Assignee: Lucent Technologies Inc.
    Inventor: Yinon Degani