Abstract: A method used in some step of processing for ashing a photoresist resin film of a semiconductor wafer is disclosed. Generally the present method will conclude the following steps. Firstly adjusting Etch-Module-Asher endpoint is carried out. Then placing the substrate coated with the resist film in a vacuum chamber will be achieved. The next step is that positing silicon wafer into asher through the vacuum chamber having a wafer holding-set plate, it is for closely receiving and orderly stepped ranking the wafer. Here, the silicon wafer is pushed to the chamber. Finally, the last process is that adjusting second Etch-Module-Asher Endpoint. Simultaneously ashing the resist film by an oxygen plasma is carried out while heating the substrate to remove the resist film, therefore photoresist is peeled up a first end of the silicon wafer and the silicon wafer is cleaned up and the other end of the silicon wafer.

Abstract: Resistors are formed by selective etching from layered thin film material comprising an insulating substrate, a resistive material which is a mixture of a zero valence metal and a dielectric material, and a layer of conductive material.

Abstract: A thin-film microstructure sensor includes a substrate having an insulation layer. A thin-film platinum temperature-sensitive resistor is provided on the insulation layer of the substrate, the thin-film platinum temperature-sensitive resistor comprising a platinum layer, the platinum layer having a maximum crystal grain size above a reference grain size of 800 Å. The thin-film platinum temperature-sensitive resistor is formed by a sputtering process to provide a temperature coefficient of resistance TCR above a reference TCR level of 3200 ppm.

Abstract: A method for contacting at least one printed circuit board or at least one punched grid and at least one hybrid includes the steps of: forming contact elements in a contacting foil, positioning the contacting foil over the hybrid in such a way that the contact elements are arranged at preselected positions between the printed circuit traces of the hybrid and the printed circuit traces of the printed circuit board, and etching away at least a portion of the contacting foil, such that the contact elements are at least partially freely accessible.

Abstract: A resist material having a resist and particles mixed into the resist, a major component of the particles being a cluster of carbon atoms, is provided. A method for fabricating a resist material is also provided, the method repeatedly performing: a first step of coating a substrate with a resist film; and a second step of depositing particles whose major component is a cluster of carbon atoms on the resist film. Accordingly, a resist film with high etching resistance can be obtained, and it is possible to realize a reduction in the thickness of the resist film, improvements of contrast of resist patterns; resist sensitivity; heat resistance of resist films; mechanical strength of resist patterns; and further, stabilization of resist sensitivity. Therefore, highly precise fine pattern fabrication can be realized.

Abstract: A temperature-dependent measuring resistance with rapid response time is at least partially arranged on an electrically insulating surface of a ceramic substrate, wherein a portion of the conductor path spans a recess situated in the substrate in a bridge-like manner, and the remaining portion of the conductor path in the edge area of the substrate adjacent to the recess is provided with connection contact fields. The conductor path comprises a platinum or gold layer, wherein the conductor path is partially provided with a cover layer of glass, and wherein the connection contact fields are exposed. In a further embodiment, the conductor path is arranged together with the connection contact fields either on a screen-printed glass membrane or on a thin film membrane applied in a PVD process, which covers the surface of the ceramic substrate and spans the recess. The cover layer is likewise selectively applied by screen printing in case there is a glass membrane.

Abstract: The present invention provides an ink-jet printhead substructure highly thermally efficient and greatly simplified in both the method of manufacture and resulting structure. The printhead substructure of the present invention comprises a resistor formed on an insulated substrate, a single conductor layer that provides both the conductive bonding interconnect pads and the conductive traces for the substructure, a passivation layer and a cavitation barrier. The resistor, passivation layer and cavitation barrier may comprise a single graded layer. The graded thin-film structure provides the resistor, passivation and cavitation barrier components without creating abrupt layer interfaces thereby, improving printhead reliability and durability. Fabrication of the printhead substructure of the present invention requires only two or three lithographic masks and a minimized number of sputter source materials.

Abstract: An etchant mixture of carbon tetrafluoride and argon in a plasma etch chamber produces straight walled isolation trenches in a silicon nitride layer, the trenches having rounded bottoms and no microtrenching.

Abstract: A method of making a laminated substrate by forming a registration mark on a core layer of the substrate. Then, forming a first layer on the core layer using the registration mark as a fiducial registration point. The first layer is laser drilled through to expose the registration mark on the core layer. A second layer is then formed on the first layer using the registration mark as a fiducial point.

Abstract: An electronic component includes a substrate (201) with a surface (202), a resistor structure (210) supported by the substrate, and a passivation layer (300, 805) over the resistor and the surface of the substrate where the passivation layer has a hole (311, 312, 611, 612, 613, 614, 711, 811), where the surface of the substrate has a compressive portion and a tensile portion, and where the resistor is located between the compressive and tensile portions of the surface.

Abstract: The structure of the sensing element of a platinum resistance thermometer and method for manufacturing the same, in which the silicon wafer is used as a substrate. A silicon substrate is etched to form a desired wiring pattern, then a silicon dioxide layer is grown as a layer of thermal oxide on the silicon substrate by heating the etched substrate in an oxygen-containing atmosphere. After a platinum film is deposited onto the surface of the silicon dioxide layer, the platinum-coated substrate is subject to gentle polishing. The platinum membrane outside the etched groove is easily detached while the platinum layer inside the etched groove remains attached. Thus a platinum circuit with a desired circuit pattern is formed on the substrate. After heat treatment in a temperature range of 750.degree. C..about. 1500.degree. C. and further processing, the sensing element of a platinum resistance thermometer is obtained.

Abstract: A method of forming electrode at the end surface of chip array resistors utilizes the vacuum metallization technology such as sputtering evaporating deposition or ion implanting accompanying a metal mask for forming electrode at the end surfaces of chip array resistors. A blank base can be used instead of a punch-through base which has to be used in conventional technology. The method disclosed in the present invention may greatly increase the productivity of the electrodes, and at the same time, the variation of resistance value of the chip array resistor is minimized and the product quality may be improved.

Abstract: A method for forming a thin film resistor. There is first provided an insulator substrate. There is then formed upon the insulator substrate a blanket thin film resistive layer. There is then removed through a non-photolithographic etching method a portion of the blanket thin film resistive layer to form upon the substrate a patterned thin film resistive layer. Finally, there is then formed through a non-photolithographic printing method upon the patterned thin film resistive layer a patterned conductor lead layer. Alternatively, the portion of the blanket thin film resistive layer may be removed to form the patterned thin film resistive layer after the patterned conductor lead layer is formed upon the blanket thin film resistive layer.

Abstract: A method in a variable-gap plasma processing chamber for controlled removal of at least a portion of an upper crust of a photoresist layer disposed above a substrate. The upper crust represents a hardened upper layer of the photoresist layer. The method includes loading the substrate into the variable-gap plasma processing chamber. The method further includes flowing an ash source gas comprising O.sub.2 into the variable-gap plasma processing chamber. The ash source gas is substantially free of an O.sub.2 bombarding gas. The method further includes performing the controlled removal of at least the portion of the upper crust of the photoresist layer with a plasma struck from the ash source gas while a gap between an upper surface of the substrate and an upper electrode of the variable-gap plasma processing chamber is maintained at a predefined wide gap distance.

Abstract: Porous semiconductor material in the form of at least partly crystalline silicon is produced with a porosity in excess of 90% determined gravimetrically, and voids, crazing and peeling are substantially not observable by scanning electron microscopy at a magnification of 7,000. The porous silicon is dried by supercritical drying. The silicon material has good luminescence properties together with good morphology and crystallinity.

Abstract: A construction and manufacturing process for drop on demand print heads provides electrothermal heating elements which are in close proximity to the tip of the nozzle, and therefore achieve efficient thermal coupling to the ink.The construction utilizes metal layer electrodes formed as part of a CMOS drive circuit fabrication on a silicon wafer. A nozzle tip hole is then etched with an axis generally normal to the electrode layers. A heater substance and a passivation layer are deposited on the wafer. These layers are then anisotropically etched, leaving heater and passivation layers on the vertical sidewalls of the nozzle tip hole. Ink channels and nozzle barrels are then etched in the wafer, preferably using an etchant which has a high selectivity against the passivation layer and heater material, such as EDP.

Abstract: A method for determining a fiducial misregistration of conductive layers of a laminated substrate by providing a plurality of alternatingly disposed dielectric layers and conductive layers. A predetermined area of resistive material is formed as part of at least one conductive layer. Each predetermined area of resistive material is formed at a same corresponding location in each respective conductive layer, and each predetermined area of resistive material has a first end and a second end. A through-via is formed and connected to each predetermined area of resistive material between the first and second ends of each respective predetermined area. A total resistance is determined between the first end and the second end of each predetermined area of resistive material. A first fractional resistance is determined between the first end of each predetermined area of resistive material and the through-via.

Abstract: A dry process for stripping photoresist from a semiconductor device during the manufacturing process and after high dose ion implantation is describe. The implant-hardened surface of the photoresist is first stripped by oxygen and nitrogen/hydrogen plasma at a lower temperature (<220.degree. C.) to prevent popping problem. The bulk body of the photoresist is then stripped by oxygen and nitrogen/hydrogen plasma at a higher temperature (>220.degree. C.) to provide a faster reaction rate. The semiconductor wafer is cleaned by ammonium hydroxide and hydrogen peroxide to completely remove remaining contaminant and photoresist residuals. The three-step dry process can effectively strip the post implant photoresist so that it ensures the cleanliness of the wafer for the succeeding processes.

Abstract: A process (200) for fabricating a flex circuit (708, 806, 812, 818 or 824) using a fabrication process without the use of a photomask includes the steps of generating (412) an electronic image (702 or 802) of circuit traces (704 or 804) representing at least a single-sided flex circuit, and selectively thermal transferring (506 or 606) a resin to either a conductively clad or non-conductive flexible substrate (304) under the control of the electronic image (702 or 802) to form either an etch resist or a conductor which defines the circuit traces (704 or 804). The conductively clad flexible substrate (304) is etched to form the circuit traces (704 or 804) of the flex circuit defined by the etch resist, after which the etch resist is removed.

Abstract: The fabrication of thin film inductors on a substrate, which may include thin film resistors, thin film capacitors, and semiconductor devices. In one embodiment an inductor is fabricated initially on a substrate and then integrated with other devices subsequently formed on the substrate. In this embodiment, process steps used to fabricate such other devices utilize temperatures sufficiently low to prevent damaging or destroying the characteristics of the inductor. In another embodiment the fabrication of an inductor is achieved through photoresist masking and plating techniques. In alternative embodiments, fabrication of an inductor is achieved by sputtering, photoresist processes and etching/ion-milling techniques. A combination of various individual process steps from various embodiments are suitable for use to fabricate the individual layers to achieve a structure of this invention.

Abstract: A printed circuit board having a selectable circuit routing configuration comprises a substrate, a plurality of electrical traces mounted to the substrate for interconnecting electrical components, and at least one fusible connector mounted to the substrate. Each of the fusible connectors has a fuse line formed from a conductive layer of the printed circuit board and forms a fusible connection between at least two of the electrical traces. The circuit routing configuration can be selected by application of a predetermined current through at least one of the fusible connectors to break the fusible connection formed by the fusible connector.

Abstract: A resistivity map is prepared depicting the sheet resistance of a resistive film formed on a wafer as a function of position on the wafer. The resistivity map includes a plurality of zones each of which encompasses a specific range of resistivities of the resistive film. A mask containing numerous patterns which define associated resistors in the resistive film is divided into a plurality of zones which correspond to the plurality of zones of the resistivity map. One or more of the dimensions of the resistor patterns within each zone of the mask is automatically altered in a manner so as to compensate for the resistivity range of the corresponding zone of the resistivity map. Thus, in those portions of the resistive film where the sheet resistance is higher than the film's intended value, the width of the patterns in corresponding portions of the resistor mask are increased by an appropriate amount, thereby compensating for the higher sheet resistance.

Abstract: A method of metal-plating electrode portions of a printed-wiring board includes copper-plating the overall surface of the printed-wiring board on which an electric circuit has been formed, forming a metal plating resist coating on the copper plated wiring board except for on the electrode portions, and subjecting the electrode portions, which are not covered with the resist coating, to an electrolytic metal plating process, at least once, and then removing the remaining resist coating. The resist coating formation and the electrolytic metal plating process may optionally be repeated a predetermined number of times. An etching resist coating is then formed on the circuit portion including the electrode portions, and the copper-plated portion is then removed except from the circuit portion by etching and then stripping the etching resist coating.

Abstract: A three dimensional multi-layer circuit structure is formed by partially etching a foil having a coating. A pre-circuit is formed by providing a metal foil, applying a photodefinable photoresist to each side of the metal foil, selectively exposing and developing the photoresist leaving exposed areas and unexposed areas and, plating the unexposed areas with a second metal. The pre-circuit is placed in an etching solution and removed after the etching solution partially etches the metal foil to undercut the second metal. The partially etched pre-circuit is then bent into a predetermined shape. The partially etched pre-circuit is then inserted into a mold cavity so that at least one surface of the circuit structure is adjacent to the mold. The mold is filled with a polymer resin so that the polymer resin encapsulates at least a portion of the partially etched pre-circuit and substantially fills the undercut.

Abstract: A method for producing a desired resistive taper under computer control for controlling the surface resistivity of an electrical element, which comprises the steps of creating a computer controlled optically graded pattern corresponding to the desired resistive taper, producing a phototool from the graded pattern and using the phototool to photochemically etch the graded pattern onto a substrate.

Abstract: A resistor of SMD (Surface Mounted Device) construction includes a film of a resistive alloy as a resistive track on two electrically separated carrier plate elements of copper, which are constructed as contact elements solderable to the terminals of a printed circuit board to thereby ensure good heat dissipation into a printed circuit board. In order to manufacture such resistors, a resistive film sufficient for a plurality of individual resistors is adhered to but electrically isolated from a large copper plate and the laminate formed thereby is split into the individual resistors after producing the individual resistive tracks and their electrical connections to the copper plate and after producing gaps between the plate elements for each track.

Abstract: A process of producing a magnetic read head which includes a multilayer magnetoresistant element and a concentrator. The magnetic read head is produced to include a multilayer magnetoresistant element across a head gap of the concentrator positioned to a rear of pole pieces defining the gap of the head. Such a magnetic head may find particular application in magnetic recording systems.

Abstract: In a multilayer wiring board comprising a substrate on which two or more layers of wiring or insulation film are formed of different materials, for example, the wiring layer is processed so that the processed side faces of the board contour a stepped shape in the cross-sectional view of the board, whereby coverage of a film formed thereon can be improved. Specifically, first, insulation film 2 is formed on a substrate 1 and then, resistor film 3 and resistor electrode film 4 are continuously formed thereon to form a film of multiple structure. Mask 9 is formed thereon. Then, the layers is etched successively in the order of from the top layer and thereafter only the resistor electrode film 4 is further etched with an etching solution which selectively etches only the resistor electrode film 4 to form a stepwise patterned side face. Finally, the mask is removed and wiring electrode film 5 is formed.

Abstract: A semi-conductor device having a conductive lead with an exposed tip disposed within a first insulative material, which is in turn disposed between insulated first and second integrated circuit chips is disclosed. The first insulative material is etched to form a recess after which a second insulative material is deposited on the access plane of the chips and within the recess. The tip of the wire lead is then exposed by either a chemical mechanical polish or by a wet etch/develop process.

Abstract: An infrared detector device is described. It is based on an infrared analog of the Fabry Perot interferometer, using one curved, fully reflecting, plate and one planar, mainly reflecting, but partially transmitting, plate. The space between these plates behaves as a resonant cavity which can be built to respond to either a broad or a narrow band of wavelengths in the general range between 1 and 15 microns. It is also possible to combine several detectors of different narrow bands in a single device. Actual detection of the radiation is based on use of thin film resistors, having a high thermal coefficient of resistance, that are thermally isolated from the other parts of the structure. Details relating to the manufacture of the devices are given.

Abstract: The present invention concerns a thermal recording apparatus, preferably an ink jet thermal recording device and, a process for forming the same and, accomplishes uniformized heat energy action of the heat acting surface (a protective layer surface when there is protective layer), namely the heat-generating resistors of a plurality of electrothermal transducers. The present invention has uniformized the amount of heat energy generated during recording at the heat acting portions by positively changing the shape or the thickness of the resistors concerned with the heat acing portions or/and the constitution itself of the protective layer depending on its existing position.

Abstract: In a method of etching a thin film resistor material, such as NiCr or CrSi, and of producing a thin film resistor, a non-photoresist hard mask is deposited on an exposed surface of thin film resistor material, a delineated portion of the hard mask is etched with a hydrogen peroxide etchant that does not affect the thin film resistor material to expose the material therebeneath, and the exposed thin film resistor material is etched with a second etchant that does not affect the hard mask. The second etchant may be sulfuric acid heated to greater than 125.degree. C. for NiCr or a mixture of phosphoric acid, nitric acid and hydrofluoric acid for CrSi. The hard mask preferably comprises TiW.

Abstract: A hybrid resistance card (R-Card) is manufactured using a two-step process wherein an electrically conductive ink layer and an electrically resistive ink layer are printed onto a surface, which may be either a substrate or the part on which the R-Card is to be used. The conductive ink layer is selectively applied in a pattern of shapes to electrically short out portions of the resistive ink layer, thereby permitting the R-Card to have a predetermined resistive taper across its width according to a desired resistivity curve. The resistive ink layer comprises grid-like lines bordering and separating the conductive shapes. The resistive taper is substantially continuous along the length of the R-Card, at least linearly, though if the card is designed to cover an entire part, it is substantially continuous along a plurality of directions on the card, with the tapers being designed to round into one another.

Abstract: An inverted thin film resistor structure comprises a metallic interconnect layer having predetermined patterns delineating two or more metallic interconnect leads (e.g. Al 36) overlaying a supporting layer (e.g. SiO.sub.2 32), an interlevel dielectric layer (e.g. SiO.sub.2 40) overlaying the supporting layer, and planarized so as to expose a top contact portion of the metallic interconnect leads, and an inverted thin film resistor (e.g. TaN 44) overlaying a portion of the planarized interlevel dielectric layer and overlaying the exposed top contact portions of the metallic interconnect leads. The novel inverted thin film resistor structure does not require a protective metal layer and does not require any vias in direct contact with the resistor. In addition, both the thin film resistor and the metallic interconnect can be formed with pattern and etch techniques.

Abstract: An electromechanical transducer is provided, and the process for making it utilizes a piezoresistive element or gage which is dielectrically isolated from a gap spanning member and substrate upon which it is supported. The gage of the invention is a force gage and is derived from a sacrificial wafer by a series of etching and bonding steps which ultimately provide a gage with substantially reduced strain energy requirements.